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The MISC block found on Tegra234 is mostly similar to the one on Tegra194 but supports slightly different register sets that make it incompatible. Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
15 lines
645 B
Plaintext
15 lines
645 B
Plaintext
NVIDIA Tegra186 (and later) MISC register block
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The MISC register block found on Tegra186 and later SoCs contains registers
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that can be used to identify a given chip and various strapping options.
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Required properties:
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- compatible: Must be:
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- Tegra186: "nvidia,tegra186-misc"
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- Tegra194: "nvidia,tegra194-misc"
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- Tegra234: "nvidia,tegra234-misc"
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- reg: Should contain 2 entries: The first entry gives the physical address
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and length of the register region which contains revision and debug
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features. The second entry specifies the physical address and length
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of the register region indicating the strapping options.
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