Eric Yang 57133a28bc drm/amd/display: fix code to control 48mhz refclk ... [Why] The SMU message to enable this feature looks at argument. Previous code didn't send right argument. This change will allow the feature to be be enabled. [How] Fixed one issue where SMU message to enable the feature was sent without setting the parameter. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-10-10 19:33:15 -05:00
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drm	drm/amd/display: fix code to control 48mhz refclk	2019-10-10 19:33:15 -05:00
host1x
ipu-v3	gpu: ipu-v3: image-convert: only sample into the next tile if necessary	2019-08-19 16:25:30 +02:00
vga
Makefile