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b849bec29a
If tbo.mem.bus.caching is cached, buffer is intended to be mapped as cached from CPU. Map it with ioremap_cache. This wasn't necessary before as device memory was never mapped as cached from CPU side. It becomes necessary for aldebaran as device memory is mapped cached from CPU. Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Reviewed-by: Christian Konig <Christian.Koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/1614638628-10508-1-git-send-email-Oak.Zeng@amd.com Signed-off-by: Christian König <christian.koenig@amd.com> |
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| .. | ||
| Makefile | ||
| ttm_agp_backend.c | ||
| ttm_bo_util.c | ||
| ttm_bo_vm.c | ||
| ttm_bo.c | ||
| ttm_device.c | ||
| ttm_execbuf_util.c | ||
| ttm_module.c | ||
| ttm_module.h | ||
| ttm_pool.c | ||
| ttm_range_manager.c | ||
| ttm_resource.c | ||
| ttm_tt.c | ||