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e21268efbe
Unlike sja1105, the only other user of the software-defined tag_8021q.c
tagger format, the implementation we choose for the Felix DSA switch
driver preserves full functionality under a vlan_filtering bridge
(i.e. IP termination works through the DSA user ports under all
circumstances).
The tag_8021q protocol just wants:
- Identifying the ingress switch port based on the RX VLAN ID, as seen
by the CPU. We achieve this by using the TCAM engines (which are also
used for tc-flower offload) to push the RX VLAN as a second, outer
tag, on egress towards the CPU port.
- Steering traffic injected into the switch from the network stack
towards the correct front port based on the TX VLAN, and consuming
(popping) that header on the switch's egress.
A tc-flower pseudocode of the static configuration done by the driver
would look like this:
$ tc qdisc add dev <cpu-port> clsact
$ for eth in swp0 swp1 swp2 swp3; do \
tc filter add dev <cpu-port> egress flower indev ${eth} \
action vlan push id <rxvlan> protocol 802.1ad; \
tc filter add dev <cpu-port> ingress protocol 802.1Q flower
vlan_id <txvlan> action vlan pop \
action mirred egress redirect dev ${eth}; \
done
but of course since DSA does not register network interfaces for the CPU
port, this configuration would be impossible for the user to do. Also,
due to the same reason, it is impossible for the user to inadvertently
delete these rules using tc. These rules do not collide in any way with
tc-flower, they just consume some TCAM space, which is something we can
live with.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
59 lines
1.8 KiB
C
59 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright 2019 NXP Semiconductors
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*/
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#ifndef _MSCC_FELIX_H
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#define _MSCC_FELIX_H
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#define ocelot_to_felix(o) container_of((o), struct felix, ocelot)
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/* Platform-specific information */
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struct felix_info {
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const struct resource *target_io_res;
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const struct resource *port_io_res;
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const struct resource *imdio_res;
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const struct reg_field *regfields;
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const u32 *const *map;
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const struct ocelot_ops *ops;
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int num_mact_rows;
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const struct ocelot_stat_layout *stats_layout;
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unsigned int num_stats;
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int num_ports;
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int num_tx_queues;
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struct vcap_props *vcap;
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int switch_pci_bar;
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int imdio_pci_bar;
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const struct ptp_clock_info *ptp_caps;
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int (*mdio_bus_alloc)(struct ocelot *ocelot);
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void (*mdio_bus_free)(struct ocelot *ocelot);
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void (*phylink_validate)(struct ocelot *ocelot, int port,
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unsigned long *supported,
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struct phylink_link_state *state);
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int (*prevalidate_phy_mode)(struct ocelot *ocelot, int port,
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phy_interface_t phy_mode);
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int (*port_setup_tc)(struct dsa_switch *ds, int port,
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enum tc_setup_type type, void *type_data);
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void (*port_sched_speed_set)(struct ocelot *ocelot, int port,
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u32 speed);
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void (*xmit_template_populate)(struct ocelot *ocelot, int port);
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};
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extern const struct dsa_switch_ops felix_switch_ops;
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/* DSA glue / front-end for struct ocelot */
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struct felix {
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struct dsa_switch *ds;
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const struct felix_info *info;
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struct ocelot ocelot;
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struct mii_bus *imdio;
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struct lynx_pcs **pcs;
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resource_size_t switch_base;
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resource_size_t imdio_base;
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struct dsa_8021q_context *dsa_8021q_ctx;
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enum dsa_tag_protocol tag_proto;
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};
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struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port);
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int felix_netdev_to_port(struct net_device *dev);
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#endif
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