Chris Park 4f76da2318 drm/amd/display: Correct I2C register offset ... [Why] I2C register name starts with 1, unlike other registers that start with 0. This creates a problem with the new register macro refactoring when I2C HW objects are created in an array. [How] Correct I2C register offset by making a new macro to account for array offset. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com> Signed-off-by: Chris Park <chris.park@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2022-09-13 14:32:59 -04:00
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acp
amdgpu	drm/amdgpu: Skip reset error status for psp v13_0_0	2022-09-13 14:32:59 -04:00
amdkfd	drm/amdkfd: Migrate in CPU page fault use current mm	2022-09-13 14:32:05 -04:00
display	drm/amd/display: Correct I2C register offset	2022-09-13 14:32:59 -04:00
include	drm/amd/amdgpu: update GC 10.3.0 pwrdec	2022-09-13 12:54:23 -04:00
pm	drm/amd/pm: disable BACO entry/exit completely on several sienna cichlid cards	2022-09-13 12:54:22 -04:00