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It contains: - compilation warning fixes for SAMA5D2 - updates for all AT91 device tree to use generic name for reset controller - reset controller node for SAMA7G5 - MCAN1 and UDPHS nodes for LAN966 SoCs - Flexcom3 bindings were updated for lan966x-pcb8291.dts board to cope with reality -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCYsPyogAKCRCejrg/N2X7 /Uq7AQCAKfITIfmP9EY0JGuhJqBNNGckbCEkFLbixz6uj5TFNAEAxoJmmcL5cj9m wUczRNYOD8wW7R1GoLOsHF95pwJvhgI= =rxjU -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLFdTYACgkQmmx57+YA GNk3Dw/9EQXALu+c9PNgJ5nNwBH0NifSYVAS6K/nPbbVUGfp8kJaPBkHfFWjJzPd F+cEK31mp28kwA9GQTlAkkWIomrBDRsl+Xe4Dmwtbno4AkfsvsTskFWAdmgDMHGb GAasQGXPfr6e+KvTARcUYvA4ff4GkZG+d3o8sCEs001PGVTHHBLC5Od0ezBxA3OO JWG1Giruy/u8v+9zjmEmgJEAp7XIt+f2kPI4qCxT/okLAmX5fk+IL/eybys1ASXi g4qFHXwT/pH5DrBmFlBpCz4gYZ2PKqfSOz25xvP167Crtv7HUrvmfoI+SEzzlzbr mfHSVTbGfgJ23aFhW5pSAm8X8P1gMMfPgRSJaX/QUb61+tWnX+E13H6WsvwL5hBw Ybbn2KB1qSXWXbtAFehMcTxmUnXMD8rzZ1pHGRl8JeJJ0Al4sxutPVSLgKivQ4RT 6SHBG5jlQ+VEw15AsvmRgdnDuLcqU/7pHh3BOWArnwsymsq00kmwBEsyahoWZZoV REneCjaX9kwzKGdS7jYZFUp8001VKjR7IYuGrsX4sal0+5c56Keg0YfZLc0U+Ss4 NTLTbb5rzx2M0zyxqmc9vqOagwYacdgMrCbgRVIW1uB4UfCjO4G/94FIZjXgQ9rz hv2GX0iHgYKpAPgOcvV8NoRa/t4zMAXNuer+5oMiW27H2E4NzXY= =182f -----END PGP SIGNATURE----- Merge tag 'at91-dt-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt AT91 DT for v5.20 It contains: - compilation warning fixes for SAMA5D2 - updates for all AT91 device tree to use generic name for reset controller - reset controller node for SAMA7G5 - MCAN1 and UDPHS nodes for LAN966 SoCs - Flexcom3 bindings were updated for lan966x-pcb8291.dts board to cope with reality * tag 'at91-dt-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: lan966x: Add UDPHS support dt-bindings: usb: atmel: Add Microchip LAN9662 compatible string ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings. ARM: dts: lan966x: Add mcan1 node. ARM: dts: at91: sama7g5: add reset-controller node ARM: dts: at91: use generic name for reset controller ARM: dts: at91: sama5d2: fix compilation warning ARM: dts: at91: sama5d2: fix compilation warning Link: https://lore.kernel.org/r/20220705084637.818216-1-claudiu.beznea@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
166 lines
3.5 KiB
Plaintext
166 lines
3.5 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
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*
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* Copyright (c) 2017, Microchip Technology Inc.
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* 2017 Cristian Birsan <cristian.birsan@microchip.com>
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* 2017 Claudiu Beznea <claudiu.beznea@microchip.com>
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*/
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#include "sama5d2.dtsi"
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#include "sama5d2-pinfunc.h"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Atmel SAMA5D27 SoM1";
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compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
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aliases {
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i2c0 = &i2c0;
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};
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clocks {
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slow_xtal {
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clock-frequency = <32768>;
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};
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main_xtal {
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clock-frequency = <24000000>;
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};
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};
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ahb {
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sdmmc0: sdio-host@a0000000 {
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microchip,sdcal-inverted;
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};
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apb {
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qspi1: spi@f0024000 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_qspi1_default>;
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <80000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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m25p,fast-read;
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at91bootstrap@0 {
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label = "at91bootstrap";
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reg = <0x00000000 0x00040000>;
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};
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bootloader@40000 {
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label = "bootloader";
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reg = <0x00040000 0x000c0000>;
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};
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bootloaderenvred@100000 {
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label = "bootloader env redundant";
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reg = <0x00100000 0x00040000>;
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};
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bootloaderenv@140000 {
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label = "bootloader env";
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reg = <0x00140000 0x00040000>;
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};
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dtb@180000 {
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label = "device tree";
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reg = <0x00180000 0x00080000>;
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};
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kernel@200000 {
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label = "kernel";
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reg = <0x00200000 0x00600000>;
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};
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};
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};
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macb0: ethernet@f8008000 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_macb0_default>;
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#address-cells = <1>;
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#size-cells = <0>;
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phy-mode = "rmii";
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ethernet-phy@7 {
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reg = <0x7>;
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interrupt-parent = <&pioA>;
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interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_macb0_phy_irq>;
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};
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};
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i2c0: i2c@f8028000 {
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dmas = <0>, <0>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c0_default>;
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pinctrl-1 = <&pinctrl_i2c0_gpio>;
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sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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at24@50 {
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compatible = "atmel,24c02";
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reg = <0x50>;
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pagesize = <8>;
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};
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};
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pinctrl@fc038000 {
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pinctrl_i2c0_default: i2c0_default {
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pinmux = <PIN_PD21__TWD0>,
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<PIN_PD22__TWCK0>;
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bias-disable;
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};
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pinctrl_i2c0_gpio: i2c0_gpio {
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pinmux = <PIN_PD21__GPIO>,
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<PIN_PD22__GPIO>;
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bias-disable;
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};
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pinctrl_qspi1_default: qspi1_default {
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sck_cs {
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pinmux = <PIN_PB5__QSPI1_SCK>,
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<PIN_PB6__QSPI1_CS>;
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bias-disable;
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};
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data {
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pinmux = <PIN_PB7__QSPI1_IO0>,
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<PIN_PB8__QSPI1_IO1>,
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<PIN_PB9__QSPI1_IO2>,
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<PIN_PB10__QSPI1_IO3>;
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bias-pull-up;
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};
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};
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pinctrl_macb0_default: macb0_default {
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pinmux = <PIN_PD9__GTXCK>,
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<PIN_PD10__GTXEN>,
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<PIN_PD11__GRXDV>,
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<PIN_PD12__GRXER>,
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<PIN_PD13__GRX0>,
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<PIN_PD14__GRX1>,
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<PIN_PD15__GTX0>,
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<PIN_PD16__GTX1>,
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<PIN_PD17__GMDC>,
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<PIN_PD18__GMDIO>;
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bias-disable;
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};
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pinctrl_macb0_phy_irq: macb0_phy_irq {
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pinmux = <PIN_PD31__GPIO>;
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bias-disable;
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};
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};
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};
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};
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};
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