Nicholas Piggin 4c93c2e4b9 powerpc/qspinlock: use a half-word store to unlock to avoid larx/stcx. ... The first 16 bits of the lock are only modified by the owner, and other modifications always use atomic operations on the entire 32 bits, so unlocks can use plain stores on the 16 bits. This is the same kind of optimisation done by core qspinlock code. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20221126095932.1234527-3-npiggin@gmail.com		2022-12-02 17:48:49 +11:00
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asm	powerpc/qspinlock: use a half-word store to unlock to avoid larx/stcx.	2022-12-02 17:48:49 +11:00
uapi/asm	powerpc/bpf: Fix use of user_pt_regs in uapi	2022-06-29 20:43:04 +10:00