Imre Deak 4a4064ad79 drm/i915/tgl: Make sure TC-cold is blocked before enabling TC AUX power wells ... The dependency between power wells is determined by the ordering of the power well list: when enabling the power wells for a domain, this happens walking the power well list forward, while disabling them happens in the reverse direction. Accordingly a power well on the list must follow any other power well it depends on. Since the TC AUX power wells depend on TC-cold being blocked, move the TC-cold off power well before all AUX power wells. Fixes: 3c02934b24 ("drm/i915/tc/tgl: Implement TC cold sequences") Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200720232952.16228-1-imre.deak@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> (cherry picked from commit b302a2e688) Signed-off-by: Jani Nikula <jani.nikula@intel.com>		2020-08-19 15:23:43 +03:00
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drm	drm/i915/tgl: Make sure TC-cold is blocked before enabling TC AUX power wells	2020-08-19 15:23:43 +03:00
host1x	gpu: host1x: debug: Dump push buffer state	2020-07-17 16:06:14 +02:00
ipu-v3	gpu: ipu-v3: image-convert: Wait for all EOFs before completing a tile	2020-07-20 15:16:05 +02:00
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vga	vgaarb: mark vga_tryget static	2020-08-01 11:28:17 +02:00
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