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437b6b3536
This enables the parisc to use <asm-generic/io.h> to fill in the missing (undefined) [read|write]sq I/O accessor functions. This is needed if parisc[64] ever wants to uses CONFIG_REGMAP_MMIO which has been patches to use accelerated _noinc accessors such as readsq/writesq that parisc64, while being a 64bit platform, as of now not yet provide. This comes with the requirement that everything the architecture already provides needs to be defined, rather than just being, say, static inline functions. Bite the bullet and just provide the definitions and make it work. Compile-tested on parisc32 and parisc64. Drop some of the __raw functions that now get implemented in <asm-generic/io.h>. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Cc: James E.J. Bottomley <James.Bottomley@HansenPartnership.com> Cc: Helge Deller <deller@gmx.de> Cc: linux-parisc@vger.kernel.org Cc: linux-arch@vger.kernel.org Cc: Mark Brown <broonie@kernel.org> Cc: John David Anglin <dave.anglin@bell.net> Link: https://lore.kernel.org/linux-arm-kernel/62fcc351.hAyADB%2FY8JTxz+kh%25lkp@intel.com/ Signed-off-by: Arnd Bergmann <arnd@arndb.de>
274 lines
6.7 KiB
C
274 lines
6.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_IO_H
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#define _ASM_IO_H
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#include <linux/types.h>
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#include <linux/pgtable.h>
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#define virt_to_phys(a) ((unsigned long)__pa(a))
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#define phys_to_virt(a) __va(a)
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static inline unsigned long isa_bus_to_virt(unsigned long addr) {
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BUG();
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return 0;
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}
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static inline unsigned long isa_virt_to_bus(void *addr) {
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BUG();
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return 0;
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}
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/*
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* Memory mapped I/O
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*
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* readX()/writeX() do byteswapping and take an ioremapped address
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* __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
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* gsc_*() don't byteswap and operate on physical addresses;
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* eg dev->hpa or 0xfee00000.
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*/
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static inline unsigned char gsc_readb(unsigned long addr)
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{
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long flags;
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unsigned char ret;
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__asm__ __volatile__(
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" rsm %3,%0\n"
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" ldbx 0(%2),%1\n"
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" mtsm %0\n"
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: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );
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return ret;
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}
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static inline unsigned short gsc_readw(unsigned long addr)
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{
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long flags;
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unsigned short ret;
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__asm__ __volatile__(
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" rsm %3,%0\n"
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" ldhx 0(%2),%1\n"
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" mtsm %0\n"
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: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );
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return ret;
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}
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static inline unsigned int gsc_readl(unsigned long addr)
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{
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u32 ret;
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__asm__ __volatile__(
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" ldwax 0(%1),%0\n"
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: "=r" (ret) : "r" (addr) );
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return ret;
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}
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static inline unsigned long long gsc_readq(unsigned long addr)
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{
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unsigned long long ret;
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#ifdef CONFIG_64BIT
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__asm__ __volatile__(
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" ldda 0(%1),%0\n"
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: "=r" (ret) : "r" (addr) );
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#else
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/* two reads may have side effects.. */
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ret = ((u64) gsc_readl(addr)) << 32;
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ret |= gsc_readl(addr+4);
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#endif
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return ret;
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}
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static inline void gsc_writeb(unsigned char val, unsigned long addr)
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{
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long flags;
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__asm__ __volatile__(
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" rsm %3,%0\n"
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" stbs %1,0(%2)\n"
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" mtsm %0\n"
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: "=&r" (flags) : "r" (val), "r" (addr), "i" (PSW_SM_D) );
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}
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static inline void gsc_writew(unsigned short val, unsigned long addr)
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{
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long flags;
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__asm__ __volatile__(
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" rsm %3,%0\n"
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" sths %1,0(%2)\n"
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" mtsm %0\n"
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: "=&r" (flags) : "r" (val), "r" (addr), "i" (PSW_SM_D) );
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}
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static inline void gsc_writel(unsigned int val, unsigned long addr)
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{
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__asm__ __volatile__(
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" stwas %0,0(%1)\n"
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: : "r" (val), "r" (addr) );
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}
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static inline void gsc_writeq(unsigned long long val, unsigned long addr)
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{
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#ifdef CONFIG_64BIT
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__asm__ __volatile__(
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" stda %0,0(%1)\n"
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: : "r" (val), "r" (addr) );
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#else
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/* two writes may have side effects.. */
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gsc_writel(val >> 32, addr);
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gsc_writel(val, addr+4);
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#endif
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}
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/*
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* The standard PCI ioremap interfaces
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*/
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void __iomem *ioremap(unsigned long offset, unsigned long size);
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#define ioremap_wc ioremap
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#define ioremap_uc ioremap
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#define pci_iounmap pci_iounmap
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extern void iounmap(const volatile void __iomem *addr);
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void memset_io(volatile void __iomem *addr, unsigned char val, int count);
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void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
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void memcpy_toio(volatile void __iomem *dst, const void *src, int count);
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#define memset_io memset_io
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#define memcpy_fromio memcpy_fromio
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#define memcpy_toio memcpy_toio
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/* Port-space IO */
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#define inb_p inb
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#define inw_p inw
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#define inl_p inl
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#define outb_p outb
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#define outw_p outw
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#define outl_p outl
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extern unsigned char eisa_in8(unsigned short port);
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extern unsigned short eisa_in16(unsigned short port);
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extern unsigned int eisa_in32(unsigned short port);
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extern void eisa_out8(unsigned char data, unsigned short port);
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extern void eisa_out16(unsigned short data, unsigned short port);
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extern void eisa_out32(unsigned int data, unsigned short port);
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#if defined(CONFIG_PCI)
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extern unsigned char inb(int addr);
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extern unsigned short inw(int addr);
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extern unsigned int inl(int addr);
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extern void outb(unsigned char b, int addr);
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extern void outw(unsigned short b, int addr);
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extern void outl(unsigned int b, int addr);
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#define inb inb
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#define inw inw
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#define inl inl
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#define outb outb
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#define outw outw
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#define outl outl
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#elif defined(CONFIG_EISA)
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#define inb eisa_in8
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#define inw eisa_in16
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#define inl eisa_in32
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#define outb eisa_out8
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#define outw eisa_out16
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#define outl eisa_out32
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#else
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static inline char inb(unsigned long addr)
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{
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BUG();
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return -1;
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}
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static inline short inw(unsigned long addr)
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{
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BUG();
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return -1;
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}
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static inline int inl(unsigned long addr)
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{
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BUG();
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return -1;
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}
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#define inb inb
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#define inw inw
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#define inl inl
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#define outb(x, y) ({(void)(x); (void)(y); BUG(); 0;})
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#define outw(x, y) ({(void)(x); (void)(y); BUG(); 0;})
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#define outl(x, y) ({(void)(x); (void)(y); BUG(); 0;})
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#endif
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/*
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* String versions of in/out ops:
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*/
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extern void insb (unsigned long port, void *dst, unsigned long count);
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extern void insw (unsigned long port, void *dst, unsigned long count);
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extern void insl (unsigned long port, void *dst, unsigned long count);
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extern void outsb (unsigned long port, const void *src, unsigned long count);
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extern void outsw (unsigned long port, const void *src, unsigned long count);
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extern void outsl (unsigned long port, const void *src, unsigned long count);
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#define insb insb
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#define insw insw
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#define insl insl
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#define outsb outsb
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#define outsw outsw
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#define outsl outsl
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/* IO Port space is : BBiiii where BB is HBA number. */
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#define IO_SPACE_LIMIT 0x00ffffff
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/* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
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* bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
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* mode (essentially just sign extending. This macro takes in a 32
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* bit I/O address (still with the leading f) and outputs the correct
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* value for either 32 or 64 bit mode */
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#define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))
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#define ioread64 ioread64
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#define ioread64be ioread64be
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#define iowrite64 iowrite64
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#define iowrite64be iowrite64be
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extern u64 ioread64(const void __iomem *addr);
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extern u64 ioread64be(const void __iomem *addr);
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extern void iowrite64(u64 val, void __iomem *addr);
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extern void iowrite64be(u64 val, void __iomem *addr);
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#include <asm-generic/iomap.h>
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/*
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* These get provided from <asm-generic/iomap.h> since parisc does not
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* select GENERIC_IOMAP.
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*/
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#define ioport_map ioport_map
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#define ioport_unmap ioport_unmap
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#define ioread8 ioread8
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#define ioread16 ioread16
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#define ioread32 ioread32
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#define ioread16be ioread16be
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#define ioread32be ioread32be
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#define iowrite8 iowrite8
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#define iowrite16 iowrite16
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#define iowrite32 iowrite32
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#define iowrite16be iowrite16be
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#define iowrite32be iowrite32be
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#define ioread8_rep ioread8_rep
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#define ioread16_rep ioread16_rep
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#define ioread32_rep ioread32_rep
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#define iowrite8_rep iowrite8_rep
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#define iowrite16_rep iowrite16_rep
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#define iowrite32_rep iowrite32_rep
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/*
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* Convert a physical pointer to a virtual kernel pointer for /dev/mem
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* access
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*/
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#define xlate_dev_mem_ptr(p) __va(p)
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extern int devmem_is_allowed(unsigned long pfn);
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#include <asm-generic/io.h>
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#endif
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