Horace Chen 4215a11923 drm/amdgpu: enable one vf mode on sienna cichlid vf ... sienna cichlid needs one vf mode which allows vf to set and get clock status from guest vm. So now expose the required interface and allow some smu request on VF mode. Also since this asic blocked direct MMIO access, use KIQ to send SMU request under sriov vf. OD use same command as getting pp table which is not allowed for sienna cichlid, so remove OD feature under sriov vf. Signed-off-by: Horace Chen <horace.chen@amd.com> Reviewed-by: Monk Liu<monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-03-05 15:10:35 -05:00
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inc	drm/amd/pm: update existing gpu_metrics interfaces V2	2021-03-05 15:10:28 -05:00
powerplay	amdgpu/pm: read_sensor() report failure apporpriately	2021-02-26 17:23:49 -05:00
swsmu	drm/amdgpu: enable one vf mode on sienna cichlid vf	2021-03-05 15:10:35 -05:00
amdgpu_dpm.c	amdgpu/pm: Powerplay API for smu , changed 4 dpm functions to use API	2021-02-26 17:19:08 -05:00
amdgpu_pm.c	drm/amdgpu: enable one vf mode on sienna cichlid vf	2021-03-05 15:10:35 -05:00
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