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185f93f304
On newer platforms the HuC survives reset and stays authenticated, so no need to re-authenticate it. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Alan Previn <alan.previn.teres.alexis@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
148 lines
3.1 KiB
C
148 lines
3.1 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2022 Intel Corporation
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*/
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#include "xe_huc.h"
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#include "regs/xe_guc_regs.h"
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#include "xe_assert.h"
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#include "xe_bo.h"
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#include "xe_device.h"
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#include "xe_force_wake.h"
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#include "xe_gt.h"
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#include "xe_guc.h"
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#include "xe_mmio.h"
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#include "xe_uc_fw.h"
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static struct xe_gt *
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huc_to_gt(struct xe_huc *huc)
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{
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return container_of(huc, struct xe_gt, uc.huc);
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}
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static struct xe_device *
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huc_to_xe(struct xe_huc *huc)
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{
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return gt_to_xe(huc_to_gt(huc));
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}
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static struct xe_guc *
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huc_to_guc(struct xe_huc *huc)
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{
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return &container_of(huc, struct xe_uc, huc)->guc;
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}
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int xe_huc_init(struct xe_huc *huc)
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{
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struct xe_gt *gt = huc_to_gt(huc);
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struct xe_tile *tile = gt_to_tile(gt);
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struct xe_device *xe = gt_to_xe(gt);
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int ret;
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huc->fw.type = XE_UC_FW_TYPE_HUC;
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/* On platforms with a media GT the HuC is only available there */
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if (tile->media_gt && (gt != tile->media_gt)) {
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xe_uc_fw_change_status(&huc->fw, XE_UC_FIRMWARE_NOT_SUPPORTED);
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return 0;
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}
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ret = xe_uc_fw_init(&huc->fw);
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if (ret)
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goto out;
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if (!xe_uc_fw_is_enabled(&huc->fw))
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return 0;
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xe_uc_fw_change_status(&huc->fw, XE_UC_FIRMWARE_LOADABLE);
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return 0;
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out:
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drm_err(&xe->drm, "HuC init failed with %d", ret);
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return ret;
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}
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int xe_huc_upload(struct xe_huc *huc)
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{
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if (!xe_uc_fw_is_loadable(&huc->fw))
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return 0;
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return xe_uc_fw_upload(&huc->fw, 0, HUC_UKERNEL);
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}
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int xe_huc_auth(struct xe_huc *huc)
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{
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struct xe_device *xe = huc_to_xe(huc);
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struct xe_gt *gt = huc_to_gt(huc);
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struct xe_guc *guc = huc_to_guc(huc);
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int ret;
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if (!xe_uc_fw_is_loadable(&huc->fw))
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return 0;
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xe_assert(xe, !xe_uc_fw_is_running(&huc->fw));
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/* On newer platforms the HuC survives reset, so no need to re-auth */
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if (xe_mmio_read32(gt, HUC_KERNEL_LOAD_INFO) & HUC_LOAD_SUCCESSFUL) {
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xe_uc_fw_change_status(&huc->fw, XE_UC_FIRMWARE_RUNNING);
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return 0;
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}
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if (!xe_uc_fw_is_loaded(&huc->fw))
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return -ENOEXEC;
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ret = xe_guc_auth_huc(guc, xe_bo_ggtt_addr(huc->fw.bo) +
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xe_uc_fw_rsa_offset(&huc->fw));
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if (ret) {
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drm_err(&xe->drm, "HuC: GuC did not ack Auth request %d\n",
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ret);
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goto fail;
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}
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ret = xe_mmio_wait32(gt, HUC_KERNEL_LOAD_INFO, HUC_LOAD_SUCCESSFUL,
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HUC_LOAD_SUCCESSFUL, 100000, NULL, false);
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if (ret) {
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drm_err(&xe->drm, "HuC: Firmware not verified %d\n", ret);
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goto fail;
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}
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xe_uc_fw_change_status(&huc->fw, XE_UC_FIRMWARE_RUNNING);
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drm_dbg(&xe->drm, "HuC authenticated\n");
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return 0;
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fail:
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drm_err(&xe->drm, "HuC authentication failed %d\n", ret);
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xe_uc_fw_change_status(&huc->fw, XE_UC_FIRMWARE_LOAD_FAIL);
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return ret;
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}
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void xe_huc_sanitize(struct xe_huc *huc)
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{
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if (!xe_uc_fw_is_loadable(&huc->fw))
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return;
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xe_uc_fw_change_status(&huc->fw, XE_UC_FIRMWARE_LOADABLE);
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}
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void xe_huc_print_info(struct xe_huc *huc, struct drm_printer *p)
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{
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struct xe_gt *gt = huc_to_gt(huc);
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int err;
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xe_uc_fw_print(&huc->fw, p);
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if (!xe_uc_fw_is_enabled(&huc->fw))
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return;
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err = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
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if (err)
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return;
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drm_printf(p, "\nHuC status: 0x%08x\n",
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xe_mmio_read32(gt, HUC_KERNEL_LOAD_INFO));
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xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
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}
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