Jitao Shi 3c6bd94d32 drm/mediatek: add dsi reg commit disable control ... New DSI IP has shadow register and working reg. The register values are writen to shadow register. And then trigger with commit reg, the register values will be moved working register. This function is default on. But this driver doesn't use this function. So add the disable control. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>		2019-10-07 12:29:38 +08:00
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drm	drm/mediatek: add dsi reg commit disable control	2019-10-07 12:29:38 +08:00
host1x
ipu-v3	gpu: ipu-v3: image-convert: only sample into the next tile if necessary	2019-08-19 16:25:30 +02:00
vga
Makefile