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5b179fe052
* The text patching global icache flush has been reintroduced. * A fix for the syscall entry code to correctly initialize a0, which manifests as a bug in strace. * XIP kernels now map the entire kernel, which fixes boot under at least DEBUG_VIRTUAL=y. * The acpi_early_node_map initializer now initializes all nodes. * A fix for a OOB access in the Andes vendor extension probing code. * A new key for scalar misaligned access performance in hwprobe, which correctly treat the values as an enum (as opposed to a bitmap). -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAma/ahUTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYicI3D/9BfuMfVsx+L6KlSCQxEtAZeB5w6soD ptwHIeExZhu2H+RRc2Ej76TQtzRL2Zd5xJtLf6kfvtzeG45y5Ic3Lal08Q4YNkLh ivFIvFPFxAo5QdyxLmEgUbyJf4DERESb/9I68KIJvo0nBMhd5B8kKqGAcCgQXtZP tnqLuO0cok4lK/BSbJrC5VkkBZbM5seH4hdwNOh3U8dyb9DEyrSNYXNHU7axCorJ TTcnRlsBzBQPyNyaXDN0w6Yp1yA3eCs20dvTf0AQW3iBEboIIYV1hbk+dMDgJNgB JyOz3nRcjncw2+S+zeshiHu62SfjyrhCCZQCC+2ssJKbSqIlZh6C+sZfQpPGe8RH fK1QoVHbcBKO+zNsTK58oVxK+yQhZhbAHE5WvZ7ZsPw7/Aa7Y2kRUbfG7GoUYgej Hvb3GVTsiIJc0CO4TkjojBoAbyiY0fCnDzVUn5esZylRcCx1OI2mMRIDWUpbVnsM LORkK/vVTaR2JebCqoTLMpjbjFyxrRfeuv+nDFP/NaW0HO/poX0n5Zk175kgPtpv AwdkQvuaw5notNPVDd2mpr+fwCibwEYO4kh4jtuAun07sQPA2KXJrUKSt4Y8rt4D cmBI+YJDx5Y1kUWnCyIzvggMGDQXvBlepjbhZ9IBIWL5JHozil0Mc1FIC7tH4JhS yc1SYS1+7r2gEg== =dO3Z -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.11-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Palmer Dabbelt: - reintroduce the text patching global icache flush - fix syscall entry code to correctly initialize a0, which manifested as a strace bug - XIP kernels now map the entire kernel, which fixes boot under at least DEBUG_VIRTUAL=y - initialize all nodes in the acpi_early_node_map initializer - fix OOB access in the Andes vendor extension probing code - A new key for scalar misaligned access performance in hwprobe, which correctly treat the values as an enum (as opposed to a bitmap) * tag 'riscv-for-linus-6.11-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Fix out-of-bounds when accessing Andes per hart vendor extension array RISC-V: hwprobe: Add SCALAR to misaligned perf defines RISC-V: hwprobe: Add MISALIGNED_PERF key RISC-V: ACPI: NUMA: initialize all values of acpi_early_node_map to NUMA_NO_NODE riscv: change XIP's kernel_map.size to be size of the entire kernel riscv: entry: always initialize regs->a0 to -ENOSYS riscv: Re-introduce global icache flush in patch_text_XXX() |
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