Roger Chen 7f186025c7 GMAC: modify CRU config for Rockchip RK3288 SoCs integrated GMAC ... modify CRU config for GMAC driver changes since v2: 1. remove SCLK_MAC_PLL Signed-off-by: Roger Chen <roger.chen@rock-chips.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2014-12-31 19:14:18 -05:00
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clk-cpu.c	clk: rockchip: add new clock-type for the cpuclk	2014-09-27 17:57:41 +02:00
clk-mmc-phase.c	clk: rockchip: Add support for the mmc clock phases using the framework	2014-11-28 00:44:24 +01:00
clk-pll.c	clk: rockchip: add optional sync to pll rate parameters	2014-11-25 09:57:18 +01:00
clk-rk3188.c	clk: rockchip: add ROCKCHIP_PLL_SYNC_RATE flag to some plls	2014-11-25 09:57:22 +01:00
clk-rk3288.c	GMAC: modify CRU config for Rockchip RK3288 SoCs integrated GMAC	2014-12-31 19:14:18 -05:00
clk-rockchip.c	clk: rockchip: fix function type for CLK_OF_DECLARE	2014-05-20 14:25:22 -05:00
clk.c	- clock phase setting capability for the rk3288 mmc clocks	2014-11-28 21:00:16 -08:00
clk.h	clk: rockchip: Add support for the mmc clock phases using the framework	2014-11-28 00:44:24 +01:00
Makefile	clk: rockchip: Add support for the mmc clock phases using the framework	2014-11-28 00:44:24 +01:00
softrst.c	clk: rockchip: add reset controller	2014-07-13 12:17:07 -07:00