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33634e42e3
PVOP_VCALL4() is only used for Xen PV, while PVOP_CALL4() isn't used at all. Keep PVOP_CALL4() for 64 bits due to symmetry reasons. This allows to remove the 32-bit definitions of those macros leading to a substantial simplification of the paravirt macros, as those were the only ones needing non-empty "pre" and "post" parameters. PVOP_CALLEE2() and PVOP_VCALLEE2() are used nowhere, so remove them. Another no longer needed case is special handling of return types larger than unsigned long. Replace that with a BUILD_BUG_ON(). DISABLE_INTERRUPTS() is used in 32-bit code only, so it can just be replaced by cli. INTERRUPT_RETURN in 32-bit code can be replaced by iret. ENABLE_INTERRUPTS is used nowhere, so it can be removed. Signed-off-by: Juergen Gross <jgross@suse.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20210311142319.4723-10-jgross@suse.com
153 lines
2.9 KiB
C
153 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _X86_IRQFLAGS_H_
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#define _X86_IRQFLAGS_H_
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#include <asm/processor-flags.h>
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#ifndef __ASSEMBLY__
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#include <asm/nospec-branch.h>
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/* Provide __cpuidle; we can't safely include <linux/cpu.h> */
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#define __cpuidle __section(".cpuidle.text")
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/*
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* Interrupt control:
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*/
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/* Declaration required for gcc < 4.9 to prevent -Werror=missing-prototypes */
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extern inline unsigned long native_save_fl(void);
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extern __always_inline unsigned long native_save_fl(void)
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{
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unsigned long flags;
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/*
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* "=rm" is safe here, because "pop" adjusts the stack before
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* it evaluates its effective address -- this is part of the
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* documented behavior of the "pop" instruction.
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*/
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asm volatile("# __raw_save_flags\n\t"
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"pushf ; pop %0"
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: "=rm" (flags)
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: /* no input */
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: "memory");
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return flags;
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}
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static __always_inline void native_irq_disable(void)
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{
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asm volatile("cli": : :"memory");
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}
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static __always_inline void native_irq_enable(void)
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{
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asm volatile("sti": : :"memory");
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}
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static inline __cpuidle void native_safe_halt(void)
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{
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mds_idle_clear_cpu_buffers();
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asm volatile("sti; hlt": : :"memory");
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}
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static inline __cpuidle void native_halt(void)
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{
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mds_idle_clear_cpu_buffers();
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asm volatile("hlt": : :"memory");
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}
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#endif
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#ifdef CONFIG_PARAVIRT_XXL
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#include <asm/paravirt.h>
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#else
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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static __always_inline unsigned long arch_local_save_flags(void)
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{
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return native_save_fl();
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}
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static __always_inline void arch_local_irq_disable(void)
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{
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native_irq_disable();
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}
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static __always_inline void arch_local_irq_enable(void)
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{
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native_irq_enable();
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}
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/*
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* Used in the idle loop; sti takes one instruction cycle
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* to complete:
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*/
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static inline __cpuidle void arch_safe_halt(void)
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{
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native_safe_halt();
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}
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/*
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* Used when interrupts are already enabled or to
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* shutdown the processor:
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*/
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static inline __cpuidle void halt(void)
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{
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native_halt();
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}
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/*
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* For spinlocks, etc:
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*/
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static __always_inline unsigned long arch_local_irq_save(void)
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{
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unsigned long flags = arch_local_save_flags();
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arch_local_irq_disable();
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return flags;
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}
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#else
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#ifdef CONFIG_X86_64
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#ifdef CONFIG_DEBUG_ENTRY
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#define SAVE_FLAGS(x) pushfq; popq %rax
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#endif
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#define INTERRUPT_RETURN jmp native_iret
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_PARAVIRT_XXL */
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#ifndef __ASSEMBLY__
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static __always_inline int arch_irqs_disabled_flags(unsigned long flags)
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{
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return !(flags & X86_EFLAGS_IF);
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}
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static __always_inline int arch_irqs_disabled(void)
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{
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unsigned long flags = arch_local_save_flags();
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return arch_irqs_disabled_flags(flags);
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}
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static __always_inline void arch_local_irq_restore(unsigned long flags)
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{
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if (!arch_irqs_disabled_flags(flags))
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arch_local_irq_enable();
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}
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#else
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#ifdef CONFIG_X86_64
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#ifdef CONFIG_XEN_PV
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#define SWAPGS ALTERNATIVE "swapgs", "", X86_FEATURE_XENPV
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#else
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#define SWAPGS swapgs
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#endif
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#endif
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#endif /* !__ASSEMBLY__ */
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#endif
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