Stephen Warren 2f2b7fb202 ARM: tegra: define DT bindings for and instantiate timer ... The Tegra timer provides a number of 29-bit timer channels, a single 32-bit free running counter, and in the Tegra30 variant, 5 watchdog modules. The first two channels may also trigger a legacy watchdog reset. Define a DT binding for this HW module, and add the module into the Tegra device tree files. Signed-off-by: Stephen Warren <swarren@nvidia.com>		2012-11-16 12:22:16 -07:00
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brcm,bcm2835-system-timer.txt	ARM: bcm2835: fix typos in DT binding documentation	2012-10-07 07:02:07 -07:00
nvidia,tegra20-timer.txt	ARM: tegra: define DT bindings for and instantiate timer	2012-11-16 12:22:16 -07:00
nvidia,tegra30-timer.txt	ARM: tegra: define DT bindings for and instantiate timer	2012-11-16 12:22:16 -07:00