Mario Limonciello 2d60ba1bf5 drm/amd: Align SMU11 SMU_MSG_OverridePcieParameters implementation with SMU13 ... SMU13 overrides dynamic PCIe lane width and dynamic speed by when on certain hosts. commit 38e4ced804 ("drm/amd/pm: conditionally disable pcie lane switching for some sienna_cichlid SKUs") worked around this issue by setting up certain SKUs to set up certain limits, but the same fundamental problem with those hosts affects all SMU11 implmentations as well, so align the SMU11 and SMU13 driver handling. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2023-07-12 12:22:31 -04:00
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drm	drm/amd: Align SMU11 SMU_MSG_OverridePcieParameters implementation with SMU13	2023-07-12 12:22:31 -04:00
host1x	drm/tegra: Changes for v6.4-rc1	2023-04-06 15:02:17 +02:00
ipu-v3	ipu-v3: Include <linux/io.h>	2023-05-18 11:06:18 +02:00
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