Trigger Huang 2d11fd3f54 drm/amdgpu: initialize PSP before IH under SR-IOV ... In order to support new PSP feature that PSP may provide interface to program IH CNTL register, initialize PSP before IH under Vega10 SR-IOV VF Signed-off-by: Trigger Huang <Trigger.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-05-24 12:20:50 -05:00
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acp	drm/amdgpu: Remove wrapper layer of cgs irq handling	2018-03-21 14:36:58 -05:00
amdgpu	drm/amdgpu: initialize PSP before IH under SR-IOV	2019-05-24 12:20:50 -05:00
amdkfd	drm/amdkfd: Cosmetic cleanup	2019-05-24 12:20:48 -05:00
display	drm/amd/display: Expose send immediate sdp message interface	2019-05-24 12:20:50 -05:00
include	drm/amdgpu: add df perfmon regs and funcs for xgmi	2019-05-24 12:20:50 -05:00
powerplay	drm/amd/powerplay: expose SMU7 asics realtime memory utilization	2019-05-24 12:20:48 -05:00