Abhinav Kumar 2d0b10fc51 drm/msm: higher values of pclk can exceed 32 bits when multiplied by a factor ... Make the pclk_rate u64 to accommodate higher pixel clock rates. Changes in v3: - Converted pclk_rate to u32 (Archit) - Rebase on dsi cleanup set in msm-next Cc: Sibi Sankar <sibis@codeaurora.org> Cc: Archit Taneja <architt@codeaurora.org> Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>		2018-07-26 10:40:15 -04:00
..
drm	drm/msm: higher values of pclk can exceed 32 bits when multiplied by a factor	2018-07-26 10:40:15 -04:00
host1x	drm for v4.18-rc1	2018-06-06 08:16:33 -07:00
ipu-v3	gpu: ipu-v3: prg: avoid possible array underflow	2018-03-15 17:52:08 +01:00
vga	docs: Fix some broken references	2018-06-15 18:10:01 -03:00
Makefile