Benjamin Herrenschmidt 25642705b2 powerpc/xive: Fix offset for store EOI MMIOs ... Architecturally we should apply a 0x400 offset for these. Not doing it will break future HW implementations. The offset of 0 is supposed to remain for "triggers" though not all sources support both trigger and store EOI, and in P9 specifically, some sources will treat 0 as a store EOI. But future chips will not. So this makes us use the properly architected offset which should work always. Fixes: 243e25112d ("powerpc/xive: Native exploitation of the XIVE interrupt controller") Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>		2017-06-15 23:29:39 +10:00
..
common.c	powerpc/xive: Fix offset for store EOI MMIOs	2017-06-15 23:29:39 +10:00
Kconfig	powerpc/xive: Native exploitation of the XIVE interrupt controller	2017-04-10 21:41:34 +10:00
Makefile	powerpc/xive: Native exploitation of the XIVE interrupt controller	2017-04-10 21:41:34 +10:00
native.c	Merge branch 'kvm-ppc-next' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc into HEAD	2017-05-09 11:50:01 +02:00
xive-internal.h	powerpc/xive: Native exploitation of the XIVE interrupt controller	2017-04-10 21:41:34 +10:00