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e6c7e6216d
The difference between MT8186 and other ICs is that when modifying the
output format, we need to modify the mmsys_base+0x400 register to take
effect. So when setting the dpi output format, we need to call
mtk_mmsys_ddp_dpi_fmt_config to set it to MT8186 synchronously.
Commit a071e52f75d1 ("soc: mediatek: Add mmsys func to adapt to dpi
output for MT8186") lacked some of the possible output formats and also
had a wrong bitmask.
Add the missing output formats and fix the bitmask.
While at it, also update mtk_mmsys_ddp_dpi_fmt_config() to use generic
formats, so that it is slightly easier to extend for other platforms.
Fixes: a071e52f75d1 ("soc: mediatek: Add mmsys func to adapt to dpi output for MT8186")
Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
78 lines
1.6 KiB
C
78 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015 MediaTek Inc.
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*/
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#ifndef __MTK_MMSYS_H
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#define __MTK_MMSYS_H
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enum mtk_ddp_comp_id;
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struct device;
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enum mtk_dpi_out_format_con {
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MTK_DPI_RGB888_SDR_CON,
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MTK_DPI_RGB888_DDR_CON,
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MTK_DPI_RGB565_SDR_CON,
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MTK_DPI_RGB565_DDR_CON
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};
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enum mtk_ddp_comp_id {
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DDP_COMPONENT_AAL0,
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DDP_COMPONENT_AAL1,
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DDP_COMPONENT_BLS,
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DDP_COMPONENT_CCORR,
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DDP_COMPONENT_COLOR0,
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DDP_COMPONENT_COLOR1,
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DDP_COMPONENT_DITHER,
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DDP_COMPONENT_DITHER0 = DDP_COMPONENT_DITHER,
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DDP_COMPONENT_DITHER1,
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DDP_COMPONENT_DP_INTF0,
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DDP_COMPONENT_DP_INTF1,
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DDP_COMPONENT_DPI0,
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DDP_COMPONENT_DPI1,
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DDP_COMPONENT_DSC0,
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DDP_COMPONENT_DSC1,
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DDP_COMPONENT_DSI0,
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DDP_COMPONENT_DSI1,
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DDP_COMPONENT_DSI2,
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DDP_COMPONENT_DSI3,
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DDP_COMPONENT_GAMMA,
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DDP_COMPONENT_MERGE0,
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DDP_COMPONENT_MERGE1,
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DDP_COMPONENT_MERGE2,
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DDP_COMPONENT_MERGE3,
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DDP_COMPONENT_MERGE4,
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DDP_COMPONENT_MERGE5,
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DDP_COMPONENT_OD0,
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DDP_COMPONENT_OD1,
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DDP_COMPONENT_OVL0,
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DDP_COMPONENT_OVL_2L0,
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DDP_COMPONENT_OVL_2L1,
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DDP_COMPONENT_OVL_2L2,
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DDP_COMPONENT_OVL1,
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DDP_COMPONENT_POSTMASK0,
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DDP_COMPONENT_PWM0,
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DDP_COMPONENT_PWM1,
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DDP_COMPONENT_PWM2,
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DDP_COMPONENT_RDMA0,
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DDP_COMPONENT_RDMA1,
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DDP_COMPONENT_RDMA2,
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DDP_COMPONENT_RDMA4,
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DDP_COMPONENT_UFOE,
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DDP_COMPONENT_WDMA0,
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DDP_COMPONENT_WDMA1,
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DDP_COMPONENT_ID_MAX,
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};
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void mtk_mmsys_ddp_connect(struct device *dev,
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enum mtk_ddp_comp_id cur,
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enum mtk_ddp_comp_id next);
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void mtk_mmsys_ddp_disconnect(struct device *dev,
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enum mtk_ddp_comp_id cur,
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enum mtk_ddp_comp_id next);
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void mtk_mmsys_ddp_dpi_fmt_config(struct device *dev, u32 val);
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#endif /* __MTK_MMSYS_H */
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