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36478a74c7
For ICL+ platforms to avoid DMI/OPIO L1 entry during the base firmware load procedure, HW recommends to set LTRP_GB to 95us and start an additional CAPTURE stream in the background. Once the load completes, original LTRP_GB value is restored and the additional stream is released. Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://msgid.link/r/20240220115035.770402-10-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
55 lines
1.4 KiB
C
55 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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//
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// Copyright(c) 2021-2024 Intel Corporation. All rights reserved.
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//
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// Authors: Cezary Rojewski <cezary.rojewski@intel.com>
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// Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
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//
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#include "avs.h"
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static int avs_tgl_dsp_core_power(struct avs_dev *adev, u32 core_mask, bool power)
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{
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core_mask &= AVS_MAIN_CORE_MASK;
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if (!core_mask)
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return 0;
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return avs_dsp_core_power(adev, core_mask, power);
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}
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static int avs_tgl_dsp_core_reset(struct avs_dev *adev, u32 core_mask, bool reset)
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{
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core_mask &= AVS_MAIN_CORE_MASK;
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if (!core_mask)
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return 0;
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return avs_dsp_core_reset(adev, core_mask, reset);
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}
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static int avs_tgl_dsp_core_stall(struct avs_dev *adev, u32 core_mask, bool stall)
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{
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core_mask &= AVS_MAIN_CORE_MASK;
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if (!core_mask)
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return 0;
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return avs_dsp_core_stall(adev, core_mask, stall);
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}
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const struct avs_dsp_ops avs_tgl_dsp_ops = {
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.power = avs_tgl_dsp_core_power,
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.reset = avs_tgl_dsp_core_reset,
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.stall = avs_tgl_dsp_core_stall,
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.irq_handler = avs_irq_handler,
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.irq_thread = avs_cnl_irq_thread,
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.int_control = avs_dsp_interrupt_control,
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.load_basefw = avs_icl_load_basefw,
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.load_lib = avs_hda_load_library,
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.transfer_mods = avs_hda_transfer_modules,
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.log_buffer_offset = avs_icl_log_buffer_offset,
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.log_buffer_status = avs_apl_log_buffer_status,
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.coredump = avs_apl_coredump,
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.d0ix_toggle = avs_icl_d0ix_toggle,
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.set_d0ix = avs_icl_set_d0ix,
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AVS_SET_ENABLE_LOGS_OP(icl)
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};
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