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We found a regression in v5.10 on real-time server, using the rt-kernel and the mgag200 driver. It's some really specialized workload, with <10us latency expectation on isolated core. After the v5.10, the real time tasks missed their <10us latency when something prints on the screen (fbcon or printk) The regression has been bisected to 2 commits: commit0b34d58b6c("drm/mgag200: Enable caching for SHMEM pages") commit4862ffaec5("drm/mgag200: Move vmap out of commit tail") The first one changed the system memory framebuffer from Write-Combine to the default caching. Before the second commit, the mgag200 driver used to unmap the framebuffer after each frame, which implicitly does a cache flush. Both regressions are fixed by this commit, which restore WC mapping for the framebuffer in system memory, and add a cache flush. This is only needed on x86_64, for low-latency workload, so the new kconfig DRM_MGAG200_IOBURST_WORKAROUND depends on PREEMPT_RT and X86. For more context, the whole thread can be found here [1] Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://lore.kernel.org/dri-devel/20231019135655.313759-1-jfalempe@redhat.com/ # 1 Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20240208095125.377908-1-jfalempe@redhat.com
26 lines
945 B
Plaintext
26 lines
945 B
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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config DRM_MGAG200
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tristate "Matrox G200"
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depends on DRM && PCI && MMU
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select DRM_GEM_SHMEM_HELPER
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select DRM_KMS_HELPER
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select I2C
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select I2C_ALGOBIT
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help
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This is a KMS driver for Matrox G200 chips. It supports the original
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MGA G200 desktop chips and the server variants. It requires 0.3.0
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of the modesetting userspace driver, and a version of mga driver
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that will fail on KMS enabled devices.
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config DRM_MGAG200_IOBURST_WORKAROUND
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bool "Disable buffer caching"
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depends on DRM_MGAG200 && PREEMPT_RT && X86
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help
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Enable a workaround to avoid I/O bursts within the mgag200 driver at
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the expense of overall display performance.
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It restores the <v5.10 behavior, by mapping the framebuffer in system
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RAM as Write-Combining, and flushing the cache after each write.
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This is only useful on x86_64 if you want to run processes with
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deterministic latency.
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If unsure, say N.
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