Philipp Zabel 4e3c5d7e05 gpu: ipu-v3: Allow negative offsets for interlaced scanning ... The IPU also supports interlaced buffers that start with the bottom field. To achieve this, the the base address EBA has to be increased by a stride length and the interlace offset ILO has to be set to the negative stride. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>		2018-07-16 16:56:37 +02:00
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ipu-common.c	gpu: ipu-v3: make const arrays int_reg static, shrinks object size	2018-02-16 14:47:43 +01:00
ipu-cpmem.c	gpu: ipu-v3: Allow negative offsets for interlaced scanning	2018-07-16 16:56:37 +02:00
ipu-csi.c	gpu: ipu-v3: csi: support RGB565 on parallel bus	2018-07-16 16:56:37 +02:00
ipu-dc.c	gpu: ipu-v3: ipu-dc: Remove unused 'di' variable	2017-10-04 12:18:56 +02:00
ipu-di.c	gpu: ipu-di: silence videomode logspam	2016-11-09 10:41:14 +01:00
ipu-dmfc.c	gpu: ipu-v3: Do not wait for DMFC FIFO to clear when disabling DMFC channel	2016-08-29 12:45:05 +02:00
ipu-dp.c	drm/imx: add deferred plane disabling	2017-03-15 15:42:29 +01:00
ipu-ic.c	gpu: ipu-v3: allow to build with COMPILE_TEST	2017-12-19 12:49:11 +01:00
ipu-image-convert.c	gpu: ipu-v3: only set non-zero AXI ID for IC when PRG is absent	2017-03-16 10:14:49 +01:00
ipu-pre.c	gpu: ipu-v3: pre: fix device node leak in ipu_pre_lookup_by_phandle	2018-02-19 15:12:59 +01:00
ipu-prg.c	gpu: ipu-v3: prg: avoid possible array underflow	2018-03-15 17:52:08 +01:00
ipu-prv.h	gpu: ipu-v3: pre: add tiled prefetch support	2017-12-19 12:49:11 +01:00
ipu-smfc.c	IPUv3 fixes for v3.18	2014-10-07 14:31:14 +10:00
ipu-vdi.c	gpu: ipu-v3: vdic: include AUTO field order bit in ipu_vdi_set_field_order	2017-06-08 08:57:20 +02:00
Kconfig	gpu: ipu-v3: allow to build with COMPILE_TEST	2017-12-19 12:49:11 +01:00
Makefile	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00