Ville Syrjälä 142d2eca35 drm/i915: Fix chv PCS DW11 register defines ... I managed to fumble the per spline PCS DW11 register defines in: commit 570e2a747b Author: Ville Syrjälä <ville.syrjala@linux.intel.com> Date: Mon Aug 18 14:42:46 2014 +0300 drm/i915: Clear TX FIFO reset master override bits on chv Fortunately the bit in DW0 that was cleared due to this didn't have any effect as long as the bit we meant to clear was already zero. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> [danvet: Fix commit ref as pointed out by Jani.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2014-10-24 16:34:11 +02:00
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drm	drm/i915: Fix chv PCS DW11 register defines	2014-10-24 16:34:11 +02:00
host1x	drm/tegra: Make job submission 64-bit safe	2014-08-04 10:07:36 +02:00
ipu-v3	gpu: ipu-v3: Add ipu_dump()	2014-09-02 14:55:56 +02:00
vga	vgaarb: We can own non-decoded resources	2014-07-08 11:15:09 +10:00
Makefile	gpu: ipu-v3: Move i.MX IPUv3 core driver out of staging	2014-06-04 11:06:52 +02:00