Joseph Gravenor 10bce710fa drm/amd/display: have two different sr and pstate latency tables for renoir ... [Why] new sr and pstate latencies are optimized for the case when we are not using lpddr4 memory [How] have two different wm tables, one for the lpddr case and one for non lpddr case Signed-off-by: Joseph Gravenor <joseph.gravenor@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-12-05 18:17:02 -05:00
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amdgpu_dm	drm/amd/display: add default clocks if not able to fetch them	2019-11-26 12:19:08 -05:00
dc	drm/amd/display: have two different sr and pstate latency tables for renoir	2019-12-05 18:17:02 -05:00
include	drm/amd/display: add new active dongle to existent w/a	2019-10-10 19:33:37 -05:00
modules	drm/amd/display: Only use EETF when maxCL > max display	2019-10-25 16:50:09 -04:00
Kconfig	drm/amd: Fix Kconfig indentation	2019-10-07 15:11:17 -05:00
Makefile	drm/amd/display: Add HDCP module	2019-10-03 09:10:58 -05:00
TODO	drm/amd/display: Convert remaining loggers off dc_logger	2018-07-13 14:48:42 -05:00