George Shen 0d988e5de7 drm/amd/display: Remove CR AUX RD Interval limit for LTTPR ... [Why] DP spec specifies that DPRX shall use the read interval in the TRAINING_AUX_RD_INTERVAL_PHY_REPEATER LTTPR DPCD register. This register's bit definition is the same as the AUX read interval register for DPRX. [How} Remove logic which forces AUX read interval to 100us for repeaters when in LTTPR non-transparent mode. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Wesley Chalmers <wesley.chalmers@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: George Shen <George.Shen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-12-30 08:54:44 -05:00
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acp
amdgpu	drm/amdgpu: Check the memory can be accesssed by ttm_device_clear_dma_mappings.	2021-12-30 08:54:43 -05:00
amdkfd	drm/amdkfd: correct sdma queue number in kfd device init (v3)	2021-12-30 08:54:43 -05:00
display	drm/amd/display: Remove CR AUX RD Interval limit for LTTPR	2021-12-30 08:54:44 -05:00
include	drm/amdgpu: add support for IP discovery gc_info table v2	2021-12-16 14:08:20 -05:00
pm	drm/amdgpu: Only overwrite serial if field is empty	2021-12-30 08:54:43 -05:00