Radhakrishna Sripada 0c7d2aedf5 drm/i915/icl: Add Wa_1406609255 ... Shader feature to prefetch binding tables does not support 16:6 18:8 BTP formats. Enabling fault handling could result in hangs with faults. Disabling demand prefetch would disable binding table prefetch. V2: Fix the stepping rivision to B0(Mika) References: HSDES#1406609255, HSDES#1406573985 Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181004182939.7668-5-radhakrishna.sripada@intel.com		2018-10-09 10:00:29 +03:00
..
drm	drm/i915/icl: Add Wa_1406609255	2018-10-09 10:00:29 +03:00
host1x	gpu: host1x: Check whether size of unpin isn't 0	2018-07-09 10:31:30 +02:00
ipu-v3	drm pull for 4.19-rc1	2018-08-15 17:39:07 -07:00
vga	vga_switcheroo: set audio client id according to bound GPU id	2018-07-17 11:12:00 +02:00
Makefile