Tvrtko Ursulin 0bbfdce345 drm/i915: Fix GEN8_MCR_SELECTOR programming ... fls returns bit positions starting from one for the lsb and the MCR register expects zero based (sub)slice addressing. Incorrent MCR programming can have the effect of directing MMIO reads of registers in the 0xb100-0xb3ff range to invalid subslice returning zeroes instead of actual content. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Fixes: 1e40d4aea5 ("drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads") Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190717180624.20354-2-tvrtko.ursulin@linux.intel.com (cherry picked from commit 15160879d4) Signed-off-by: Jani Nikula <jani.nikula@intel.com>		2019-07-29 15:49:55 +03:00
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drm	drm/i915: Fix GEN8_MCR_SELECTOR programming	2019-07-29 15:49:55 +03:00
host1x	drm/tegra: Changes for v5.3-rc1	2019-06-25 12:59:43 +10:00
ipu-v3	drm main pull request for v5.3-rc1 (sans mm changes)	2019-07-15 19:04:27 -07:00
vga	topic/remove-fbcon-notifiers:	2019-06-26 12:26:34 +02:00
Makefile	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00