Yifan Zhang 0af4ed0c32 drm/amdgpu/mes: zero the sdma_hqd_mask of 2nd SDMA engine for SDMA 6.0.1 ... there is only one SDMA engine in SDMA 6.0.1, the sdma_hqd_mask has to be zeroed for the 2nd engine, otherwise MES scheduler will consider 2nd engine exists and map/unmap SDMA queues to the non-existent engine. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2022-09-14 15:00:34 -04:00
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acp
amdgpu	drm/amdgpu/mes: zero the sdma_hqd_mask of 2nd SDMA engine for SDMA 6.0.1	2022-09-14 15:00:34 -04:00
amdkfd	drm/amdkfd: Fix isa version for the GC 10.3.7	2022-08-25 13:54:08 -04:00
display	drm/amd/display: Mark dml30's UseMinimumDCFCLK() as noinline for stack usage	2022-09-13 14:27:00 -04:00
include	drm/amdgpu: Update mes_v11_api_def.h	2022-08-30 16:56:21 -04:00
pm	drm/amd/pm: disable BACO entry/exit completely on several sienna cichlid cards	2022-09-13 14:25:39 -04:00