Jernej Skrabec 09f380e3ba drm/sun4i: Don't change clock bits in DW HDMI PHY driver ... DW HDMI PHY driver and PHY clock driver share same registers. Make sure that DW HDMI PHY setup code doesn't change any clock related bits. During initialization, set PHY PLL parent bit to 0. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180625120304.7543-18-jernej.skrabec@siol.net		2018-06-27 21:44:00 +02:00
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drm	drm/sun4i: Don't change clock bits in DW HDMI PHY driver	2018-06-27 21:44:00 +02:00
host1x	gpu: host1x: Use not explicitly sized types	2018-05-18 21:51:37 +02:00
ipu-v3	gpu: ipu-v3: prg: avoid possible array underflow	2018-03-15 17:52:08 +01:00
vga	vga_switcheroo: Let HDA autosuspend on mux change	2018-03-13 22:58:49 +01:00
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