Commit Graph

7 Commits

Author SHA1 Message Date
Mauro Carvalho Chehab
9ac2a66158 dt: Fix broken references to renamed docs
Some files got renamed. Those were all fixed automatically by

	./scripts/documentation-file-ref-check --fix

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Link: https://lore.kernel.org/r/6866c0d6d10ce36bb151c2d3752a20eb5122c532.1592203542.git.mchehab+huawei@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
2020-06-18 11:06:24 -06:00
Marco Franchi
dbfdd153d4 dt-bindings: fsl-imx-drm: Remove incorrect "@di0" usage
Improve the binding example by removing the '@di0' notation, which
fixes the following build warning:

Warning (unit_address_vs_reg): Node /display@di0 has a unit name, but
no reg property

Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-10-02 16:19:06 +02:00
Philipp Zabel
13d5aa801f dt-bindings: display: imx: fix parallel display interface-pix-fmt property
The parallel display device tree binding documentation incorrectly lists
the interface-pix-fmt property with underscores ("interface_pix_fmt").
This was never supported by any driver, and the DT example in the same
file always contained the correct spelling ("interface-pix-fmt").

See commit 19022aaae6 ("staging: drm/imx: Add parallel display
support") and commit 2d62da8ebd ("staging: drm/imx: Add devicetree
binding documentation") for reference.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Rob Herring <robh@kernel.org>
2017-08-09 18:32:02 -05:00
Lucas Stach
0d6c9a4244 gpu: ipu-v3: document valid IPUv3 compatibles and extend for i.MX6 QuadPlus
Document the valid compatible strings for the IPUv3.

On i.MX6 QuadPlus the IPU needs to know which PRG has to be
used for this IPU instance. Add a "fsl,prg" property containing
a phandle pointing to the correct PRG device.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-03-16 10:14:22 +01:00
Lucas Stach
63863d43e8 gpu: ipu-v3: add DT binding for the Prefetch Resolve Gasket
This adds the the devicetree binding for the Prefetch Resolve Gasket,
as found on i.MX6 QuadPlus.
The PRG is fairly simple in that it only has a configuration register
range and two clocks, one for the AHB slave port and one for the AXI
ports and the functional units.

The PRE connections need to be described in the DT, as the PRE<->PRG
assignment is a mix between fixed and muxable connections.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-03-15 15:42:36 +01:00
Lucas Stach
dcddda561b gpu: ipu-v3: add DT binding for the Prefetch Resolve Engine
The Prefetch Resolve Engine is a prefetch and tile resolve engine
which prefetches display data from DRAM to an internal SRAM region.
It has a single clock for configuration register access and the
functional units. A single shared interrupt is used for status and
error signaling.

The only external dependency is the SRAM region to use for the
prefetch double buffer.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-03-15 15:42:34 +01:00
Rob Herring
efdbd7345f dt-bindings: consolidate display related bindings
This is a quite large renaming to consolidate display related bindings
into a single "display" directory from various scattered locations of
video, drm, gpu, fb, mipi, and panel. The prior location was somewhat
based on the Linux driver location, but bindings should be independent
of that.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
2015-10-22 09:21:21 -05:00