Commit Graph

18 Commits

Author SHA1 Message Date
Claudiu Beznea
7f41d52ced ARM: dts: at91: sama7g5ek: specify proper regulator output ranges
Min and max output ranges of regulators need to satisfy board
requirements not PMIC requirements. Thus adjust device tree to
cope with this.

Fixes: 7540629e2f ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-7-claudiu.beznea@microchip.com
2022-08-31 10:28:19 +03:00
Krzysztof Kozlowski
17413b15ed ARM: dts: at91: align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220616005333.18491-38-krzysztof.kozlowski@linaro.org
2022-06-27 10:52:42 +02:00
Arnd Bergmann
2ef306e16e AT91 DT #2 for 5.19:
- at91: more DT compliance updates for RTC and RTT nodes
 - at91: sama7g5: add microphone support
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Merge tag 'at91-dt-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/late

AT91 DT #2 for 5.19:

- at91: more DT compliance updates for RTC and RTT nodes
- at91: sama7g5: add microphone support

* tag 'at91-dt-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sama7g5ek: add node for PDMC0
  ARM: dts: at91: sama7g5: add nodes for PDMC
  ARM: dts: at91: Use the generic "rtc" node name for the rtt IPs
  ARM: dts: at91: Add the required 'atmel, rtt-rtc-time-reg' property

Link: https://lore.kernel.org/r/20220517153252.92393-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-27 15:56:49 +02:00
Codrin Ciubotariu
821cb05f6b ARM: dts: at91: sama7g5ek: add node for PDMC0
SAMA7G5-EK has 4 PDM microphones connected to PDMC0. PDMC0 pinmux is in
conflict with gmac1, gmac1 being enabled by default.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/all/20220307122202.2251639-6-codrin.ciubotariu@microchip.com
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-17 17:14:42 +02:00
Tudor Ambarus
68a9345536 ARM: dts: at91: sama7g5ek: Align the impedance of the QSPI0's HSIO and PCB lines
The impedance of the QSPI PCB lines on the sama7g5ek is 50 Ohms.
Align the output impedance of the QSPI0 HSIOs by setting a medium drive
strength which corresponds to an impedance of 56 Ohms when VDD is in the
3.0V - 3.6V range. The high drive strength setting corresponds to an
output impedance of 42 Ohms on the QSPI0 HSIOs.

Suggested-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220406130505.422042-1-tudor.ambarus@microchip.com
2022-04-13 18:42:50 +02:00
Eugen Hristev
3f7ce6d709 ARM: dts: at91: sama7g5ek: enable pull-up on flexcom3 console lines
Flexcom3 is used as board console serial. There are no pull-ups on these
lines on the board. This means that if a cable is not connected (that has
pull-ups included), stray characters could appear on the console as the
floating pins voltage levels are interpreted as incoming characters.
To avoid this problem, enable the internal pull-ups on these lines.

Fixes: 7540629e2f ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Cc: stable@vger.kernel.org # v5.15+
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220307113827.2419331-1-eugen.hristev@microchip.com
2022-04-13 18:41:14 +02:00
Claudiu Beznea
85b1304b9d ARM: dts: at91: sama7g5ek: set regulator voltages for standby state
Set regulator voltages for standby state to avoid wrong behavior of
system while in standby. The CPU voltage has been chosen as being the
one corresponding to OPP=600MHz. Next commit will set the 600MHz OPP
as the suspend OPP.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220113144900.906370-8-claudiu.beznea@microchip.com
2022-02-25 11:32:22 +01:00
Claudiu Beznea
279d626d73 ARM: dts: at91: fix low limit for CPU regulator
Fix low limit for CPU regulator. Otherwise setting voltages lower than
1.125V will not be allowed (CPUFreq will not be allowed to set proper
voltages on proper frequencies).

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220113144900.906370-7-claudiu.beznea@microchip.com
2022-02-25 11:32:22 +01:00
Hari Prasath
04956b7216 ARM: dts: at91: sama7g5: Enable can0 and can1 support in sama7g5-ek
Enable the can0 and can1 controllers in sama7g5-ek board along with
its pin mux settings.

Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220222113924.25799-3-Hari.PrasathGE@microchip.com
2022-02-25 11:32:21 +01:00
Tudor Ambarus
078c2a0e8e ARM: dts: at91: sama7g5ek: Add QSPI0 node
QSPI0 comunicates with a MX66LM1G45G SPI NOR flash.
Enable the controller and describe the flash.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211209123643.341892-2-tudor.ambarus@microchip.com
2021-12-13 14:48:04 +01:00
Linus Torvalds
ae45d84fc3 ARM: SoC DT updates for v5.16
This is a rather large update for the ARM devicetree files, after a few
 quieter releases, with 775 total commits and 47 branches pulled into
 this one. There are 5 new SoC types plus some minor variations, and
 a total of 60 new machines, so I'm limiting the summary to the main
 noteworthy items:
 
  - Apple M1 gain support for PCI and pinctrl, getting a bit
    closer to a usable system out of the box.
 
  - Qualcomm gains support for Snapdragon 690 (aka SM6350) as
    well as SM7225, 11 new smartphones, and three additional
    Chromebooks, and improvements all over the place.
 
  - Samsung gains support for ExynosAutov9, an automotive version
    of their smartphone SoC, but otherwise no major changes.
 
  - Microchip adds the SAMA5D29 SoC in the SAMA5 family, and a
    number of improvements for the recently added SAMA7 family.
    The LAN966 SoC that was added in the platform code does not
    have dts files yet. Two board files are added for the older
    at91sam9g20 SoC
 
  - Aspeed supports two additional server boards using their AST2600
    as BMC, and improves support for qemu models
 
  - Rockchip RK3566/RK3688 gets added, along with six new
    development boards using RK3328/RK3399/RK3566, and one
    Chromebook tablet.
 
  - Two NAS boxes are added using the ARMv4 based Gemini platform
 
  - One new board is added to the Intel Arria SoC FPGA family
 
  - Marvell adds one network switch based on Armada 381 and the
    new MOCHAbin 7040 development board
 
  - NXP adds support for the S32G2 automotive SoC, two imx6 based
    ebook readers, and three additional development boards, which
    is notably less than their usual additions, but they also gain
    improvements to their many existing boards
 
  - STmicroelectronics adds their stm32mp13 SoC family along with
    a reference board
 
  - Renesas adds new versions of their R-Car Gen3 SoCs and many
    updates for their older generations
 
  - Broadcom adds support for a number of Cisco Meraki wireless
    controllers, along with two new boards and other updates for
    BCM53xx/BCM47xx networking SoCs and the Raspberry Pi
    boards
 
  - Mediatek improves support for the MT81xx SoCs used in Chromebooks
    as well as the MT76xx networking SoCs
 
  - NVIDIA adds a number of cleanups and additional support for
    more hardware on the already supported machines
 
  - TI K3 adds support for three new boards along with cleanups
 
  - Toshiba adds one board for the Visconti family
 
  - Xilinx adds five new ZynqMP based machines
 
  - Amlogic support is added for the Radxa Zero and two Jethub
    home automation controllers, along with changes to other
    machines
 
  - Rob Herring continues his work on fixing dtc warnings all over
    the tree.
 
  - Minor updates for TI OMAP, Mstar, Allwinner/sunxi, Hisilicon,
    Ux500, Unisoc
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Merge tag 'dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "This is a rather large update for the ARM devicetree files, after a
  few quieter releases, with 775 total commits and 47 branches pulled
  into this one.

  There are 5 new SoC types plus some minor variations, and a total of
  60 new machines, so I'm limiting the summary to the main noteworthy
  items:

   - Apple M1 gain support for PCI and pinctrl, getting a bit closer to
     a usable system out of the box.

   - Qualcomm gains support for Snapdragon 690 (aka SM6350) as well as
     SM7225, 11 new smartphones, and three additional Chromebooks, and
     improvements all over the place.

   - Samsung gains support for ExynosAutov9, an automotive version of
     their smartphone SoC, but otherwise no major changes.

   - Microchip adds the SAMA5D29 SoC in the SAMA5 family, and a number
     of improvements for the recently added SAMA7 family. The LAN966 SoC
     that was added in the platform code does not have dts files yet.
     Two board files are added for the older at91sam9g20 SoC

   - Aspeed supports two additional server boards using their AST2600 as
     BMC, and improves support for qemu models

   - Rockchip RK3566/RK3688 gets added, along with six new development
     boards using RK3328/RK3399/RK3566, and one Chromebook tablet.

   - Two NAS boxes are added using the ARMv4 based Gemini platform

   - One new board is added to the Intel Arria SoC FPGA family

   - Marvell adds one network switch based on Armada 381 and the new
     MOCHAbin 7040 development board

   - NXP adds support for the S32G2 automotive SoC, two imx6 based ebook
     readers, and three additional development boards, which is notably
     less than their usual additions, but they also gain improvements to
     their many existing boards

   - STmicroelectronics adds their stm32mp13 SoC family along with a
     reference board

   - Renesas adds new versions of their R-Car Gen3 SoCs and many updates
     for their older generations

   - Broadcom adds support for a number of Cisco Meraki wireless
     controllers, along with two new boards and other updates for
     BCM53xx/BCM47xx networking SoCs and the Raspberry Pi boards

   - Mediatek improves support for the MT81xx SoCs used in Chromebooks
     as well as the MT76xx networking SoCs

   - NVIDIA adds a number of cleanups and additional support for more
     hardware on the already supported machines

   - TI K3 adds support for three new boards along with cleanups

   - Toshiba adds one board for the Visconti family

   - Xilinx adds five new ZynqMP based machines

   - Amlogic support is added for the Radxa Zero and two Jethub home
     automation controllers, along with changes to other machines

   - Rob Herring continues his work on fixing dtc warnings all over the
     tree.

   - Minor updates for TI OMAP, Mstar, Allwinner/sunxi, Hisilicon,
     Ux500, Unisoc"

* tag 'dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (720 commits)
  arm64: dts: apple: j274: Expose PCI node for the Ethernet MAC address
  arm64: dts: apple: t8103: Add root port interrupt routing
  arm64: dts: apple: t8103: Add PCIe DARTs
  arm64: apple: Add PCIe node
  arm64: apple: Add pinctrl nodes
  ARM: dts: arm: Update ICST clock nodes 'reg' and node names
  ARM: dts: arm: Update register-bit-led nodes 'reg' and node names
  arm64: dts: exynos: add chipid node for exynosautov9 SoC
  ARM: dts: qcom: fix typo in IPQ8064 thermal-sensor node
  Revert "arm64: dts: qcom: msm8916-asus-z00l: Add sensors"
  arm64: dts: qcom: ipq6018: Remove unused 'iface_clk' property from dma-controller node
  arm64: dts: qcom: ipq6018: Remove unused 'qcom,config-pipe-trust-reg' property
  arm64: dts: qcom: sm8350: Add CPU topology and idle-states
  arm64: dts: qcom: Drop unneeded extra device-specific includes
  arm64: dts: qcom: msm8916: Drop standalone smem node
  arm64: dts: qcom: Fix node name of rpm-msg-ram device nodes
  arm64: dts: qcom: msm8916-asus-z00l: Add sensors
  arm64: dts: qcom: msm8916-asus-z00l: Add SDCard
  arm64: dts: qcom: msm8916-asus-z00l: Add touchscreen
  arm64: dts: qcom: sdm845-oneplus: remove devinfo-size from ramoops node
  ...
2021-11-03 16:56:03 -07:00
Claudiu Beznea
f3c0366411 ARM: dts: at91: sama7g5-ek: use blocks 0 and 1 of TCB0 as cs and ce
Use blocks 0 and 1 of TCB0 for clocksource and clockevent functionality.
PIT64B is already enabled on SAMA7G5 targets for this but TCB0 will be
used as a fallback only in case PIT64B will fail to probe.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211020094656.3343242-4-claudiu.beznea@microchip.com
2021-10-21 13:45:16 +02:00
Claudiu Beznea
dbe68bc9e8 ARM: dts: at91: sama7g5ek: to not touch slew-rate for SDMMC pins
With commit c709135e57 ("pinctrl: at91-pio4: add support for slew-rate")
and commit cbde6c823b ("pinctrl: at91-pio4: Fix slew rate disablement")
the slew-rate is enabled by default for each configured pin. The datasheet
specifies at chapter "Output Driver AC Characteristics" that HSIO
drivers (use in SDMMCx and QSPI0 peripherals), don't have a slewrate
setting but are rather calibrated against an external 1% resistor mounted
on the SDMMCx_CAL or QSPI0_CAL pins. Depending on the target signal
frequency and the external load, it is possible to adjust their target
output impedance. Thus set slew-rate = <0> for SDMMC (QSPI is not enabled
at the moment in device tree).

Fixes: 7540629e2f ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210915074836.6574-3-claudiu.beznea@microchip.com
2021-10-04 12:16:58 +02:00
Claudiu Beznea
968f6e9d51 ARM: dts: at91: sama7g5ek: use proper slew-rate settings for GMACs
Datasheet chapter "EMAC Timings" specifies that while in 3.3V domain
GMAC's MDIO pins should be configured with slew-rate enabled, while the
data + signaling pins should be configured with slew-rate disabled when
GMAC works in RGMII or RMII modes. The pin controller for SAMA7G5 sets
the slew-rate as enabled for all pins. Adapt the device tree to comply
with these.

Fixes: 7540629e2f ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210915074836.6574-2-claudiu.beznea@microchip.com
2021-10-04 12:16:58 +02:00
Claudiu Beznea
ef162ac50d ARM: dts: at91: sama7g5ek: add suspend voltage for ddr3l rail
SAMA7G5-EK board has DDR3L type of memory soldered. This needs 1.35V. The
1.35V for DDR3L rail at run-time is selected by the proper configuration
on SELV2 pin (for 1.35V it needs to be in high-z state). When suspended
the MCP16502 PMIC soldered on SAMA7G5-EK will use different sets of
configuration registers to provide proper voltages on its rail. Run-time
configuration registers could be configured differently than suspend
configuration register for MCP16502 (VSEL2 affects only run-time
configuration). In suspend states the DDR3L memory soldered on SAMA7G5-EK
switches to self-refresh. Even on self-refresh it needs to be powered by
a 1.35V rail. Thus, make sure the PMIC is configured properly when system
is suspended.

Fixes: 7540629e2f (ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210930154219.2214051-2-claudiu.beznea@microchip.com
2021-10-04 11:54:20 +02:00
Eugen Hristev
6b97032b9c ARM: dts: at91: sama7g5ek: enable ADC on the board
The ADC controller on the board is fed by a 2.5V reference voltage.
By default the channels #14 and #15 are dedicated to analog input
(marked AN on the board), on the connectors mikrobus1 and mikrobus2.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210901123013.329792-11-eugen.hristev@microchip.com
2021-09-15 10:35:29 +02:00
Claudiu Beznea
16b161bcf5 ARM: dts: at91: sama7g5: add shdwc node
Add shutdown controller node and enable it.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210823131915.23857-5-claudiu.beznea@microchip.com
2021-09-14 16:52:27 +02:00
Eugen Hristev
7540629e2f ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek
Add Device Tree for sama7g5 SoC and associated board sama7g5-ek

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
[claudiu.beznea@microchip.com: add clocks, ethernet, timers, power]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
[codrin.ciubotariu@microchip.com: add audio]
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
[nicolas.ferre@microchip.com: removed eeproms, reorder i2s dma chans]
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210628120452.74408-2-eugen.hristev@microchip.com
2021-07-19 15:27:14 +02:00