Document Renesas RAA215300 PMIC bindings.
The RAA215300 is a high Performance 9-Channel PMIC supporting DDR
Memory, with Built-In Charger and RTC.
It supports DDR3, DDR3L, DDR4, and LPDDR4 memory power requirements.
The internally compensated regulators, built-in Real-Time Clock (RTC),
32kHz crystal oscillator, and coin cell battery charger provide a
highly integrated, small footprint power solution ideal for
System-On-Module (SOM) applications. A spread spectrum feature
provides an ease-of-use solution for noise-sensitive audio or RF
applications.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/Message-Id: <20230623140948.384762-2-biju.das.jz@bp.renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Convert the DT binding document for pwm-bcm2835 from .txt to YAML.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Make the pattern matching node names a bit stricter to improve DTS
consistency. The pattern is restricted to:
1. Only one unit address or one -N suffix,
2. -N suffixes to decimal numbers.
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
i.MX8QXP compatible is missing in the list, add it.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add compatible string for the PWM unit found of the MediaTek MT7981 SoC.
This is in preparation to adding support in the pwm-mediatek.c driver.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
"regstep" may be deprecated, but it still needs a type.
Fixes: 8ad69f4905 ("dt-bindings: i2c: convert ocores binding to yaml")
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Peter Korsgaard <peter@korsgaard.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Andi Shyti <andi.shyti@kernel.org>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
The conditional if/then schema has an error as the "enum" values have
"const" in them. Drop the "const".
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230621231012.3816139-1-robh@kernel.org
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Add dt-bindings for the CSI IP found inside the RZ/V2M SoC.
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/Message-Id: <20230622113341.657842-2-fabrizio.castro.jz@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add YAML documentation for the timer which is present on Ralink SoCs.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230620100231.1412582-1-sergio.paracuellos@gmail.com
Convert Broadcom Kona family timer bindings to DT schema.
Changes during conversion:
- drop deprecated compatible (it's been deprecated for ~10 years)
Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230618144635.GA22166@standask-GA-A55M-S2HP
MAINTAINERS
* add missing driver git trees
ath11k
* factory test mode support
iwlwifi
* config rework to drop test devices and
split the different families
* major update for new firmware and MLO
stack
* initial multi-link reconfiguration suppor
* multi-BSSID and MLO improvements
other
* fix the last few W=1 warnings from GCC 13
* merged wireless tree to avoid conflicts
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEpeA8sTs3M8SN2hR410qiO8sPaAAFAmSUmQwACgkQ10qiO8sP
aAB2DQ//ZuU93rYpch/NGQcl8dmcOH7SeSo2CMU8niBMkQxn2O4oz/05L2EFjRsx
xqF8GQoVCOK4UWsJ4luEJzqTn7ZTvzkfpy77YHMRStTx0jbQqC+5SPp1pKU7TNAE
jjMngYVIi3ZDCwqe44bw79+ybyMySf9vSjPVgLDtX00WdUWvectw2wcrR1vrKwq1
DbIwuwe8Nn0Qn3BGyJAP4iaYi9wxi+c+tS2VY+7bP+0sZEYemZP4rEQ/LPKn8zl3
+IDv9VwR1ns6d+2+3pvf6ihtZilrHuNRtEYbaBA0TdG4M00tPEsS+YUjwFEmeieJ
E/wM+lR4/LIHC3rsY6Cwl8TyvdjLka3HqpytHWGCXF0wicjia1UtTkzlJDiM9esi
ptnb1d26o2SGOPONOlMyKt8NooccAt3MIlYq25teshDr1P4tXD92j7oNVk7RhwAM
XYzBDGDQYJsAMo/tqzkbOQeUS1ojpsftGf2sQy5qYGRrHZCMquJApwKP1IfbEsF8
FR3/gZxLKdZfr06rWZJccH4Y7gnGm+EEmPBnREPdm6ABR/Rvm0orhJZSrhNY7IdB
bgvnwn5CWyrYXjkywcqMBzZRWPD0vZLLbPuRkneuOMmroA1oCjFzbj06/7UT6jpe
gZPPelIq1GvRHguCI+8jRgxlCiBOI5+GT6FY+9YTLAOFYBY1AZI=
=KSBu
-----END PGP SIGNATURE-----
Merge tag 'wireless-next-2023-06-22' of git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next
Johannes Berg says:
====================
Notable changes this time around:
MAINTAINERS
- add missing driver git trees
ath11k
- factory test mode support
iwlwifi
- config rework to drop test devices and
split the different families
- major update for new firmware and MLO
stack
- initial multi-link reconfiguration suppor
- multi-BSSID and MLO improvements
other
- fix the last few W=1 warnings from GCC 13
- merged wireless tree to avoid conflicts
* tag 'wireless-next-2023-06-22' of git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next: (245 commits)
wifi: ieee80211: fix erroneous NSTR bitmap size checks
wifi: rtlwifi: cleanup USB interface
wifi: rtlwifi: simplify LED management
wifi: ath10k: improve structure padding
wifi: ath9k: convert msecs to jiffies where needed
wifi: iwlwifi: mvm: Add support for IGTK in D3 resume flow
wifi: iwlwifi: mvm: update two most recent GTKs on D3 resume flow
wifi: iwlwifi: mvm: Refactor security key update after D3
wifi: mac80211: mark keys as uploaded when added by the driver
wifi: iwlwifi: remove support of A0 version of FM RF
wifi: iwlwifi: cfg: clean up Bz module firmware lines
wifi: iwlwifi: pcie: add device id 51F1 for killer 1675
wifi: iwlwifi: bump FW API to 83 for AX/BZ/SC devices
wifi: iwlwifi: cfg: remove trailing dash from FW_PRE constants
wifi: iwlwifi: also unify Ma device configurations
wifi: iwlwifi: also unify Sc device configurations
wifi: iwlwifi: unify Bz/Gl device configurations
wifi: iwlwifi: pcie: also drop jacket from info macro
wifi: iwlwifi: remove support for *nJ devices
wifi: iwlwifi: don't load old firmware for 22000
...
====================
Link: https://lore.kernel.org/r/20230622185602.147650-2-johannes@sipsolutions.net
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
The RK3588 has two reset lines for the combphy. One for the
APB interface and one for the actual PHY.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
This adds Rockchip RK3588 AHCI binding. In order to narrow down the
allowed clocks without bloating the generic binding, the description
of Rockchip's AHCI controllers has been moved to its own file.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Add PHY transmit and receive clocks as described by the
DW SATA AHCI HW manual.
Suggested-by: Serge Semin <fancer.lancer@gmail.com>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
To permit validation of RISC-V cpu nodes, "additionalProperties: true"
needs to be swapped for "unevaluatedProperties: false". To facilitate
this in a way that passes dt_binding_check, a reference to the cpu
schema is required.
Disallow the generic cache-op-block-size property that that drags in,
since the RISC-V CBO extensions do not require a common size, and have
individual properties.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/20230615-dubiously-parasail-79d34cefedce@spud
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Switch the DT binding to a YAML schema to enable the DT validation.
There was also an incorrect reference to dma-names being "rxtx" where
the driver and existing device trees actually use dma-names = "data" so
this is corrected in the conversion.
Signed-off-by: Vadym Kochan <vadym.kochan@plvision.eu>
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20230619040742.1108172-2-chris.packham@alliedtelesis.co.nz
Reference mtd-physmap.yaml which contains all the relevant properties
for this device. Add "unevaluatedProperties: false" to avoid any
spurious addition of random properties.
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-18-miquel.raynal@bootlin.com
nand-on-flash-bbt is a generic property which may apply to any raw NAND
chip, it does not need to be listed in each controller
description. The raw NAND chip description file which contains the
property is already referenced, so no need to mention the property here
again.
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Cc: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-17-miquel.raynal@bootlin.com
The mediatek NAND controller should reference the new raw-nand-chip.yaml
binding instead of the original nand-chip.yaml which does not contain
*all* the properties that may be used to fully describe the NAND
devices, certain properties being actually described under
nand-controller.yaml.
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Cc: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-16-miquel.raynal@bootlin.com
List all the possible properties in the NAND chip as per the example and
set unevaluatedProperties to false in the NAND chip section.
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Christophe Kerello <christophe.kerello@foss.st.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-15-miquel.raynal@bootlin.com
List all the possible properties in the NAND chip as per the example and
set unevaluatedProperties to false in the NAND chip section.
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-14-miquel.raynal@bootlin.com
nand-ecc-mode is a generic property which may apply to any raw NAND
chip, it does not need to be listed in each controller
description. Instead, let's reference the raw NAND chip description file
which contains the property. The description contained
"additionalProperties: false" which is wrong as other properties such as
partitions might very well be added in the final .dts, and anyway needs
to be converted into "unexpectedProperties: false" to fit the property
change new requirements.
Cc: Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-13-miquel.raynal@bootlin.com
Ensure all raw NAND chip properties are valid by referencing the
relevant schema and set unevaluatedProperties to false in the NAND chip
section to avoid spurious additions of random properties.
Doing this in one location also saves us from dupplicating the
description of the NAND chip object.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-12-miquel.raynal@bootlin.com
Ensure all raw NAND chip properties are valid by referencing the
relevant schema and set unevaluatedProperties to false in the NAND chip
section to avoid spurious additions of random properties.
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-11-miquel.raynal@bootlin.com
Ensure all raw NAND chip properties are valid by referencing the
relevant schema and set unevaluatedProperties to false in the NAND chip
section to avoid spurious additions of random properties.
Cc: Liang Yang <liang.yang@amlogic.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-10-miquel.raynal@bootlin.com
nand-ecc-mode is a generic property which may apply to any raw NAND
chip, it does not need to be listed in each controller
description. Instead, let's reference the raw NAND chip description file
which contains the property. The description contained
"additionalProperties: false" which is wrong as other properties such as
partitions might very well be added in the final .dts, and anyway needs
to be converted into "unexpectedProperties: false" to fit the property
change new requirements.
Cc: Maxime Ripard <mripard@kernel.org>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Jernej Skrabec <jernej.skrabec@gmail.com>
Cc: Samuel Holland <samuel@sholland.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-9-miquel.raynal@bootlin.com
List all the possible properties in the NAND chip as per the example and
set unevaluatedProperties to false in the NAND chip section.
Cc: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-8-miquel.raynal@bootlin.com
List all the possible properties in the NAND chip as per the example and
set unevaluatedProperties to false in the NAND chip section.
Cc: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-7-miquel.raynal@bootlin.com
qcom,boot-partitions is a NAND chip property, not a NAND controller
property. Move the description of the property into the NAND chip
section and just enable the property in the if/else block.
Fixes: 5278cc93a9 ("dt-bindings: mtd: qcom_nandc: document qcom,boot-partitions binding")
Cc: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-6-miquel.raynal@bootlin.com
This property has been extensively used for almost two decades already,
a lot of device trees use it, this is not the preferred way to configure
the ECC engines but we cannot just ignore it. Describe the property,
list the exact strings which have once been supported and mark it
deprecated.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-5-miquel.raynal@bootlin.com
The nand-ecc-placement property has been deprecated for a long time
already, it does not really mean something useful for the ECC engines
and is anyway in the vast majority of cases totally useless. Just mark
it deprecated to avoid appealing people to use it.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-4-miquel.raynal@bootlin.com
In an effort to constrain as much as we can the existing binding, we
want to add "unevaluatedProperties: false" in all the NAND chip
descriptions part of NAND controller bindings. But in order to do that
properly, we also need to reference a file which contains all the
"allowed" properties. Right now this file is nand-chip.yaml but in
practice raw NAND controllers may use additional properties in their
NAND chip children node. These properties are listed under
nand-controller.yaml, which makes the "unevaluatedProperties" checks
fail while the description are valid. We need to move these NAND chip
related properties into another file, because we do not want to pollute
nand-chip.yaml which is also referenced by eg. SPI-NAND devices.
Let's create a raw-nand-chip.yaml file to reference all the properties a
raw NAND chip description can contain. The chain of inheritance becomes:
nand-controller.yaml <- raw-nand-chip.yaml
raw-nand-chip.yaml <- nand-chip.yaml
spi-nand.yaml <- nand-chip.yaml
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-3-miquel.raynal@bootlin.com
There is no addition there, but the mtd.yaml file is so generic, it can
be referenced by a wide variety of devices, including nand ones which
already define the node name to "nand@<cs>". Right now it does not lead
to any failure but when we will constrain more the schema, this will
become a problem because we want the mtd-wide properties like label or
partitions to be available for the callers.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-2-miquel.raynal@bootlin.com
Trogdor devices use firmware backed by TF-A instead of Qualcomm's
normal TZ. On TF-A we end up mapping memory as cacheable. Specifically,
you can see in Trogdor's TF-A code [1] in qti_sip_mem_assign() that we
call qti_mmap_add_dynamic_region() with MT_RO_DATA. This translates
down to MT_MEMORY instead of MT_NON_CACHEABLE or MT_DEVICE.
Let's allow devices like trogdor to be described properly by allowing
"dma-coherent" in the SCM node.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230616081440.v2.1.Ie79b5f0ed45739695c9970df121e11d724909157@changeid
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
STM32F4-F7 are, from hardware point of view, capable to handle device mode.
So this property should not be forced at false in dt-bindings.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/Message-Id: <20230621115523.923176-3-valentin.caron@foss.st.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
"enum" values should be integers or strings, not arrays (though json-schema
does allow arrays, we do not). In this case, all possible combinations are
allowed anyways, so there's little point in expressing as an array.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/Message-Id: <20230621231044.3816914-1-robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
1. Renesas RPC IF: correct the Strobe Timing Adjustment.
2. Broadcom DPFE: fix smatch warning for testing array offset after use.
3. Atmel SDRAMC: drop driver because it was just a wrapper over enabling
clock which is not handled by its clock controller.
4. Minor bindings cleanup.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmSHW7MQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD12azD/0b7k0T02IRlfIQLPfzJAVT85ax0SJNFZrV
3SmGu1EJMK7n8vBQJh4Jos7ImqI6zoSdK66d7QjsdI7sUTf1yuM78YWAyuvaUcnM
kln2X5GM6HQo65g8WgwmIVvfV1Ty3kLl2eiBYYuBd5Mf6qwPz2AZ7QrFVzCL3fg3
FI+JqyVWUaRHNPgPFHTND+M6TK2n6r+t0/FYxQuN6vj96fN3W3jx79Owjf6lSB6x
LWS5BFC5yRqXBKXWeTC8Llp8Q6vYhy7qwjuVxV9ERVJSA/R6NhjiLZQX8tB/NKRH
JyZEFjnL/fKVQrti25GZIkyD/w4wjsEECHeTwMtzORhOedkW5fpoiVQQP5xzPBie
Wkjdd0xPC7t4HxPxyFGDUrnllNbdAqNTRLpBPLiOvfoe/FBYNHp6AjDCh33feNMD
lbON+2E4j0KY0nrLTsZuID+h0dtaAYTSVubrTQiCoRoVT8vANy57eyCaet6feqyK
HFK+V8QN18X4jG5Me5SkrMOcihZWV2qZK/uTBe17EsJPsz4r0C/jlSy4HCcgl57e
0KuFpZUu2Y87Ssx7PFBCF144U+A6aWz0S+PbWD+rcK4WGEGn4c/514PtFa7KfLg2
U+KvadDIYBXZ+T95bAjqY75Ci4kqWpIAwP/J3Qcfb5URD/ZYkaxi+EsOkZvZoEsE
f+zZ/ahUYg==
=Q7+J
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSUaeoACgkQYKtH/8kJ
UifUvw/8Cb6UG88BJeQG3PS4B1ZiJ5Dd35u26o80ReUmFTLCcUUgUDHjXHHUbW+9
B/oooX6cOB6U3eiW5HVpWcq+5jOz2NhrPiQqXx49M5D80jvA1WgNUYeI9tma8F/m
ThMCWc1O0xTHzN4N1TtUdOg52Wh17Ynww8pLBTissxYqurhzuMIVtve72dpSaKsC
E891yZ3yz0S/tK1FjfP7Hgixlyc0Pbwg5F2JESPYXDPIpefaA5oLQC+5nV870MxJ
B32MWjQpSveUHgchFDPOuC9y7GMbzQCB580WezNtAns9rn1zn1hCVfmBXYt0tt6l
XW46+nd+a1G5T+0Z6KQxr86a/5ckkPxEEIfTcPCznonYFZTwxa2No4w16dmBARYW
SCsQ9JKI8pYve6k7/hk20lWFakn/A+VshbIjuR/MI/jLUNMrR4q6NXuRlcyO2WbK
MYvopJd6oHsfSDxqGHiH5QuAXyOngdd7CZdKYCIHPatrh2cTPgeGmX1e6eYeHJmv
ByO2vsaR/ijnXdsrq+mzL+oaAy6rGGFOYWKuNFov6MI+SnP7ijW9hAOwpGxnY8rz
Odh7Mbe7VoiHlWLfKCgCcjudHCFnG9ctVmNw6h2pPmY+guFnBp8+6dtlR/icENlI
h/nNoOLIt1zachOXOMbQFXDs2e0z7i1YLaz+2+OH7AR10s54EsY=
=stpo
-----END PGP SIGNATURE-----
Merge tag 'memory-controller-drv-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers
Memory controller drivers for v6.5
1. Renesas RPC IF: correct the Strobe Timing Adjustment.
2. Broadcom DPFE: fix smatch warning for testing array offset after use.
3. Atmel SDRAMC: drop driver because it was just a wrapper over enabling
clock which is not handled by its clock controller.
4. Minor bindings cleanup.
* tag 'memory-controller-drv-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
dt-bindings: memory-controllers: drop unneeded quotes
memory: atmel-sdramc: remove the driver
memory: brcmstb_dpfe: fix testing array offset after use
memory: renesas-rpc-if: Fix PHYCNT.STRTIM setting
Link: https://lore.kernel.org/r/20230612175508.288775-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Couple of main additions :-
1. Support for multiple SMC/HVC transports for SCMI:
Some platforms need to support multiple SCMI instances within
a platform(more commonly in a VM). The same SMC/HVC FID is used with
all the instances. The platform or the hypervisor needs a way to
distinguish among SMC/HVC calls made from different instances.
This change adds support for passing shmem channel address as the
parameters in the SMC/HVC call. The address is split into 4KB-page
and offset for simiplicity.
2. Addition od SCMI v3.2 explicit powercap enable/disable support:
SCMI v3.2 specification introduces support to disable powercapping
as a whole on the desired zones.
This change adds the needed support to the core SCMI powercap protocol,
exposing enable/disable protocol operations and then wiring up the new
operartions in the related powercap framework helpers.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAmSHCbQACgkQAEG6vDF+
4phj9hAAjYYoJ9HvIqxJ68jRRh7BFnsdeCVqsGUzopeXbiWwr+uc0hko+oP8+hjz
R/tHvqhKuUiKC+ROOVHSx0VdU5721v2Uhvn5gtp2ZzKN/Iw7Mm/6dMlGDF790MSw
gkxJ5dog9H04HSGG1LvQIPKKY/BNUh7xvPkwoKlCO7DyNG+WQ5yyQT0v9DiZH8gg
j5eKX29gDZJEuzr8TlkpYHATyDlzMNVD0/pX97DedhqEqzVnms/yAa1R6zu+M0sn
8xyR2gy0UJ0w3unT8KxEbbxdJcykYxTbyVqJIc28xtVYA1EOGkFwZLYcVvy4z0LC
xny3PJSeL8g/pbrilbYNbYcqz9Qjb9eNU9XdDFa+Oy09skwnYr2uYje6XPBk/KFu
cQ5xs9ChJezcIRPBq/iV4Aqe5WK05IPZ0Q0HKsuTmdOOMaCsPui5nMkkybrm3KOU
uZ6z90Br854FI/pQqAqpwYY1Wqa1g6I4DFUwOtd04qD1V19s0CEDrx8uPtoKcSaP
0W+BeSv56Ukvn2rYPbu0teIzbk3s00kGqHcy1YKyq1rGmZSYrBf1bfmZkIJgfN/2
0cyzJAch4j4ggvnJQJPybWYjbmKfxE+A9hk3hjZ1mrew2wWeIsjevclu4wtNUCjc
qT3wa8SOtjaUGTQmvEWBKeYrkMcOhx+vxSo8SjemW/X3WjYswdw=
=uVB0
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSUabgACgkQYKtH/8kJ
UieE8A//Rvcl3hDpZgNa6pCvX7dH3m2JttmBgBmGbH4mVffjqhstYknp8Fb8Faxq
91cGvAJ0QTn0Kaox7ycHQQVxLK5u7UfTmCe6pGGIDWZqXQDj6TETZoeWmiBgnTeS
510Id9S/CsSnjErO1D575fogSx2AohgBzIIk4r0YxZ0HcQiGteS7fAFjd4JMoheF
ZhUUmAu8Kp//grgeujvgQ59bCP4w6dqJ7KT/wnBZCy0CACpECA+LmYS1N/bnfPB2
rzxMo1GgUfSNEKxNx6T8UC9+LfUkitHNwfPyoe3av9GAGhozaTbGD9xll0DTj2iz
yFyhbgyY9aCxNMAwzq6hnveZi90X/bC1hnIidH5oyQkqTNTgE1X1y7SA6+SSfBzF
UlFafLq2xw+ENmDYOV6Lz4JREPhC2gFwjYqjn8teLQBriaCBIdtaedbGDnUVN0Ht
Iiv4baGtrIqbwosO2o/mfCLAveY/zh5aINv3rY1bkdfdFUQqS8gDlNGTuKDN+H+3
v80eyP8XPU2pZ7NTzSxcnz5SHSZWagVcugnzDEdeX2ZBeSKY50PzFZEY7OSU5k9o
iYjRyChHTTab/rG51GyhthVvszU9iKSQzmGco6OnaHd/vfCeXUfNKey98zVLbjUO
V8xJOAIZ9NNU9SzIfupfe9vjfIPOTxEqbWV3M4pvkgyKjNEddr4=
=Ze5+
-----END PGP SIGNATURE-----
Merge tag 'scmi-updates-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers
Arm SCMI updates for v6.5
Couple of main additions :-
1. Support for multiple SMC/HVC transports for SCMI:
Some platforms need to support multiple SCMI instances within
a platform(more commonly in a VM). The same SMC/HVC FID is used with
all the instances. The platform or the hypervisor needs a way to
distinguish among SMC/HVC calls made from different instances.
This change adds support for passing shmem channel address as the
parameters in the SMC/HVC call. The address is split into 4KB-page
and offset for simiplicity.
2. Addition od SCMI v3.2 explicit powercap enable/disable support:
SCMI v3.2 specification introduces support to disable powercapping
as a whole on the desired zones.
This change adds the needed support to the core SCMI powercap protocol,
exposing enable/disable protocol operations and then wiring up the new
operartions in the related powercap framework helpers.
* tag 'scmi-updates-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
powercap: arm_scmi: Add support for disabling powercaps on a zone
firmware: arm_scmi: Add Powercap protocol enable support
firmware: arm_scmi: Refactor the internal powercap get/set helpers
firmware: arm_scmi: Augment SMC/HVC to allow optional parameters
dt-bindings: firmware: arm,scmi: support for parameter in smc/hvc call
Link: https://lore.kernel.org/r/20230612121017.4108104-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
rk3588-based "General-register-files" register areas and a move to
C99 array inits for the dtpm driver to fix sparse warnings.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmSGMvYQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgVtnB/9Mm4ppU1GRJiK8TSZIVFfM5YZRoNyGgRXF
oGtF8LvMq7/v0Ep1G+NgvbwdwCpzlIM0Z9Uo/3AfVqft9rFN8TpKbYDLRGryuIbC
L+8kqk4pmBo/U6ZApwylUcBGNymyliHdsOYqMqbWqRvwK2tXbgMlO6c3Yna0VXD7
l8fvn9/jtHBQwVniF9iIGbQbAS+avJcyCamh8Wn/Hs5Ke60NRNUhLuvHs4mom82R
26IuO9QkkRQCU/hC22NydPnBmK7dSQMqiInI9XgoMYOZi9TJ8+OrTExc0kkUZVAL
i4Vg+XGmDXmTtAd11C6NjsLhMuzhsR1znk3ndQjsjUnw0QlhNSHP
=rrNf
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSUaYQACgkQYKtH/8kJ
UicjvQ/+KRFMBrgNgpylHsVDrOIEVCyBhxk7duMmOGEEljJwVM1MPsqRqBXr3Eck
4B8ZlKNDYw0V7+2mSdbwHWYsGmHd2srpJfXxTHQiCXNAxDXEIoJnDoTtIOYoY8ZD
CeTWEkPmavTT0AvkLPI4Es/2e/AbRbehp/SkNMfmN/d4UXL5lIqsNNZ7eqsqKCPU
VuR7vwvcB0+rJdjU/84eYdjPag2//r3+0qN6LzWNLLOO0Za7FAJ34WUZDiYM3db7
vHvvgbJo7YXuOueAmpv/wGB7NwZfXw8lYPPj230M1wH1cPqy4Dpo8Drj377HWPkk
90BxSkTnT2kN+dhjx3afzlIgemil3C8u60/QmdkwhY2MiFqB5TOClswI9oQZBTyY
1OiU8MxfXsprV2eFQqiTvf1XaDSVlVyUdQDgSVzxoTSd2WIxEnreKJZt7mxm97rW
w4D2ujbBuu9yfyMdAdWei2s/hFJdXIAJvXZjMgOu40nZdfL9myohdbaAVPe+fGV+
wZsvdUJJbAgEYSewvgFIjNTlA5/ATicr53DtPzcjslJT0C14Yp3jAGJJQao1ZJXP
A0h/BeW+VyNr/UYUPccJFL1hi83XXJqdndl/JOHyrZUbVZD7QA9AqT2gnquisWPA
2akMZ6mxdwN9ZgbMUIUOsv7DiSw6zctRe16whFljbynRDW0NzVg=
=R3D1
-----END PGP SIGNATURE-----
Merge tag 'v6.5-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/drivers
An addition to the rk3588 power-domains, some new syscon compatibles for
rk3588-based "General-register-files" register areas and a move to
C99 array inits for the dtpm driver to fix sparse warnings.
* tag 'v6.5-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
soc: rockchip: dtpm: use C99 array init syntax
dt-bindings: soc: rockchip: add rk3588 pipe-phy syscon
dt-bindings: soc: rockchip: add rk3588 usb2phy syscon
soc: rockchip: power-domain: add rk3588 mem module support
Link: https://lore.kernel.org/r/10286366.nUPlyArG6x@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add the 'fsl,imx6ul-usdhc' value to the compatible properties list in
the fsl-imx-esdhc.yaml file. This is required to match the compatible
strings present in the 'mmc@2190000' node of 'imx6ul-prti6g.dtb'. This
commit addresses the following dtbs_check warning:
imx6ul-prti6g.dtb:0:0: /soc/bus@2100000/mmc@2190000: failed to match any schema with compatible: ['fsl,imx6ul-usdhc', 'fsl,imx6sx-usdhc']
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230621093245.78130-2-o.rempel@pengutronix.de
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The conditional if/then schema has an error as the "enum" values have
"const" in them. Drop the "const".
Signed-off-by: Rob Herring <robh@kernel.org>
Fixes: 46b616c157 ("dt-bindings: phy: brcm, brcmstb-usb-phy: add BCM4908 binding")
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Message-ID: <20230621230958.3815818-1-robh@kernel.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Update the example in the documentation to a valid example.
Address for mem-base was invalid, it pointed to address
0x8000'0000 which is the upper region of the DDR which
is not necessarily populated depending on the board.
This address should point to the base of the memory
window region of the controller which is 0xfa00'0000.
Add missing pinctrl.
Link: https://lore.kernel.org/r/20230418074700.1083505-7-rick.wertenbroek@gmail.com
Signed-off-by: Rick Wertenbroek <rick.wertenbroek@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Socionext's DeveloperBox is based on the SC2A11B SoC (Synquacer).
Specify bindings for the platform and boards based on that.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Link: https://lore.kernel.org/r/20230621153658.60646-1-jaswinder.singh@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
Allow a single HS port to be used e.g. without reg property and a unit
address. OF graph allows a single port node, without 'reg' property.
This removes a couple of Warnings or errors on STM32MP boards.
When using single HS port currently, when doing building with W=1:
arch/arm/boot/dts/stm32mp157c-dk2.dtb: stusb1600@28: connector:
Unevaluated properties are not allowed ('port' was unexpected)
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20230620085633.533187-1-fabrice.gasnier@foss.st.com
Signed-off-by: Rob Herring <robh@kernel.org>
The Micrel KS8851 can be attached to SPI or parallel bus and the
difference is expressed in compatibles. Allow common SPI properties
when this is a SPI variant and narrow the parallel memory bus properties
to the second case.
This fixes dtbs_check warning:
qcom-msm8960-cdp.dtb: ethernet@0: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230619170134.65395-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
WCN3990 comes with two chains - CH0 and CH1 - where each takes VDD
regulator. It seems VDD_CH1 is optional (Linux driver does not care
about it), so document it to fix dtbs_check warnings like:
sdm850-lenovo-yoga-c630.dtb: bluetooth: 'vddch1-supply' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230617165716.279857-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Fix typo (period vs comma) in list of valid clock names.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230620200917.24958-1-mans@mansr.com
Signed-off-by: Rob Herring <robh@kernel.org>
The detection of split/non-split firmware files in the MDT loader is
corrected. The Geni driver is updated to not enable unused interrupts,
in some configurations. The count unit for MSM8998 in BWMON is corrected.
RPM master stats driver is corrected to check for the right return value
of devm_ioremap().
Support for socinfo version 18 and 19 are aded, and IPQ5300 is added to
the list of platforms.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSLPJsVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Fc9AQAMvf/8aE2FyhH3LE9n1otbRa82Lv
5MjvAM9N6PUJgMSuA71lZm6Bh3h/3SpbGjuRGkfGi4ZpkjZiI37ButZQq8YKVcOi
hDPjGiF8oiO1wk+JEwrC29jgpL+37T7/7jSynO2cYfu+uKXt3MhF9kmDeIiydjyf
hpN6IhGuyLm+dx38x9Vzsq4ew4uFNos+zP0ZInScSJV8UQ5sJjUCjQ4FDu1bHoFn
wQXa0Bd5ObYJilh71on9eJO7dQYLapv5omHI0lM04cYpYGfPpSTmXQwnbpmL7xqF
dyLiE+eq6jpi5yWIVpEFFwonty7Ixuq4yuMwMafYVGIriQ8a8J56HvfvZQ2FSb7D
1F/Rx74qkx1LEenNOBM5rUFyIGc93Up19DzFPNBX/WjJW0+7yBlXNUsg/bI2a/xV
Z+jURxcUWKa/ugiqjMZRXQ7VXC2uhrjD8xn22+w8eyziRoPPecq5KITizHv3CkOT
G7AhI69nFn8zhXHJ3cp4ci4AWzOCW4HXnTE9H8XMDFcu6hxylJDovrqCtt0nWqg+
QPKSqVtUF7BX/UMhhE5XdxqkxG//MyMN2W4dowxv+u35+6DCydyEm3XFuD85ETnt
YJx4iC5n8IGfb5jfOIyLK0JHQNU9ijPSd9rssLRebh96m4H0Op9gHlxDHyXghaRS
umZA+uKoxQQZhEXn
=KYPl
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSTWk8ACgkQYKtH/8kJ
Uicu3hAAgerZS9Wdt+w+2cUhnkWWayByRwUmTvowFUR8vsbWLJVf1UwYQFiHVXhn
BsPSSGWSRm3vyUZjZyv3GegoWLsxH3LD8s7QngjPpF75HI+2ekD8J+tLNRiNqPll
/cZ1iQFVoTtfYUzAFpgBrYlFYV9P7B/6ghjEhuMc0HWLN4xFJ+13HL5NdCtvbDyn
zTrBSDlz3j94+PoS6n/y+9r8nLNZyp5Li5FUEoXf7uABI9dUqWokoSDV1hRA7zeF
MewEEcH7p5AZiL54L7cfLAlKwPQrUNYjerNxeljrwcp621wECniB030JmYKslSzS
ccfracaf7EBqRuu4SYH47VeLadikpBxrjP39CJFAlKQhB2X3uUNrSYjLyTLDkRRA
X/SN4sbm0ipToa6FlGJ68D3Ca+MHs541U6fhMgQuJ+S4D0pBjbmKUmQfs76L2Eu4
0ZDyYCQuJFmvd/P6ZKjX6hmkxDJ4OItop+K6doedAFf0/tAp6APry05aF56mbhDW
tsBJ0ABlFNY73wMhSu7HMm2rB7mDl3LnVfv67HrWAzaB+c23rkUDki67a1Gtr3lV
mG05JMSG2nETBRPv+II3pG/q7GzJwlqzHNxy3mwtBRILlzLjEl5fK+HgZRtGN8zr
7620aNOKR3lA7XGih1/ztlbpVqgH0c6Ahnm3pCHoQJJjMrK8oWI=
=YKVY
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
More Qualcomm driver updates for v6.5
The detection of split/non-split firmware files in the MDT loader is
corrected. The Geni driver is updated to not enable unused interrupts,
in some configurations. The count unit for MSM8998 in BWMON is corrected.
RPM master stats driver is corrected to check for the right return value
of devm_ioremap().
Support for socinfo version 18 and 19 are aded, and IPQ5300 is added to
the list of platforms.
* tag 'qcom-drivers-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
soc: qcom: geni-se: Do not bother about enable/disable of interrupts in secondary sequencer
dt-bindings: sram: qcom,imem: document qdu1000
soc: qcom: icc-bwmon: Fix MSM8998 count unit
dt-bindings: soc: qcom,rpmh-rsc: Require power-domains
soc: qcom: socinfo: Add Soc ID for IPQ5300
dt-bindings: arm: qcom,ids: add SoC ID for IPQ5300
soc: qcom: Fix a IS_ERR() vs NULL bug in probe
soc: qcom: socinfo: Add support for new fields in revision 19
soc: qcom: socinfo: Add support for new fields in revision 18
dt-bindings: firmware: scm: Add compatible for SDX75
soc: qcom: mdt_loader: Fix split image detection
Link: https://lore.kernel.org/r/20230615163104.1461905-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Konrad Dybcio is promoted, from reviewer, to co-maintainer.
The mdt_loader gets a fix to the detection of split binaries, where the
previous logic sometimes concluded that the first segments was not
split, in a split image. The unconditional calling of
scm_pas_mem_setup() turns out to cause a regression and is reverted.
The altmode subfunction of pmic_glink is enabled for SM8450.
A new driver for exposing power statistics from the RPM, for debugging
purposes, is introduced.
OCMEM gets a debug prints of the hardware version, QMI helpers are
transitioned to alloc_ordered_workqueue() and an error message in
ramp_controller is improved.
An API is introduced to the SMEM driver to allow other drivers to query
the SoC id, rather than open-coding the parsing of the relevant SMEM
item. This is then used to clean up the Qualcomm NVMEM-based cpufreq
driver.
Socinfo is extended with knowledge about IPQ5018, IPQ5312 and IPQ5302.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSFHJsVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FrtoQAMUN2gF5ZP3rlSEkQbKNMDhNHXVw
S8AexPk6Qw8BcEBOD4YPqrmfrMvNP7Bqh3QkfS/7m5vx0o8bUOw+Xz+C4+9LSUD7
/qW29GlQllwMuRNOdH3J/nYXwpV5WJyiSF/jXy0/GRbz+D/XYSNDC57z/lXTcKKq
dYJrKxms6EF4AgHe88V0bmk6/V4xfa5p6xW3pCG7GLqNHOvhZ16oUmoPiZGVpQMk
go/HsoIB00HktKflTLOUXJWD6qVOVNCaQQEarx+zY1txfmvpVGL+PO6Eaxt00Sa4
pHRvB0CIZPNvdDWELfsfRx6DbPBJRGBlneag04BI918fx4X+jn4uP+1jzw9am03U
M78k0LGBY23Psy6KhoMu5MM4Cntt3kTQ0SwHl/xayzTrAhK2xdmd1bo67ArRl+HX
OZrZ7Se3Cm16CAWqsW42so6MJeDllc8d/ahN/e2NwsNy1lhosK06jRJEdh3N238D
ouL56HoxrweYB0kbK4TkPLewrLZC7DYnr0KMVsPhsSraeJBaBPOVZDhuNSUXXMtf
WdyCRMMxKU3OweLcJiKuGFzNqr2963341Y6NlD+tf1Uy5IEnbIp4jFi9BsJBNVZt
NucOXJYm5OJeAHp8BcMFbnL8uA1NqEYQXwezodPSIGqHzxBtGf6f0hALsIpiUQnA
GLDp99yVujEN2dsE
=9Fv4
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSTVmkACgkQYKtH/8kJ
Uid08g//b5kJZnsiWA43LrkblMSEdZoeijrn+x2NU95YQ4s/oz2RnUtgNCGDhM84
Fi60PzU5L1JVj6GVeL51J5jlBGKzGqe4FfPTN4aPlSV4Z0B3cuevgWmHnw4Mh/zj
t/1b5QVVZxbKKxb8MP+U2iAvyxVwIhIA4zehh0+XGagV3qquURO7QLtLUg42Yx51
HFLADq2JI8trm+CjjCNBv9mq7EipC/g0nbsCs98nxl/sPC7PqtNxL6BXCuz3a8BX
JvA1LVRP2JYkQfb6SMnTFiqkT6LdB7bt6oXZdnwnsNTI1nhFqbMJRMsToWb3HEvv
9lprraDpaufbzvB1b+x8Aar4OmbbWaY2ZpNJqqzCM5eVW2Zs/p5J+ZfOYVigtQYO
qIQvENv+eKETu4nVvdlf72FPAVe+GXnVAcl3LEwhMUxYcRMha4JT0i8mndnCzpT+
tZLdkBMp/t7rZPIa7D+07Xmorefw9e9rwynQg2C2yw3AV5v7j09dPJDFITFcF6Yl
7ADtoy7zHTTv6/0n04RfPC9jPMoi8RbPoVNMVAWW7t7S0984o3gqWXJPLWJdTzA/
ODOupqmvSpZld1rUklKKH/dY/Ha7iUTSci7rZrXSafXR8LBEn2FO6ehZqUvk7T/u
qM3rs5wacHP2OcNDtwHHJoyfHXpxaQ2JqVOcUNkcdcwhN9dbdxA=
=4/0b
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
Qualcomm driver updates for v6.5
Konrad Dybcio is promoted, from reviewer, to co-maintainer.
The mdt_loader gets a fix to the detection of split binaries, where the
previous logic sometimes concluded that the first segments was not
split, in a split image. The unconditional calling of
scm_pas_mem_setup() turns out to cause a regression and is reverted.
The altmode subfunction of pmic_glink is enabled for SM8450.
A new driver for exposing power statistics from the RPM, for debugging
purposes, is introduced.
OCMEM gets a debug prints of the hardware version, QMI helpers are
transitioned to alloc_ordered_workqueue() and an error message in
ramp_controller is improved.
An API is introduced to the SMEM driver to allow other drivers to query
the SoC id, rather than open-coding the parsing of the relevant SMEM
item. This is then used to clean up the Qualcomm NVMEM-based cpufreq
driver.
Socinfo is extended with knowledge about IPQ5018, IPQ5312 and IPQ5302.
* tag 'qcom-drivers-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (23 commits)
soc: qcom: ocmem: Add OCMEM hardware version print
cpufreq: qcom-nvmem: use helper to get SMEM SoC ID
cpufreq: qcom-nvmem: use SoC ID-s from bindings
soc: qcom: smem: introduce qcom_smem_get_soc_id()
soc: qcom: smem: Switch to EXPORT_SYMBOL_GPL()
soc: qcom: socinfo: move SMEM item struct and defines to a header
soc: qcom: mdt_loader: Fix unconditional call to scm_pas_mem_setup
MAINTAINERS: Add Konrad Dybcio as linux-arm-msm co-maintainer
dt-bindings: sram: qcom,imem: Document MSM8226
soc: qcom: socinfo: Add Soc ID for IPQ5312 and IPQ5302
dt-bindings: arm: qcom,ids: add SoC ID for IPQ5312 and IPQ5302
soc: qcom: socinfo: Add IDs for IPQ5018 family
dt-bindings: arm: qcom,ids: Add IDs for IPQ5018 family
soc: qcom: Introduce RPM master stats driver
dt-bindings: soc: qcom: Add RPM Master stats
soc: qcom: qmi: Use alloc_ordered_workqueue() to create ordered workqueues
soc: qcom: ramp_controller: Improve error message for failure in .remove()
dt-bindings: soc: qcom: smd-rpm: allow MSM8226 over SMD
soc: qcom: rpmpd: use correct __le32 type
dt-bindings: soc: qcom: eud: Fix compatible string in the example
...
Link: https://lore.kernel.org/r/20230611010044.2481875-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This introduces an interconnect provider for the memory controller and
external memory controller found on Tegra234 chips that will eventually
be used to dynamically scale the EMC frequency based on a device's
bandwidth needs.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmSDRTcTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoaKyD/4sjVTfnZ9YoXkcPFd6zr1I8pNMC2pk
yyDtSHN0EGcw5goSHF+Akqv5O0JEh8YAW0pQ+fxO3KdEGlZEYNBlC9rgjpz7TzHE
6zsajiIvLYOwSTbjVVlFn2U4H6ihFdawzag/vRDqu1b3wExus9VigWnEgHtj/RJT
q1ODZXkwZrOBR3Z034ji6jJIQXVg54sEvt/Zlq7iYXabLXg8u5NDEbSd4GVBNwPB
SwBUfc9ja/Y5xUKaXA/hqQ7gIfm4Hs5XVyCbLT75j259qVantbxtlURB3cme080m
rRdyScngYFxuyBzQtQzLq+6u5tYJN6q3WUlXWvxI/gMw2IezFH6p0jXfCByriSMD
6d7h6Jk2d6bub3RUWLsurruHYSPqqvM9tI5sN6ZY4nq4uo0MplFEcrQBFXIJAJhy
X/JaO9166K0mX73wNFoEmmay5ZTd8wLKvGdlfaHUdUKJcldhh3Ivhl2r0w9Ij6qE
w1+QjUxtgabSb/69+3o2m4iil2I5Scc8jr3Vu1riW1yemKSQX7xS0PZ4a6k5/78O
2NGaFZqvs7Uo1EYGz91f50Go1hGLZOH0MMMjd+NSj3pZQvpB+BZ8rlGG7umbjIUF
aTBj5hcXN3bBx4VQGnLFwUEbEd6GIog+d6COtpmQzixwdXxw8aUB/m7ouFSegz34
MMEoE0i11HMlyg==
=OJYg
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSTVC0ACgkQYKtH/8kJ
UieyxRAAiJKwY9bILWnKTPIJ+AlTDzp5ramSVsjD7KzlH6/pgWydgzRRhP/9zz87
f1/wnmMJ2vgWWa1g1NfeX4P8vZyHYsGiuBvQrevzP6Ekc0q19j6CI5tu5zDTy1aF
dqZtkpOTqO5+ioTL5bTem2XISvWNnK1TyaWzSHnvbNgfvrWtMiqij9mJyeaF3hdm
yCN0XbO8UaChbUobjgjzwg09BvrsN2CtG/2DATIgHUWDrkW0vER0QZRCF0V9mg3O
5kszkfLAsm/7TcQiPAeHEc2IXNRnYl1f4Gkjg7e47Itxkv5+rm/liejdYMZfIQmc
Kj0eQerTB974qrcBsrwVE12lNwDK4+3FbAWOZjbXaLtYf27+pSjoG0YVduv8VUNi
H81ehi+pHma7Boekf2i9XMVC1+EBBlpPBjxCpaDN5ck7kIkO2bBMX9avTGE9qfn5
9lpU64z6xHv/3YEcnOty4Ggs0V3ZLz4iRkFfWUDtYYsXnFyes1K9ooaDzHojisk0
/vE0KqImlZdlBuBUYpgEBcM/s4V1PtpN3nQtVpUUb77M90GmTLGwLjM8+Y1+JuXV
N9eGiPR8YhuMzy4eQR4YEfIqPqwEstRqkOicctJaCDi3Hg4OXmUdUDS66vV9wm+V
ntfdphilxBp2EHG42IhKkVH5LdSm/17xbxd2t1RwZ7cMZ7Q5hpw=
=7PpG
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.5-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers
memory: tegra: Changes for v6.5-rc1
This introduces an interconnect provider for the memory controller and
external memory controller found on Tegra234 chips that will eventually
be used to dynamically scale the EMC frequency based on a device's
bandwidth needs.
* tag 'tegra-for-6.5-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
memory: tegra: Make CPU cluster BW request a multiple of MC channels
memory: tegra: Add software memory clients in Tegra234
memory: tegra: Add memory clients for Tegra234
memory: tegra: Add interconnect support for DRAM scaling in Tegra234
dt-bindings: tegra: Add ICC IDs for dummy memory clients
dt-bindings: tegra: Document compatible for IGX
Link: https://lore.kernel.org/r/20230609193620.2275240-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
CoreSight and hwtracing subsystem updates for v6.5 includes:
- Fixes to the CTI module reference leaks. This involves,
redesign of how the helper devices are tracked and CTI
devices have been converted to helper devices.
- Fix removal of the trctraceidr file from sysfs for ETMs.
- Match all ETMv4 instances based on the ETMv4 architected
registers and the CoreSight Component ID (CID), than having
to add individual PIDs for CPUs.
- Add support for Dummy CoreSight source and sink drivers.
- Add James Clark as Reviewer for the CoreSight kernel drivers
- Fixes to HiSilicon PCIe Tune and Trace Device driver
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEuFy0byloRoXZHaWBxcXRZPKyBqEFAmSS/goACgkQxcXRZPKy
BqFShQ//Z25Qnf0y2VdOBgZ1xWYeOTjkeQ2AVYE2hepV78N5rnI8BgcwlBNrF5IA
uTu2U+nSenkCurWk+wOrmXaQ2SXkEEp2Gsm866WzeL4OjWsqxpdoZ1l2u7/YqxMK
4QIP2ELS71KcQMIIJ31eYDSMro/gA8xDPh2QGhZKihUQAsoVQOghX7Y1eoT+4a/V
pvsngu71iM45jHR1eFkp9/rQCKhy9OA58Q8gtg21uotOja9jvHQpRZ4TGN7en0CP
RDVmIaxRDh3sPWoVpIPYs3nL8DX2NeSX5BVC/xq2P0UAHN6C9rp+Kom1XN7VZqS6
UdgyNw1iulwtGW0zF5jwZrj5ZGMY4CFQhS6R3/DF5ohzuSwtSOY32cYyLKrUjmpx
W0Nj7Pu/UaHU/kTu5+qItgTp0FP6du9p2VnZZuhroGLkGRSi2u392gKmPnKbErx5
8tLo2ucAw1Kasm7pef2rj9M9etcWJws+dD1qWg96fvuKvJQX9+milweyg0I4NTXy
p8GHpITZ65chWUJjqlxgnbvhB2V1eKP6bpG3sjzhCC2h9yXyzn4grOoSu/XNVQdx
W3ldxRMlsoIFBbUb42yJQROSVezaYVC+5sk+fufRVbNR3b5ZmJOGYiCUtM+MMvtj
q/1M/liPOYIf6Ix94EzxujdU12Ki5XLb5rWZqS3Gvebc8OG+o9E=
=XWfo
-----END PGP SIGNATURE-----
Merge tag 'coresight-next-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next
Suzuki writes:
coresight: Updates for v6.5
CoreSight and hwtracing subsystem updates for v6.5 includes:
- Fixes to the CTI module reference leaks. This involves,
redesign of how the helper devices are tracked and CTI
devices have been converted to helper devices.
- Fix removal of the trctraceidr file from sysfs for ETMs.
- Match all ETMv4 instances based on the ETMv4 architected
registers and the CoreSight Component ID (CID), than having
to add individual PIDs for CPUs.
- Add support for Dummy CoreSight source and sink drivers.
- Add James Clark as Reviewer for the CoreSight kernel drivers
- Fixes to HiSilicon PCIe Tune and Trace Device driver
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
* tag 'coresight-next-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux: (27 commits)
hwtracing: hisi_ptt: Fix potential sleep in atomic context
hwtracing: hisi_ptt: Advertise PERF_PMU_CAP_NO_EXCLUDE for PTT PMU
hwtracing: hisi_ptt: Export available filters through sysfs
hwtracing: hisi_ptt: Add support for dynamically updating the filter list
hwtracing: hisi_ptt: Factor out filter allocation and release operation
coresight: dummy: Update type of mode parameter in dummy_{sink,source}_enable()
Documentation: trace: Add documentation for Coresight Dummy Trace
dt-bindings: arm: Add support for Coresight dummy trace
Coresight: Add coresight dummy driver
MAINTAINERS: coresight: Add James Clark as Reviewer
coresight: etm4x: Match all ETM4 instances based on DEVARCH and DEVTYPE
coresight: etm4x: Make etm4_remove_dev() return void
coresight: etm4x: Fix missing trctraceidr file in sysfs
coresight: Fix CTI module refcount leak by making it a helper device
coresight: Enable and disable helper devices adjacent to the path
coresight: Refactor out buffer allocation function for ETR
coresight: Make refcount a property of the connection
coresight: Store in-connections as well as out-connections
coresight: Simplify connection fixup mechanism
coresight: Store pointers to connections rather than an array of them
...
This pull request contains the interconnect changes for the 6.5-rc1 merge
window which is a mix of core and driver changes with the following highlights:
- Support for configuring QoS on the Qualcomm's RPM-based platforms, that
required special handling of some interface (non-scaling) clocks.
- Support for clock-based interconnect providers for cases when clock
corresponds to bus bandwidth. This is used to enable CPU cluster bandwidth
scaling on MSM8996 platforms. One patch is touching a file in the clock
subsystem that has been acked by the maintainer.
Core changes:
interconnect: add clk-based icc provider support
interconnect: icc-clk: fix modular build
interconnect: drop unused icc_get() interface
Driver changes:
interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks
interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks
interconnect: qcom: rpm: Drop unused parameters
interconnect: qcom: rpm: Set QoS registers only once
interconnect: qcom: rpm: Handle interface clocks
interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks
interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore
interconnect: qcom: msm8996: Promote to core_initcall
interconnect: qcom: rpm: allocate enough data in probe()
dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF
clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq
dt-bindings: interconnect: fsl,imx8m-noc: drop unneeded quotes
Signed-off-by: Georgi Djakov <djakov@kernel.org>
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJkkyQsAAoJEIDQzArG2BZj7GQQAMLrW2sZcxJhq5Fe2wKV4W5M
ItIE7xME1Vk9PvuulZIJ57tZIKfOTJpXwwbh6qWJOejYGePrmgtT89iS0fadO81f
yCKv2O2hD+Xukv+gFzyuX3AYEfur7myaCTfmRx93xVDYUz0d95Kj4BlYA84xkjXU
i+wte+nX/nw9W78s+Y9BHcs389a3HTre0WR1c0eOboPmt8D0U9cBOdiZMHkSUc+4
/8RDUYRdsTBR0AblpPExm2JjoSRKUGEw7N8ZFZhOXaejCjmGoeVXeTdnHO+tjXaq
HQ9290C9Pz0BZWdKXaFFfjc4Wqu3RYjdXJmHNo74a4sFHE+H/j33eRSgC24qMWg5
5hRsH8+gv0ZhoyLv6Ucd2MRQQvvUYCLNNeTlQ2/RkOFuqewLKqpXCiihbuKUpOi0
CLeWKTDjNlIM5murJURXX88+xjZ1UvpuBXe/U+i9jrhjSQ6IjnAppoDw7anrrxTE
ldLGFPzJoWL8VO1H0povS08/kd25+fgkjL/3pZHagSMLjDWNOXA+xDLkRYGBCNi7
rZpLT/4nBFTcrcYEsJ2EPAqHYK19kD76NVrz+Fj2gzF9Ych3q+2MSkLb132Qkyzf
qLn3SqWJQoPAhy0kQbOt3XBnYon8QjVEpcZIWf9J3Qr2au4SdHi7hr3ki86a5Pfz
ne03bJDC237hO6q4jY0b
=Smk9
-----END PGP SIGNATURE-----
Merge tag 'icc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next
Georgi writes:
interconnect changes for 6.5
This pull request contains the interconnect changes for the 6.5-rc1 merge
window which is a mix of core and driver changes with the following highlights:
- Support for configuring QoS on the Qualcomm's RPM-based platforms, that
required special handling of some interface (non-scaling) clocks.
- Support for clock-based interconnect providers for cases when clock
corresponds to bus bandwidth. This is used to enable CPU cluster bandwidth
scaling on MSM8996 platforms. One patch is touching a file in the clock
subsystem that has been acked by the maintainer.
Core changes:
interconnect: add clk-based icc provider support
interconnect: icc-clk: fix modular build
interconnect: drop unused icc_get() interface
Driver changes:
interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks
interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks
interconnect: qcom: rpm: Drop unused parameters
interconnect: qcom: rpm: Set QoS registers only once
interconnect: qcom: rpm: Handle interface clocks
interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks
interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore
interconnect: qcom: msm8996: Promote to core_initcall
interconnect: qcom: rpm: allocate enough data in probe()
dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF
clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq
dt-bindings: interconnect: fsl,imx8m-noc: drop unneeded quotes
Signed-off-by: Georgi Djakov <djakov@kernel.org>
* tag 'icc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
dt-bindings: interconnect: fsl,imx8m-noc: drop unneeded quotes
interconnect: icc-clk: fix modular build
clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq
interconnect: drop unused icc_get() interface
interconnect: qcom: rpm: allocate enough data in probe()
interconnect: qcom: msm8996: Promote to core_initcall
interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore
interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks
interconnect: qcom: rpm: Handle interface clocks
interconnect: add clk-based icc provider support
dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF
interconnect: qcom: rpm: Set QoS registers only once
interconnect: qcom: rpm: Drop unused parameters
interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks
interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks
With dt-schema v2021.02 these properties are added by default. Some SoC
(e.g. imx8mq) configure more than just one clock using these properties.
Fixes: f9b0593dd4 ("dt-bindings: phy: Convert mixel,mipi-dsi-phy to json-schema")
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230609071538.149712-1-alexander.stein@ew.tq-group.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Make the pattern matching node names a bit stricter to improve DTS
consistency. The pattern is restricted to:
1. Only one unit address or one -N suffix,
2. -N suffixes to decimal numbers.
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20230530144851.92059-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Mutually exclusive s5m8767,pmic-buck[234]-uses-gpio-dvs properties can
be written simpler, with half of the lines of code.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230619101424.25897-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Lee Jones <lee@kernel.org>
Remove the unnecessary #address-cells and #size-cells nodes from
the fan-controller. These are not needed as the fan controller does not
have any children.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230612162444.3936302-1-tharvey@gateworks.com
Signed-off-by: Lee Jones <lee@kernel.org>
The arm64 documentation has move under Documentation/arch/ fix a reference
to match.
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Similar to commit 41ebfc91f7 ("dt-bindings: riscv: explicitly mention
assumption of Zicsr & Zifencei support"), the Zicntr and Zihpm
extensions also used to be part of the base ISA but were removed after
the bindings were merged. Document the assumption of their presence in
the base ISA.
Suggested-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230607-rerun-retinal-5e8ba89e98f1@spud
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Adds device tree binding documentation for system controller node present
in Mediatek MIPS and Ralink SOCs. This node is a clock and reset provider
for the rest of the world. This covers RT2880, RT3050, RT3052, RT3350,
RT3883, RT5350, MT7620, MT7628 and MT7688 SoCs.
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add binding for WSA8840/WSA8845/WSA8845H smart speaker amplifiers used
in Qualcomm QRD8550 board with SM8550 SoC.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230616115751.392886-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
The imx8ulp and imx8qm are compatible with imx8dxl. This will add such
compatible.
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230613083445.1129137-2-xu.yang_2@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Convert the binding to DT schema format. Besides, this also add clocks,
'#phy-cells', phy-3p0-supply and power-domains properties which are not
contained in txt file due to txt file lack updates.
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230613083445.1129137-1-xu.yang_2@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Add the compatible for the MAC controller on sa8775p platforms. This MAC
works with a single interrupt so add minItems to the interrupts property.
The fourth clock's name is different here so change it. Enable relevant
PHY properties. Add the relevant compatibles to the binding document for
snps,dwmac as well.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
T-Head:
Add a basic dtsi, Kconfig bits & trivial binding additions for the T-Head
1520 SoC (codename "light"). This SoC can be found on the Lichee Pi 4a,
for which a minimal dts is added.
Misc:
Re-sort the dts Makefile to be in alphanumerical order by directory.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZJDOAwAKCRB4tDGHoIJi
0gAoAQCqGDPqdw5MdT/+tTJqkAIVFo3KyxSrMHvv3TE36Xp1HgEAxJQ+NoZ30nhx
pbaJaRcZDw7PKOVmMJ92R564EMdjngA=
=hJMo
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSFO4ACgkQYKtH/8kJ
UiekuA//UW0YV5dUVykYY7EAB9ERnRfnD8S9SaaRQ+rvlZLLfceqcsGqHeB1f5nA
cb4mRcS47PgTZLBpS7ZaURXFaQtJMEqFKwC/y7cjsssuXq+Vr2jf3apEL2F8IVA3
EQGTBPA9AA2+L+hSnVNCqjJP86H8y4+RuWiADUTHG9tmPrMMwHaUdL/og7Bk4zps
jmBfZ6oD7upRS9+elwIInB+YH4dEnbty4VgVjJzL2PtGIS2V0zkSG+lmCv4JJmz8
esD4PT+4nnMBCh5LrGNxTJgn9zQyMHZ/pr1mK5n0hE+SLeZZj7DnEWKkchOJPdlk
Hu31+dJMjcTdvJAATIqeiuUPJhhpRyLf+PenXUX48uc/nu5GZWFj/TL/fdSHoYG1
D0B1SNcJOtWm5Iy7fukMoV8e6Pz8EePTh7m/AtUaudCCDFwh/ju1TnbIzqs9DPtc
iHYfFti7qVVQFL6YJnjpHHIK7UKJi4MguyDfKdl8RsRzT1Yhrx1aw0WqSYiY+a/z
sdAzA85yZpU7TPmCw1DThE6uNp3YC5XqKmexwcZx3+cmpCF7HKxCieTqyVgsUkwg
9BxsQmReP1bego4oK7dGE914i0lkaGH/wDVlL0PPGPoCL8g9ZIfBGukN8sG62m9O
sGPs2j4do28BK11Ow0OoRvVTbnoqZg0iGFJbk6DuWXtK881PfUc=
=U5qO
-----END PGP SIGNATURE-----
Merge tag 'riscv-dt-for-v6.5-pt2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt
RISC-V Devicetrees for v6.5 Part 2
T-Head:
Add a basic dtsi, Kconfig bits & trivial binding additions for the T-Head
1520 SoC (codename "light"). This SoC can be found on the Lichee Pi 4a,
for which a minimal dts is added.
Misc:
Re-sort the dts Makefile to be in alphanumerical order by directory.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-dt-for-v6.5-pt2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: dts: sort makefile entries by directory
riscv: defconfig: enable T-HEAD SoC
MAINTAINERS: add entry for T-HEAD RISC-V SoC
riscv: dts: thead: add sipeed Lichee Pi 4A board device tree
riscv: dts: add initial T-HEAD TH1520 SoC device tree
riscv: Add the T-HEAD SoC family Kconfig option
dt-bindings: riscv: Add T-HEAD TH1520 board compatibles
dt-bindings: timer: Add T-HEAD TH1520 clint
dt-bindings: interrupt-controller: Add T-HEAD's TH1520 PLIC
Link: https://lore.kernel.org/r/20230620-fidelity-variety-60b47c889e31@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
for 6.5, please pull the following:
- Krzysztof adds missing cache properties for the BCM63xx DSL routers
- Rafal relicenses a number of the BCM5301X DTS files to the GPL 2.0+ / MIT license,
and he fixes a number of Device Tree nodes warnings, adds MAC address
for all Luxul routers and adds Netgear R8000 Wi-Fi regulatory
information to the DTS
- Stanislav updates the "BCM mobile" SoCs DTS files to fix various
warnings
- Aurelien enables the BCM283x DTS files to be built with relocation
information to make them usable with DT overlays
- Christian fixes the Meraki DTS to have correct NAND ECC properties,
correct partition numbers and fixed-link node(s) properties
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmSQRAMACgkQh9CWnEQH
BwS+rg//Zp1d2bP9Vq7VrcxPyP+tB2VfxjpyGwKip/6wVB6rT2pUxph3B2Iml5OS
W0i4oZbE1cYIgbJJYGXE3BmnTU9LI6aJlIhH0zQBoMKNjkBCxVSSr8QytG/NuYn7
w40zXCZmLZUBz10AZXW6lIMv3bJtuoCJiDXvP9wjwcfclrfs+VrshQLPUtYlrWxp
LmDobd1Z6cw9eob9FtZ5Jo/w8RsGatNjORtfJkA5loozx0wP7vL267DtzmRKYNEo
pZ3MtZe/La3HOOfSd+/bVqi5HgTAQzszwQL+3Oi30eybhMhrvDXhQkGTUGzJOtf3
ajd7LfhN+JhEjBd53IJMAnpy1jMs4cRqibTAbUldLOrbcgRbHikicSNPPKGT8t8S
CRmb+oV8zBrmT9K1R2BJMjRYT4a7mTRY3a02vNnBHXsMtXZ959WCviVEuT6eIivo
5UpnoeFPW7ke4GiyWCqb240PmQ8mpe4LB5MkwpEwqhwdN58pPaQ4IgdS/+PBNGYi
ksVAmOjyHDW4Z/Q/yn67tcDr9h1v8r5nk7/eJMLMC00EQ1LE3ysg18ZpUKowIL67
N+WVWt0ZjUo62tABPIh1zXFtuj90kDZ3VdrK9EBdT1zzHNU51+aZnbjPs59lhwNy
Y4ZX4yu4p5loXjn+St7glZwBzsprQQHd6VNsRnFcgKynQzHtc3U=
=t3sW
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSFGYACgkQYKtH/8kJ
UifFjw//ZfVrYuz/WiXRWW0CKqsVzoB7M4aJ+ZrKHaaWGEqroc/2Hom7PNjRP0kA
BWaXDEfdFOhY53m9ycS0EG4/eMVwdxEgYq3e2rkA4CAXfW35e0stmMWFqcmml3QI
fv8xZEZKLLQy7D5yT4ZUS9FUqQeyOMnyQyq1P7m+87hN7JjUxJBjClhiFm6Hvo5g
WBW7qVWGi7HWewpxflcNy0SJChiAyX04FezN863JPtZu3wD3q6fJlp44LripYXEu
ekUdPFCtNultZd7t6Th3p4/4cESgXi18eQ6Cg3pfRJaEkwXUsvYTs+/ojUGEiQVI
vSyFDeWdKd/2S4LUv2oXkbzb6Id5Bdio5rI5Wp1gZiHEzoWSLzAA1c13oV3/NXzo
ilEi1hZQV303MaqrMiBD1rxrM++lCtkGkrPz+E59tip47p4YlJ5/oQj5FtW4rXlP
HLjOXDWQENf1rXPrspEYEixGHyF4CzJJsl6ZaQnwwtheo4+hm73xBxhir/c3zQFO
V/ptJh1v5Ys/S1jZMuk/XJkw39Q7/fwuKNP8L+3n8zxzQXb06DBJ2bBMmDOFarxG
8bLIypxsHtpwKa4UNyBXRhwdDVWttZLXaJD/+BQQDQgnX1BjTpTCJm9x5wBF39Yl
vA4IUunfMlP+aV5rGR0GMjjXti/A7sPEZe2xrH4wv7XrpSb34Ok=
=AA1g
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-6.5/devicetree' of https://github.com/Broadcom/stblinux into soc/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 6.5, please pull the following:
- Krzysztof adds missing cache properties for the BCM63xx DSL routers
- Rafal relicenses a number of the BCM5301X DTS files to the GPL 2.0+ / MIT license,
and he fixes a number of Device Tree nodes warnings, adds MAC address
for all Luxul routers and adds Netgear R8000 Wi-Fi regulatory
information to the DTS
- Stanislav updates the "BCM mobile" SoCs DTS files to fix various
warnings
- Aurelien enables the BCM283x DTS files to be built with relocation
information to make them usable with DT overlays
- Christian fixes the Meraki DTS to have correct NAND ECC properties,
correct partition numbers and fixed-link node(s) properties
* tag 'arm-soc/for-6.5/devicetree' of https://github.com/Broadcom/stblinux: (33 commits)
ARM: dts: BCM5301X: Add cells sizes to PCIe nodes
dt-bindings: firmware: brcm,kona-smc: convert to YAML
ARM: dts: BCM5301X: Add Netgear R8000 WiFi regulator mappings
dt-bindings: net: wireless: brcm,bcm4329-fmac: allow generic properties
dt-bindings: net: wireless: brcm,bcm4329-fmac: add BCM4366 binding
ARM: dts: BCM5301X: fix duplex-full => full-duplex
ARM: dts: BCM5301X: MR32: remove partition index numbers
ARM: dts: BCM5301X: MR26: MR32: remove bogus nand-ecc-algo property
dt-bindings: power: reset: bcm21664-resetmgr: convert to YAML
ARM: dts: bcm21664-garnet: use node labels
ARM: dts: bcm11351/21664: add UART, I2C node labels
ARM: dts: bcm-mobile: move status properties to the end of nodes
ARM: dts: bcm21664/23550: use CCU compatibles directly
ARM: dts: bcm-mobile: change "" includes to <> where applicable
ARM: dts: BCM5301X: Describe switch ports in the main DTS
ARM: dts: BCM5301X: Relicense Christian's code to the GPL 2.0+ / MIT
ARM: dts: BCM5301X: Drop invalid properties from Meraki MR32 keys
ARM: dts: BCM5301X: Drop invalid #usb-cells
dt-bindings: arm: bcm: Add bindings for Buffalo WZR-1166DHP(2)
ARM: dts: BCM5301X: Use updated "spi-gpio" binding properties
...
Link: https://lore.kernel.org/r/20230619134920.3384844-1-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This introduces support for the Qualcomm SDX75 platform, with the IDP
reference board. On IPQ5332 the RDP474 board is added and on IPQ9574 the
RDP454 is introduced.
On SC8280XP, and hence Lenovo ThinkPad X13s, GPU support is added.
For QDU1000, SDM845, SM670, SC8180X, SM6350 and SM8550 the RSC is added
to the CPU cluster power-domain to flush sleep & wake votes as the
cluster goes down.
On IPQ5332 additional reserved-memory regions to improve post mortem
debugging. UART1 is added. The MI01.2 board is renamed RDP441 and the
RDP474 is added.
On IPQ8074 critical thermal trip points are defined.
As with IPQ5332 additional reserved-memory regions are used to improve
post mortem debugging. Thermal sensors (tsens) are added and zones
defined. The crypto engine is added, and support for the RDP454 board is
added.
Across MSM8916 and MSM8939 pinctrl state definitions are cleaned up and
the purpose of msm8939-pm8916 is documented. MSM8939 has regulator
definitions cleaned up, following to the previous effort on MSM8916.
CPU Bus Fabric scaling support is added to MSM8996 Pro.
On QCM2290 CPU idle states are added.
For QDU1000 SDHCI is introduced and enabled on the IDP to gain eMMC
support. IMEM and PIL information regions are defined for improved post
mortem debugging.
The Qualcomm Robotics RB2 kit gets its on-board buttons described.
A few fixes are introduced for the newly merged SC8180X, in particluar
the DisplayPort blocks are moved to the MMCX power domain to avoid power
being reduced prematurely during boot.
The SC8280XP GPU is added and enabled for the Lenovo Thinkpad X13s,
and resets for the soundwire controllers are added. The OUI is
specified for ethernet phys on SA8540P Ride platform, to avoid reset
issues.
Charger description is added to the PMI8998 PMIC and enabled across
OnePlus 6/6T, SHIFT SHIFT6mq and Xiaomi Pocophone F1.
On SM6350 CPU idle states and UART1 are added. And SM6375 gains GPU
clock controller and IOMMU definitions.
The Fairphone FP4 gains Bluetooth support.
SM8150 is transitioned to use 2 interconnect-cells, and the USB
interconnect path is described to ensure buses are adequately voted for.
The same changes are done for SM8250, and the resolution of the
static framebuffer on Sony Xperia 1 II and 5 II are corrected.
The USB bus paths are also added to SM8350, SM8450 and SM8550.
On SM8550 DisplayPort nodes are added, as is the PWM controller for
driving the notification LED and the RTC is enabled. For the MTP and QRD
boards, the soundcard and audio codecs are defined.
A Tegra change, related to LP855X binding changes, was accidentally
picked up and dropped again later.
A number of DeviceTree fixes identified through validation was
introduced as well. Additionally a few nodes got their default status
changed to avoid unnecessarily having to enable them (e.g. the mdp/dpu
node).
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSLOjsVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FlyUP/0PZFIRutqnwwr/daOZAhDgw6pQW
jseUFIUb9yKan8KJZcHOf38xxqfj/bllQQNIQeM8qw03e7LJf/Mcteg3FYNgxD9m
vAWdQby2ZBcAYy3Qxjc3H+cb2fPV8yEJZ4JX/yOuLPfx9zE8HMoT8M9JBHZlZc8T
0fzgVxqRz1wt5Qjzv+BsWg4GUiTARtRbYxDVzdFZFDF6f7Xcpdsq+HaImJdYisXh
m/2lQ34rDBTVOMN6Og5U7lGjfCyk6hn3k0OoSpObLRBNV34JH6ViDVhmNbFWKNNS
QGFDAEa+jjQDrEo2cUHiHfnlKzcQpheLoco7MNkzDwy/8Rd3/k3ndj/+oCpgGea5
VFTb0LygJPQnHfggzpxc+v2pBfoocEUvKrI+sluXeNnLua+jvlLz6Z8Wm6mVaBZv
hzw4NqaXHRtzqgjo/37t7Hwns+uyd+rg/gjh8xfdu65/kVZiTstK1BGVCoKMs1LD
J0UcQGaevfBH9+EYNcKly5qjEMhsUxwn4i7oyjerdQ7Wt4nwzPqfs7zv513Ns5bO
eLG49FsCZjzvAn4AC3R1POPVrP2RBg/zeBzL/34gkgBLr/TR1k1zyPWxovb6Tuq9
8R3T4XBA1kwh1c7R5av1033dyvW4N8y6vp9z+kExuPz4qQ+SsWKoXAeM2budkTQ/
c3oBU6U+BH9oCvSV
=Fga/
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSEgoACgkQYKtH/8kJ
UifYRg//Uu6CMkGFJCfMVNS8Z0lykAW3FtEupzi+lWVP+2i+QsR8FXTZ3EumyBA6
QoRX1FtEKtRdJatMUgWlCbv8newKiII9fwKrV/EK7u/CTC79zX9ak3DonxXu7Z2i
a6dzH5GVnHfVe7BTQdJuOylxKneMNNECmnkYYUWry1LES1zLhUZy67GsdbDSCxpF
evzT8ly6NLSSJOJKXlcmwzcGMXhi7HrCdvsZhPdJZ1cN8c/tfrj+S8kmHxs5Qw3B
TOjFi14w2CA/duvwQLV+0KIuHc/Vn8oYI0NnD96aahlZA+QFMk1hsdeETtXL6guf
S4FKB+PNVtFnMCMq25xsTOaqEKjse8+xBgTN9TAvB67TJUQ3J2zibn1jjaGjtej7
w2ry8FC/pgSFbs9KftAL7mDFCICo7qyOhpfuuG+s+ti1m7h5Fon2a+UKc0T0m80w
qR1YXohi6rzXTlcV92m2CRZIvSBPf1UQAnFqyjZBIvePpD8/TqYs2M+IIM0dmaBC
Xs+n+3ORIte7hws5BodXaWwsi0NTFm8rQaeK94Cj100kWMxrKZS5JIIdZ/Dy0rRk
LXWKj1W4h6rrwM34r5oeyc0k9pYoc7coDItEqu8VyKz7pj9rjcG8B+lqdp6QjNK+
+gNnVF4UmEbRpG6EZm9uC9IshiIQp/8DhO/lRZMb37v1YEB6/mg=
=ThxV
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
More Qualcomm ARM64 DTS changes for v6.5
This introduces support for the Qualcomm SDX75 platform, with the IDP
reference board. On IPQ5332 the RDP474 board is added and on IPQ9574 the
RDP454 is introduced.
On SC8280XP, and hence Lenovo ThinkPad X13s, GPU support is added.
For QDU1000, SDM845, SM670, SC8180X, SM6350 and SM8550 the RSC is added
to the CPU cluster power-domain to flush sleep & wake votes as the
cluster goes down.
On IPQ5332 additional reserved-memory regions to improve post mortem
debugging. UART1 is added. The MI01.2 board is renamed RDP441 and the
RDP474 is added.
On IPQ8074 critical thermal trip points are defined.
As with IPQ5332 additional reserved-memory regions are used to improve
post mortem debugging. Thermal sensors (tsens) are added and zones
defined. The crypto engine is added, and support for the RDP454 board is
added.
Across MSM8916 and MSM8939 pinctrl state definitions are cleaned up and
the purpose of msm8939-pm8916 is documented. MSM8939 has regulator
definitions cleaned up, following to the previous effort on MSM8916.
CPU Bus Fabric scaling support is added to MSM8996 Pro.
On QCM2290 CPU idle states are added.
For QDU1000 SDHCI is introduced and enabled on the IDP to gain eMMC
support. IMEM and PIL information regions are defined for improved post
mortem debugging.
The Qualcomm Robotics RB2 kit gets its on-board buttons described.
A few fixes are introduced for the newly merged SC8180X, in particluar
the DisplayPort blocks are moved to the MMCX power domain to avoid power
being reduced prematurely during boot.
The SC8280XP GPU is added and enabled for the Lenovo Thinkpad X13s,
and resets for the soundwire controllers are added. The OUI is
specified for ethernet phys on SA8540P Ride platform, to avoid reset
issues.
Charger description is added to the PMI8998 PMIC and enabled across
OnePlus 6/6T, SHIFT SHIFT6mq and Xiaomi Pocophone F1.
On SM6350 CPU idle states and UART1 are added. And SM6375 gains GPU
clock controller and IOMMU definitions.
The Fairphone FP4 gains Bluetooth support.
SM8150 is transitioned to use 2 interconnect-cells, and the USB
interconnect path is described to ensure buses are adequately voted for.
The same changes are done for SM8250, and the resolution of the
static framebuffer on Sony Xperia 1 II and 5 II are corrected.
The USB bus paths are also added to SM8350, SM8450 and SM8550.
On SM8550 DisplayPort nodes are added, as is the PWM controller for
driving the notification LED and the RTC is enabled. For the MTP and QRD
boards, the soundcard and audio codecs are defined.
A Tegra change, related to LP855X binding changes, was accidentally
picked up and dropped again later.
A number of DeviceTree fixes identified through validation was
introduced as well. Additionally a few nodes got their default status
changed to avoid unnecessarily having to enable them (e.g. the mdp/dpu
node).
* tag 'qcom-arm64-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (94 commits)
Revert "arm64: dts: adapt to LP855X bindings changes"
arm64: dts: qcom: sc8280xp: Enable GPU related nodes
arm64: dts: qcom: sc8280xp: Add GPU related nodes
arm64: dts: qcom: msm8939-pm8916: Mark always-on regulators
arm64: dts: qcom: msm8939: Define regulator constraints next to usage
arm64: dts: qcom: msm8939-pm8916: Clarify purpose
arm64: dts: qcom: msm8939: Fix regulator constraints
arm64: dts: qcom: msm8939-sony-tulip: Allow disabling pm8916_l6
arm64: dts: qcom: msm8939-sony-tulip: Fix l10-l12 regulator voltages
arm64: dts: qcom: msm8939: Disable lpass_codec by default
arm64: dts: qcom: msm8939-pm8916: Add missing pm8916_codec supplies
arm64: dts: qcom: qrb4210-rb2: Enable on-board buttons
arm64: dts: qcom: msm8916: Drop msm8916-pins.dtsi
arm64: dts: qcom: msm8916/39: Rename wcnss pinctrl
arm64: dts: qcom: msm8916/39: Cleanup audio pinctrl
arm64: dts: qcom: apq8016-sbc: Drop unneeded MCLK pinctrl
arm64: dts: qcom: msm8916/39: Consolidate SDC pinctrl
arm64: dts: qcom: msm8916/39: Fix SD card detect pinctrl
arm64: dts: qcom: msm8996: rename labels for HDMI nodes
arm64: dts: qcom: sm8250: rename labels for DSI nodes
...
Link: https://lore.kernel.org/r/20230615162043.1461624-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
New Boards:
phyBOARD-Lyra-AM625 Board support
Toradex Verdin AM62 COM, carrier and dev boards
New features:
Across K3 SoCs:
- Error Signaling Module(ESM) and Secproxy IPC modules
- On board I2C EEPROM
- Voltage Temp Monitoring (VTM) module
- DM timers (GP Timers)
J784s4:
- R5 and C7x DSP remoteproc, ADC, QSPI
AM69:
- Addition of more peripherals: CPSW, eMMC, UARTs, I2C et al
J721s2:
- USB, Serdes, OSPI, PCIe
AM62a:
- Watchdog
J721e:
- HyperFlash/HyperBus
AM62:
- Type-C USB0 port
Cleanups and non-urgent fixes
Particularly large set of cleanups to get rid of dtbs_check errors and
dtc warnings:
- Addition of missing pinmux and uart nodes for AM64, AM62x, AM62A,
J721e, J7200 that are used by bootloader
- Split Pinmux regions/range to avoid holes for J721s2, J7200, J784s4
- Drop bootargs and unneeded aliases across all K3 SoCs
- Move aliases to board dts files from SoC dtsi files
- Move to generic node name for can, rtc nodes on am65
- s/-pins-default/default-pins/ to match upcoming pinctrl.yaml update
- Fix pinctrl phandle references to use <> as separator where multiple
entries are present
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEEyRC2zAhGcGjrhiNExEYeRXyRFuMFAmSLMAwQHHZpZ25lc2hy
QHRpLmNvbQAKCRDERh5FfJEW46tOCACQt9vBouxA7pmH+oerqdf8VDqJbjDsgnTx
kU3BUBLZn5qIJkeLqkoH5MueuE/H74mKKNBtRooAcRyUD9aZuxh/QC1/g2ITajWt
ndeHQzE6Hh4rNRtDrhp8CCU1FJdr8Ay3bqzPOOxwQKivFST2/i7+SbK0y8LnUN1B
QRoawzm0kaGH5tG41e5lbVsrIvG24MSoGq7PXrcCDMqD02cGOV0PBghZbUbmGMKG
sLPdbrh0uOHK8X6HNxUtOH3wKlQHHNU4RXGq8hoXlWQaf0Rdfd2fPPAioZVNJO+s
hPhSKCJIVkP7BhB1CpAVH1BKhWGaL7pEsBnUoDTeP7pFpxZF7qcD
=2tWW
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSEXUACgkQYKtH/8kJ
UicDIQ//WG9FtWtd+6icdB4hLnDm/aUjrP9VHeKE1p7AZp1J5+sSB8utbR6YcNKq
IvR8Tr58te59L5iUlcR+IA06iv3ny/AswXylhtvP2jITdlmQDpXS+pp5RwIlltiu
JOCk+3jhfH8HO9gp3Ubk1loIyOmaDkz7EIszyxLceKo1kmvzWt708wMUtST/uOJU
eF2hgBF1T3I0JSUFtiaW5RXdERIlV9Q0cTf9nPRAV8uwqJ7iExNt6O8pyf01ZZd5
rHBP4jNw/OEFvPin+gnkzXi91hNTpQj+Y+hdIZiTIOI3EuCwUU9WMBJ/rz+TrK/E
YEGicGpiM2rN+u8VucqnkZc+dGjIBpD8a6XBUObnSeHx34AyTMKeVIK5w88zbliR
SnLMl+hSh5DYOIx8tpD0ACG3aeaZk/42Fe3lWbnT6i4d4YI7C4+XDJAdWneaAXtF
BkNGxaHI4pgrzauNi1vAk7eSAiiiEKId4C2Lnh1tgD9T3ay23yRzVF3oPcxm7mqg
L13WJDysOo+0auc3zY0CcnzPOHNf0YB1jdBVEfl7K2HMcQBxjxSvv0rCnZ55m784
6k4eAR/6CPKiqYLBdESrgnAF74xse+odjanVYHtQrDoc68iNeWUg9i/csyl08L+2
BKvlQdTHIgOkoZcx45EEPVtVAbJceoumC6H09BYVGtVmWaxk8Fk=
=fJ6G
-----END PGP SIGNATURE-----
Merge tag 'ti-k3-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v6.5
New Boards:
phyBOARD-Lyra-AM625 Board support
Toradex Verdin AM62 COM, carrier and dev boards
New features:
Across K3 SoCs:
- Error Signaling Module(ESM) and Secproxy IPC modules
- On board I2C EEPROM
- Voltage Temp Monitoring (VTM) module
- DM timers (GP Timers)
J784s4:
- R5 and C7x DSP remoteproc, ADC, QSPI
AM69:
- Addition of more peripherals: CPSW, eMMC, UARTs, I2C et al
J721s2:
- USB, Serdes, OSPI, PCIe
AM62a:
- Watchdog
J721e:
- HyperFlash/HyperBus
AM62:
- Type-C USB0 port
Cleanups and non-urgent fixes
Particularly large set of cleanups to get rid of dtbs_check errors and
dtc warnings:
- Addition of missing pinmux and uart nodes for AM64, AM62x, AM62A,
J721e, J7200 that are used by bootloader
- Split Pinmux regions/range to avoid holes for J721s2, J7200, J784s4
- Drop bootargs and unneeded aliases across all K3 SoCs
- Move aliases to board dts files from SoC dtsi files
- Move to generic node name for can, rtc nodes on am65
- s/-pins-default/default-pins/ to match upcoming pinctrl.yaml update
- Fix pinctrl phandle references to use <> as separator where multiple
entries are present
* tag 'ti-k3-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (153 commits)
arm64: dts: ti: Unify pin group node names for make dtbs checks
arm64: dts: ti: add verdin am62 yavia
arm64: dts: ti: add verdin am62 dahlia
arm64: dts: ti: add verdin am62
dt-bindings: arm: ti: add toradex,verdin-am62 et al.
arm64: dts: ti: Add basic support for phyBOARD-Lyra-AM625
dt-bindings: arm: ti: Add bindings for PHYTEC AM62x based hardware
arm64: dts: ti: k3-j7200-mcu-wakeup: Remove 0x unit address prefix from nodename
arm64: dts: ti: k3-j721e-som-p0: Enable wakeup_i2c0 and eeprom
arm64: dts: ti: k3-am64: Add ESM support
arm64: dts: ti: k3-am62: Add ESM support
arm64: dts: ti: k3-j7200: Add ESM support
arm64: dts: ti: k3-j721e: Add ESM support
dt-bindings: misc: esm: Add ESM support for TI K3 devices
arm64: dts: ti: k3-j721s2-som-p0: Enable wakeup_i2c0 and eeprom
arm64: dts: ti: k3-j721s2-common-proc-board: Add uart pinmux
arm64: dts: ti: k3-am68-sk-som: Enable wakeup_i2c0 and eeprom
arm64: dts: ti: k3-am68-sk-base-board: Add uart pinmux
arm64: dts: ti: k3-am68-sk-base-board: Add pinmux for RPi Header
arm64: dts: ti: k3-j721s2: Fix wkup pinmux range
...
Link: https://lore.kernel.org/r/7fe0c6de-cb99-9c89-8583-b3855fde16f8@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Various small fixes and cleanups to be aligned with the latest dt-schema.
Other major changes are:
- Wire mali-400 gpu
- Change board name for zcu1275
- Use ethernet-phy-id to handle ETH phy reset properly
- Switch to amd.com emails
- Update people in DT bindings
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZIHGHgAKCRDKSWXLKUoM
IQW2AJ0eRZ5g7SYEg1y/zir6/j5s4RyaiACeO9EQJQ8nKkez73w4uoTBdmmOmlY=
=R8F0
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSEQgACgkQYKtH/8kJ
UidFLBAAyqGoiZH0Oh33f6R2nU1+NtH6pTiv4P1z1v8WmIMEvShHk+WhpGllqryC
rQKFwMdTIM3L2+zqYvUM5ksysBnbxePVVTV15qZaDpkbV1/Oz/G70EWF0VtGQYxk
/OLiMc84WMfaR772Htlb1mmos+9TtSlIwi5f0vkWRCOComPh+vc3u+GedUVBA3M/
9J0VuymgBeE9H4pGOruTNn1aUxD70hTXiP6Qz7Sv7Eksew80GfGlpNf5EqFM6Lrc
/Np03tHVN1lMLDmSbeHRM9ONDQDSEDM2IT0tvN9XH/p1vzKCBpRxHh7/7DVnJdae
G/NUGzw9uxZkmvKkXpjTRjYO08GQu6DxwO4G6qBOA9Rr77ibohVdLEvtfpfkwLxO
D9oFmi2NZjtyWii5G0xZkfnuB6aU9x2BsPRQduLTfTEYTWoJuoFnmBM/Zhinj0vO
2h0+2PqoT0LpwzcorsbCsk3mHPz0kqc3tNGOd2hGtRvmm2fLxoNbj0OqhLgFLYht
OUetwTNqWogKUEzjES526v6ulkAKWkSc0OrXOZkDVyWHCDdEQCMR121GlC6Qo5LK
5OLa2rR5iQ6Er6+N1lzg4AjB5s2k/C40K/pNQIm65uTB4D4YcCvcUABRuRMeR+Nn
FlgXDPPyytnZdNhRPt7AhFk10r+AbT8ad3LwjHEQlUT1Mxm+eck=
=jqDa
-----END PGP SIGNATURE-----
Merge tag 'zynqmp-dt-for-v6.5' of https://github.com/Xilinx/linux-xlnx into soc/dt
arm64: ZynqMP DT changes for v6.5
Various small fixes and cleanups to be aligned with the latest dt-schema.
Other major changes are:
- Wire mali-400 gpu
- Change board name for zcu1275
- Use ethernet-phy-id to handle ETH phy reset properly
- Switch to amd.com emails
- Update people in DT bindings
* tag 'zynqmp-dt-for-v6.5' of https://github.com/Xilinx/linux-xlnx: (33 commits)
dt-bindings: usb: xilinx: Replace Manish by Piyush
dt-bindings: xilinx: Remove Rajan, Jolly and Manish
arm64: zynqmp: Used fixed-partitions for QSPI in k26
arm64: zynqmp: Add pmu interrupt-affinity
arm64: zynqmp: Set qspi tx-buswidth to 4
arm64: zynqmp: Fix usb node drive strength and slew rate
arm64: zynqmp: Describe TI phy as ethernet-phy-id
arm64: zynqmp: Switch to amd.com emails
arm64: zynqmp: Convert kv260-revA overlay to ASCII text
dt-bindings: xilinx: Switch xilinx.com emails to amd.com
arm64: xilinx: Use zynqmp prefix for SOM dt overlays
arm64: zynqmp: Add phase tags marking
arm64: zynqmp: Describe bus-width for SD card on KV260
arm64: zynqmp: Enable AMS on SOM and other zcu10x boards
arm64: zynqmp: Enable DP driver for SOMs
arm64: zynqmp: Setup clock for DP and DPDMA
arm64: zynqmp: Switch to ethernet-phy-id in kv260
arm64: zynqmp: Disable USB3.0 for zc1751-xm016-dc2
arm64: zynqmp: Add pinctrl emmc description to SM-K26
arm64: zynqmp: Add gpio labels for modepin gpio
...
Link: https://lore.kernel.org/r/CAHTX3d+2s_KmCnd=x5hydGb+LYoznAzYGTizvqqN2NFmrBurfw@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
StarFive:
Watchdog nodes for both the JH7110 & its forerunner, the JH7100. PMU, P
being power, support for the JH7110. PMIC and frequency scaling support
for the JH7110 equipped VisionFive 2.
Most of the DT bits for the JH7110, and the SBCs using it, are pending
support for one of the clock controllers, so it's a smaller set of
changes than I would have hoped for.
Misc:
Pick up some dt-binding cleanup that Palmer assigned to me & had no
uptake from the respective maintainers. My powers of estimation failed
me again, with part of my motivation for picking them up being the
addition of new platforms that ended up not making it. Hopefully next
window for those, as they were relatively close.
Exclude the Allwinner and Renesas subdirectories from the Misc.
MAINTAINERS entry, since I do not take care of those.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZIdfVAAKCRB4tDGHoIJi
0mspAP4m1zrOWojsDmwpodCajBTW6PEtMAztxRUj/qeA4IEsYgEA+NI1DhrUkwZ6
K1vw1VzP56auVkdS3X7ZBhEpjfnkCg4=
=JA/v
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSEN8ACgkQYKtH/8kJ
UifaixAAmMZlmAkDRhrLELP1z4yAikRFqtS/T12sMw6uMz4CNaMPpT6EPKmsIktv
v8VS9MwwDsx3pYkO8jLzA5spXbaL8WFByykH4e1i8PrQjfWsLyVdjvLd4YzSxBic
RF10/HRrf2bcIAPIJj6G4pOo4FdWen3BPSheVL7VMxaRXpGnWTBvwCuhLlvNMdm2
NOz9KqW95o8U9zmskO21Gd7Y25dQAjdv4QP7G8w1hteW801zxVnFep5gMzra5fY0
q3226qcgmqBBa4RT5o23V6/3tLDcyCbnEwmPjXVo/Xspj+USRopOugdOOyTkXogE
M8JTkj874oTWojQaUcsqJBFIohruqXxYbA8VYitya7IALoIQJ5NOdGUtkqv6Tl/i
Y/VqP6Gh4Vi6ETtGnTLWl03eZ9wJBWvysJ/03FyabkKpDDYo1ABn9a4wDdwrPoXk
4okvCXDNDTYY19yxWlPOEIf3P/lVst5Cr2MPm0YGJDx4biTh0peg23GwncjvGnXk
FcRifMjshzU0N15WtXM5fwR02p6pM0j+PNFMuHRIUewqqWTFaKqIsdkbV3S3eM+l
TkN5G0Gklrx7VJbDqDS+ASsNCXWwR4AVHhoIZ99ldxAribiPOqAB0+20npn+Nchq
T4gFybdFEOuYB1aawEbk2LTh7hV7HJhTwpcYlNX1VNbyrXA6Yjs=
=NR4f
-----END PGP SIGNATURE-----
Merge tag 'riscv-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt
RISC-V Devicetrees for v6.5
StarFive:
Watchdog nodes for both the JH7110 & its forerunner, the JH7100. PMU, P
being power, support for the JH7110. PMIC and frequency scaling support
for the JH7110 equipped VisionFive 2.
Most of the DT bits for the JH7110, and the SBCs using it, are pending
support for one of the clock controllers, so it's a smaller set of
changes than I would have hoped for.
Misc:
Pick up some dt-binding cleanup that Palmer assigned to me & had no
uptake from the respective maintainers. My powers of estimation failed
me again, with part of my motivation for picking them up being the
addition of new platforms that ended up not making it. Hopefully next
window for those, as they were relatively close.
Exclude the Allwinner and Renesas subdirectories from the Misc.
MAINTAINERS entry, since I do not take care of those.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: dts: starfive: Add cpu scaling for JH7110 SoC
riscv: dts: starfive: Enable axp15060 pmic for cpufreq
dt-bindings: interrupt-controller: sifive,plic: Sort compatible values
dt-bindings: timer: sifive,clint: Clean up compatible value section
riscv: dts: starfive: jh7110: Add watchdog node
riscv: dts: starfive: jh7100: Add watchdog node
riscv: dts: starfive: Add PMU controller node
MAINTAINERS: exclude maintained subdirs in RISC-V misc DT entry
Link: https://lore.kernel.org/r/20230612-fasting-floss-0bc05a08bc7a@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Indiedroid Nova (rk3588)
- Add Edgeble Neural Compute Module 6B (rk3588)
- FriendlyARM NanoPi R2C Plus (rk3328)
- Anbernic RG353PS (rk3566)
- Lunzn Fastrhino R66S / R68S (rk3568)
The rk3588 got a lot of attention and gained support for the GIC ITS
(needed an errata from Rockchip), timers, otp memory, saradc and sdio.
The rk356x got support for its RGA block
With all the core improvements to rk3588 support, the Rock5b got a lot
improvements from that too, namely support for its PMIC, sd-card and
saradc, as well as a clock-rate fix for its es8316 codec.
Similarly the rk3588-evb1 also got support for its PMIC.
The Anberic RGxx3 series got a better bluetooth compatible and updates
to its LEDs to make them use the PWM blocks they're connected to.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmSGNgkQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgZKNCACYvQvOTfXL9HMlYQ2Fftzm3GEa9IVUVAr2
qgKiGj+cUm9y2O7eQBl/GF+6KyCnBxjh+697lAsZtEz7M6onEi9WVjsISl2dLq7Y
4FOMWRTbzjzdMrEfg3mUUgcoMkvGkuAV8gwMTV6VKBDEegZm2/SFGQv76NpJy8Zy
7HewtUKNggQ2OO1z6/umsreKS5qxqcRsw37fAq+dUGtJb2v71kmvYL8aiGHpy5sK
+fNxE1znXqcNu60btk+6iltXQ9tGlqH/lEH/gsCQ3uEgCLX9BId3vXyHPBVm9NiZ
qfMO7DJWioTjybZ0rHWh8eSkQ/DCAd+2ZQmoLtC4s/f1EkeK7jve
=V9LX
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSEDYACgkQYKtH/8kJ
UifxHRAAw5jJdUvdZc1YkRJ3KvO4eu5fCzUaWFobM7YhztQ+mt4v8KZ1fDsN/oME
V9Y1tGhjqL5NSRIhTyPvMzx4+jGor9PtiXMWVd35oqPY2lEeni94p8pXMipuZ6SE
7ifY+bioB5QX4QtmXrzrRNcD/s1mANGZCUaPcUOPyjkIc5qAVq5Eb1n/H2OuP56m
V0gWXZB8gMibdq3tkG4shuwFTgbRd3pBNDiI1YR1M42BSOBUoIZoxg/IwP1MPgE0
tpeG9SqANTu6pBIrlgTLozRJdyV29EeCZ+Cp+qbRKtqd4SWLf/+FyxuAEAP7wPi+
r0ty3KaAMpFK+5zIlptDCCfTOnrgO5tweJHWfbem24nL73kFaQicT+l4b4WLh3oW
1YPhxWktsFhzkO+2IcnBUpb2GSHvasObxvzoMep1rZzy9D0W2OfiUroUJjcAEl6b
NJuOUSDZaGo0XLv5EuJ8A6S3/4HQIS3HkJS47bD3TxMfj8jejCTF/Q79KCDqe3ub
EsWfjKDxBFMoTlanZy2iLnudkKIAiD/mcjHfZAHCpmSq2y0z1JC70YEICDHcp9iT
PRmDM0A9j0+csPUQ7YKZGpLHU/+/FNsJlVxAb2GWQ82HHrIULdqyXtbMJGjlv4j9
qCmDnhxOeMeTQcG270CAuf5LRYI9Fp5YlcIXAnk5V4+N8vCNbko=
=QogT
-----END PGP SIGNATURE-----
Merge tag 'v6.5-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
New boards are
- Indiedroid Nova (rk3588)
- Add Edgeble Neural Compute Module 6B (rk3588)
- FriendlyARM NanoPi R2C Plus (rk3328)
- Anbernic RG353PS (rk3566)
- Lunzn Fastrhino R66S / R68S (rk3568)
The rk3588 got a lot of attention and gained support for the GIC ITS
(needed an errata from Rockchip), timers, otp memory, saradc and sdio.
The rk356x got support for its RGA block
With all the core improvements to rk3588 support, the Rock5b got a lot
improvements from that too, namely support for its PMIC, sd-card and
saradc, as well as a clock-rate fix for its es8316 codec.
Similarly the rk3588-evb1 also got support for its PMIC.
The Anberic RGxx3 series got a better bluetooth compatible and updates
to its LEDs to make them use the PWM blocks they're connected to.
* tag 'v6.5-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (29 commits)
arm64: dts: rockchip: Add saradc node to rock5b
arm64: dts: rockchip: Fix compatible for Bluetooth on rk3566-anbernic
arm64: dts: rockchip: Add SD card support to rock-5b
arm64: dts: rockchip: add PMIC to rock-5b
arm64: dts: rockchip: Assign ES8316 MCLK rate on rk3588-rock-5b
arm64: dts: rockchip: Add Indiedroid Nova board
dt-bindings: arm: rockchip: Add Indiedroid Nova
dt-bindings: vendor-prefixes: add Indiedroid
arm64: dts: rockchip: Add sdio node to rk3588
arm64: dts: rockchip: add default pinctrl for rk3588 emmc
arm64: dts: rockchip: Add DT node for ADC support in RK3588
arm64: dts: rockchip: add PMIC to rk3588-evb1
arm64: dts: rockchip: Add rk3588 Edgeble Neu6 Model B IO
arm64: dts: rockchip: Add rk3588 Edgeble Neu6 Model B SoM
arm64: dts: rockchip: Add Rockchip RK3588J
dt-bindings: arm: rockchip: Add Edgeble Neural Compute Module 6B
arm64: dts: rockchip: Add RGA2 support to rk356x
media: dt-bindings: media: rockchip-rga: add rockchip,rk3568-rga
arm64: dts: rockchip: Add rk3588 OTP node
arm64: dts: rockchip: Add FriendlyARM NanoPi R2C Plus
...
Link: https://lore.kernel.org/r/3239799.44csPzL39Z@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This introduces the RDP442 and RDP433 reference devices on IPQ5332 and
IPQ9574, respectively. RDP418, RDP433, RDP449 and RDP453 on the IPQ9574
are added. On MSM8939 the Square T2 board and the Sony Xperia M4 Aqua is
added. Support for Acer Apire 1, built on the Snapdragon 7c platform is
introduced. Fxtec Pro1X on SM6115 is added. Lastly long floating
support for SC8180X and the Lenovo Flex 5G, and the Primus reference
device, has been added.
On IPQ5332 and IPQ6018 QFPROM support is introduced, and as described
above the RDP442 board on the prior. Download mode support and various
reserved-memory regions are also introduced on IPQ6018.
IPQ8074 gains another SPI controller.
On IPQ9574 CPU frequency scaling, low speed busses, RNG, Watchdog,
qfprom, SMEM and RPM are introduced. As are support for four new board,
mentioned above.
MSM8916 gains a range of structural improvements, to better suite the
various boards supported. Regulator constraints are corrected and their
states are adjusted to match reality (e.g. always-on regulators marked
as always-on). BQ Aquaris X5 gains support for front flash LED.
As mentioned above, MSM8939 support is introduced with support for
boards from Sony and Square.
MSM8953 gains DMA support in I2C masters.
MSM8996-based Sony Xperia boards gains description of their RGB
notification LED.
On SA8775P support for UFS, USB, GPU clock and iommu controllers, PMU,
AOSS, watchdog and missing low-speed controllers are added. On the Ride
platform UFS, USB and an i2c bus are enabled.
iommu properties are added to QSPI on both SC7180 and SC7280. LPASS
clocks are adjusted and MDP node cleaned up slightly, on SC7180. As
mentioned above, support for Acer Aspire 1 is introduced.
Long lingering patches introducing SC8180X, the Lenovo Flex 5G and the
Primus reference device has been merged.
On SC8280XP ethernet is added and enabled on the automotive ride
platform. An SDC controller is introduced and enabled on the SC8280XP
CRD. On the Lenovo Thinkpad X13s and the CRD reference device the USB
SuperSpeed phy is added to the Type-C graph, to enable support for
orientation switching.
Fairphone 3 gains support for its notification LED.
On SDM845 the iommu stream for QSPI is defined, SHIFT SHIFT6mq gains
support for flash LED and the RB3 (DB845c) board gains support for
bonded/dual DSI-mode, to allow 4k output.
On SM6115 CPU idle-states, crypto engine support and SuperSpeed USB PHY
are introduced. As mentioned above Fxtec Pro1X is introduced. On the
QRB4210 Robotics Platform RB2 USB, Audio and Compute DSPs, display,
CAN-bus and GPIO LEDs are introduced, fixed regulators are described and
the SD-card description is corrected.
Support for crypto engine is added to SM8150, while Sony Xperia 1 and 5
gains SD-card support, camera regulators and GPIO line names sorted out.
SM8250 also gets support for crypto engine, and Sony Xperia 1 II and 5
II gains support for hardware video accelerator.
Crypto engine is introduced for SM8350 as well. The HDK gets the USB
Type-C graph described for Superspeed orientation switching and
DisplayPort output.
On SM8450 video clock controller and crypto engine are added, missing
opp levels are introduced and the USB Type-C graph is defined for
orientation switching and altmode.
SM8550 gains GPU and video clock controllers and missing opp levels are
added. The WCD9385 audio codec is added for the SM8550 MTP and on the
QRD PCIe, USB, audio display and flash LED are added.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSFGfkVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FeKoP/RFCA0hnqP0TGgzQq7TV1//WbVuZ
5fxpWhSKYeb6e+oOJZdu/Xi7VwSWesZwQQkMRaEOXUpMGhtWBfLQEHc6FQiAzGkv
h3GrOLQ1qqmfYEqDxYv4CgKjpO+w5Zx2uNOZkbRDRumT0EQ45T0hypYmRefBPq8s
bOxNmRgY6goNZalZBb0HWvdZtfYB1tlrjVn5+rpEZb031KGhCSOH8SWx8wUdUHrj
7EYR4EeQQsJZETiinU3F8l69eNUBwAi8TAW350A3nJj+FPZqwVhIhQKCR/bCZqXC
U9vwcaqgYKi8rY5FR+bwJsiX4hY8W9bjq7pzrJyNvXsLtIeJ3jRnbF8z4SvNitOF
UMOkQ9f6WrToRNSrwFhLB/ipV/TbnnE/MNzIxCwQ5W1BRYn7Tri1Ws61I/Kl1/ML
eOWl6CSWzNW5lfkHumdOzydd4T43ECqqgNLEBTCpNRo7d/4XN/TCUK4tWJqb+4ou
1aOG6/ujy6uhlocd0mZ1xPMDBrFNCrC4/BRj2hCmbuBE3Qs/AHHrF5LLMTkZBKHd
Mip2gUKwqi2p4l0/KJxSSj0snrifUqU5V1QCchwcMFmt62mrfRU2u7Xoy9s7vlyP
pbQEF/Pu91Yr5nUiBQEU77L5a9tTm0eI1iFl8GwBzZP7R46ahnAu3BQc/MXaPax/
Z9hrTrB9y610Iuzy
=OvdD
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSD3wACgkQYKtH/8kJ
UidMjQ//YH19+b3UZ3O4r3sIoGTNB1rajNHCX72wwzQAdaHSMOTOUdkXradtstyp
EPNyChMERvBGq2i16B0mEk9IiQ4y4CVwR9l3FZcaasV25RhfcGX3K1Wqxuepc1Hu
OELo8W9Ih7rSg7paNj6YfJq1ka+AldZWPvtQG000czq59ZnUn7JvEeW7hd5BOdCJ
O5RloIxHhLIOSyyc+sK0d3hXLjcZ8Od0Pnu/QYMzslmtc7YLaRgs0F5pxwz51k/P
Uc+eOscCGcSHilmW7IE/IlevElg0GssyRn/BZ5121tMMKEYjEeR0EUy7I8zPaG45
osKJQ5R7NBd2h185ZXprskd9drvQ8uwv8kxRs5GFF+cK+3PE3TtoipmBycEQROcH
7WkQg7ffiPXT7Na+yTWqUXwnwzr/nhir7HTVx7VgBqmdUIzJKdqAbVLw/PTm0B6M
QXUZfIS8gZFLePYwzkYqhYcTgtT6ZfEY5aN2/vpI0xyZsU0Z6nbFzPxlI+4rlDXm
eZ7nD42RzifEqJUm7yKwGPkyY1U8rbwh4kNdaxZPk4ouB1puEYbF+Neo95MKlpRY
ODEz0u6oVvJ2Ddg/RxFDtwB3hUXupc2qZcE92Smq4Two9wjgTkuSb3A3+8CEjXqH
VFhBY65NxnwVEaabxE4wK9+wnLUnswza988BkkY7YrI+G8EZJL4=
=jxMR
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm ARM64 DeviceTree updates for v6.5
This introduces the RDP442 and RDP433 reference devices on IPQ5332 and
IPQ9574, respectively. RDP418, RDP433, RDP449 and RDP453 on the IPQ9574
are added. On MSM8939 the Square T2 board and the Sony Xperia M4 Aqua is
added. Support for Acer Apire 1, built on the Snapdragon 7c platform is
introduced. Fxtec Pro1X on SM6115 is added. Lastly long floating
support for SC8180X and the Lenovo Flex 5G, and the Primus reference
device, has been added.
On IPQ5332 and IPQ6018 QFPROM support is introduced, and as described
above the RDP442 board on the prior. Download mode support and various
reserved-memory regions are also introduced on IPQ6018.
IPQ8074 gains another SPI controller.
On IPQ9574 CPU frequency scaling, low speed busses, RNG, Watchdog,
qfprom, SMEM and RPM are introduced. As are support for four new board,
mentioned above.
MSM8916 gains a range of structural improvements, to better suite the
various boards supported. Regulator constraints are corrected and their
states are adjusted to match reality (e.g. always-on regulators marked
as always-on). BQ Aquaris X5 gains support for front flash LED.
As mentioned above, MSM8939 support is introduced with support for
boards from Sony and Square.
MSM8953 gains DMA support in I2C masters.
MSM8996-based Sony Xperia boards gains description of their RGB
notification LED.
On SA8775P support for UFS, USB, GPU clock and iommu controllers, PMU,
AOSS, watchdog and missing low-speed controllers are added. On the Ride
platform UFS, USB and an i2c bus are enabled.
iommu properties are added to QSPI on both SC7180 and SC7280. LPASS
clocks are adjusted and MDP node cleaned up slightly, on SC7180. As
mentioned above, support for Acer Aspire 1 is introduced.
Long lingering patches introducing SC8180X, the Lenovo Flex 5G and the
Primus reference device has been merged.
On SC8280XP ethernet is added and enabled on the automotive ride
platform. An SDC controller is introduced and enabled on the SC8280XP
CRD. On the Lenovo Thinkpad X13s and the CRD reference device the USB
SuperSpeed phy is added to the Type-C graph, to enable support for
orientation switching.
Fairphone 3 gains support for its notification LED.
On SDM845 the iommu stream for QSPI is defined, SHIFT SHIFT6mq gains
support for flash LED and the RB3 (DB845c) board gains support for
bonded/dual DSI-mode, to allow 4k output.
On SM6115 CPU idle-states, crypto engine support and SuperSpeed USB PHY
are introduced. As mentioned above Fxtec Pro1X is introduced. On the
QRB4210 Robotics Platform RB2 USB, Audio and Compute DSPs, display,
CAN-bus and GPIO LEDs are introduced, fixed regulators are described and
the SD-card description is corrected.
Support for crypto engine is added to SM8150, while Sony Xperia 1 and 5
gains SD-card support, camera regulators and GPIO line names sorted out.
SM8250 also gets support for crypto engine, and Sony Xperia 1 II and 5
II gains support for hardware video accelerator.
Crypto engine is introduced for SM8350 as well. The HDK gets the USB
Type-C graph described for Superspeed orientation switching and
DisplayPort output.
On SM8450 video clock controller and crypto engine are added, missing
opp levels are introduced and the USB Type-C graph is defined for
orientation switching and altmode.
SM8550 gains GPU and video clock controllers and missing opp levels are
added. The WCD9385 audio codec is added for the SM8550 MTP and on the
QRD PCIe, USB, audio display and flash LED are added.
* tag 'qcom-arm64-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (195 commits)
arm64: dts: qcom: sc8180x: Introduce Lenovo Flex 5G
arm64: dts: qcom: sc8180x: Introduce Primus
arm64: dts: qcom: sc8180x: Add pmics
arm64: dts: qcom: sc8180x: Add display and gpu nodes
arm64: dts: qcom: sc8180x: Add remoteprocs, wifi and usb nodes
arm64: dts: qcom: sc8180x: Add PCIe instances
arm64: dts: qcom: sc8180x: Add QUPs
arm64: dts: qcom: sc8180x: Add thermal zones
arm64: dts: qcom: sc8180x: Add interconnects and lmh
arm64: dts: qcom: Introduce the SC8180x platform
arm64: dts: qcom: msm8916: Move aliases to boards
arm64: dts: qcom: pm8916: Rename &wcd_codec -> &pm8916_codec
arm64: dts: qcom: msm8916/39: Clean up MDSS labels
arm64: dts: qcom: msm8916/39: Use consistent name for I2C/SPI pinctrl
arm64: dts: qcom: msm8916/39: Rename &blsp1_uartN -> &blsp_uartN
arm64: dts: qcom: msm8916: Rename &msmgpio -> &tlmm
arm64: dts: qcom: qrb4210-rb2: Enable USB node
arm64: dts: qcom: sm6115: Add USB SS qmp phy node
arm64: dts: qcom: ipq5332: add support for the RDP442 variant
dt-bindings: arm: qcom: document MI01.3 board based on IPQ5332 family
...
Link: https://lore.kernel.org/r/20230611004944.2481596-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Several new modules and devices are documented and fixes incorporated
for the Tegra234 GPIO controller pin mappings as well as the possible
Tegra XUDC PHY connections.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmSDRNITHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoSt4D/9EUOG7X/XQwI8kFjA7FzOtUP+5ARzz
svsnZ3SgeURmu5UskHkpZcN/9sFRTP2McsuTnsonA3n0gRX50abJwERorT2tLBBh
uLCiNR+8fArPzjul4k+xlAzOfm9EVbkxhS3sv9zBpae8C1aLKaxZPkEeHqDB+HFS
G1mmKMVeH/ucxjEBexMsUYTyB5So9qTyChvm1IMXeSujcHo9LA6K2EleiHygTZ2H
ZhNA1PZJUc7PxB72Q9K3TjAno/BZi2EAieuMqxbpiLWmFEalelAr8ZD2V29rNtDg
6fssP466SvOj1IO2yQdy8YH1l1aaJ6vzN0eJedDxqNeY5h+wzOA32LfPt98E2Vkh
WdqOW9Lyzp7CXm+V/Q34ZYpfHEw6oYg3VAUuolEaHWi/CdRMxG5bbPAa/znr/4jp
CsvZR4GHq4JfUbXch3oej8Pe3EjMb7Ewfh6zZDifFqz0wSMaTCVZ1c1QC5RNbnO7
iaCQkm5L13qOfCBBrw0EEree8emA5Aurid3ZouMgm4ITHl4vZfjinyiZyKOFcLNJ
TCVqWndsNRY8HXUw7IfJr2Liztnr69T4EJJV5T9olOaNfIA1LvKieieedFMcL8ew
7nPOiYoD0PV7MQPJHLY+4PUCbPWY500beqq5DvjurWBlxqud0m++xDg7SGERNmLQ
42NZY7asp5GCeA==
=vCMx
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSDSkACgkQYKtH/8kJ
UieToQ/+MfEiT/Zi5DI5aky65/B47dU6eGFoMtmvMlRoYY5CFwDHbmw56AqGz8sc
M5PKncJq2cdeK9LRHE1aMBeYkmRXXJw4UTpxDh75THlFYtKBwRLxnyTZLNNK/1j0
XrIDXWQmcpZE12J4LWUb3Z+me3lyk11EcaZ5kEFZipxo0c1zBiinj0HPQoQUddyX
+f49SJYDxmzd1RBigAO4JzcU6vbQTlqHZ/M8HUez81+N4xGRVgpQ/1P7Sdv+u65m
I8e/B/aC6WFo2GtmNKXsNzFHTxDmxEjxF6mjMqdkJgSoD0t0Y91IMi8rUsoJhpjF
2nRlrSUbQW9RCJjhk06jNhaon7HwN3JsYwr9M2fQG40fWWs9Ss10miup+eR6iCIg
RVI4ZrLmDhgrZdCvoBgwUPrxUXsTxw8Ke1sQFrxNNaBnx+5GpQn6wSv+uioOMXoM
MM36UpJ4GfLcbcoGs365cItWVjr0ZWj5DLC+i0qLFpDz79gBQOF+dF8e+a1HlVBZ
CMn3CtWamSBgMm1KpdXFG6cpRfgFIlCTP7FgEUTtLMA1VVFKzybcVDG+Gf2FRVLk
zA0LgGpRJLMVwu0s7EKs7PLqKfqB96eDfn3LnkQ+W6I4hxVH3INSEeAA//MgNADy
qZzTj4ABp3M7iVEwa/XC1SrC+DGd8ij8P9aTjN6o+1zWRf9CgtA=
=Nf/9
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.5-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
dt-bindings: Changes for v6.5-rc1
Several new modules and devices are documented and fixes incorporated
for the Tegra234 GPIO controller pin mappings as well as the possible
Tegra XUDC PHY connections.
* tag 'tegra-for-6.5-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: tegra: Document Jetson Orin Nano Developer Kit
dt-bindings: tegra: Document Jetson Orin Nano
dt-bindings: gpio: Remove FSI domain ports on Tegra234
dt-bindings: usb: tegra-xudc: Remove extraneous PHYs
dt-bindings: tegra: Add ICC IDs for dummy memory clients
dt-bindings: tegra: Document compatible for IGX
Link: https://lore.kernel.org/r/20230609193620.2275240-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
----------
- MCU/MPU:
- Replace deprecated st,hw-flow-ctrl by uart-has-rtscts.
- Fix LTDC/DSI warnings.
- MPU:
- STMP32MP15:
- Add OTP part number and Vrefint calibration in bsec.
- M4 hold management updated. As SMC call is deprecated,
the service is moved on a SCMI service.
- Add ADC internal channels (VREFINT/VDDCORE).
- ST:
- Enable ADC1&2 on STM32MP15 DKx boards.
- Adopt generic IIO bindings on STM32MP157C ED1
- Add supplies for OV5640 in STM32MP157C EV1
to fix yaml validation.
- Fix i2s bindings to match with the YAML validation (DKx boards).
- DH:
- Rearrange MAC EEPROM.
- Rename AV96 sound card.
- Adopt generic IIo bindings.
- Fix audio routing.
-PHYTEC:
- Add PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM.
This SOM embeds up to 1GB DDR3LP RAM, up to 1GB eMMC,
up to 16 MB QSPI and up to 128 GB NAND flash.
-----BEGIN PGP SIGNATURE-----
iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmSG4vUdHGFsZXhhbmRy
ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIU4oQ/8CUQbDKstyUVvvyyh
LuXYukVD8GMCoP5yJrpZm3kWBxQvG6LIDpALpo4C5wcuRGCUUcighYh/4cqSyMjR
OHg27YeeasaXQG271aLlJ9/FjzZagJNW682uhwIhL14FB7sbJfh630wHdj/YOph8
lR99AFxYomd4aVKbV8LLLk5Eb6hS9ZKRxhb8Hn1J2GlWjg1S2oHJm8WInc4QR4Xh
J6gCvnYvN9facvQvzUu5mpWhkBF5kMT4kGhj2HWgBurZSVuxfLklcyfXETr7gSoo
oEyHzTI1Oq9YC0nU7r+sCmWMHpVxDY02eLsDwXpEC1ww66ZNYpkB7V1C2GDsnJKV
OFcLe9phs3yNrONia1pyyySCUV+VZIovuOl6iVh2g2ADfP4CPtq+RkAS9qPwT5j9
SAvyfCIiYaYEVT8k+jZOP/HajLpJuWl6SOgGtk8NpP2vWCjIEJuUj5XHj5K0iei9
8Lp2tIy1kVNHT97gG9YKEbtd2wrluE/1mff1iZIPArG0alwGNgiGTwGzesbXXjk6
zuvDlQIwL1b8P3Pg+zKR8sawZcSS2uXZsFWO9wNVsWfQM5JUAiy52KLoygvOdgpO
/qKyOl+QfVXJPRwQgNOMEcquzL+CHqXs2IaN3i9B3TAQ5g3il8xIY36swX2aN30P
lxTR/D+/yQ1Cw/L+55DPKCXn2WU=
=kf1Q
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSDJoACgkQYKtH/8kJ
Uif9qxAAnrSnL55CNXoWGiGjhyZxw4Vscm1cBYlSHINoH4wdumRteV3Ux74SCsyy
rlny5kIi2g5Le/EXYA0cH4GbEtXUzm+xyrPGUM7M67AStIE3es51OCoOS4JBYw34
jv82s+rzuXUTogruS5EhkZ6NDve2Oo+sPIjdJWKhf/kV90uocrsQt7AwYs9MSs0t
cr46LaTUqXIHYyig8TbW7bNYqZTKn+0xCLo5DSeToru1dhBNraNkATapGglv7P1q
tcVexjf0SpsST8K7AW0R796urxrSCLBw3bFLqGodArs5N76RObcBLWasVqZPEC8q
Uy2JAyiNGWzSPjAznUBnllCndxOd+0wqSKYkffR8jjSpYvcL0aoqi8F+Lqa+C/Dv
I2SHA2JhAwYdKj5Zc9SGFuVcwb7ABNBi4uimjm9rwlYmKHeHzFrIh5pcROpPi3qe
4/8YNjyx5LyvZ7su+GFGhLAi7XmhtJ7j07BuRfMJJcOdw6AxOvzvNxIZvmNN8evV
U9r6/NXJaLw4SmhhlXTTatWnU/oxx8GvXja/tFfReotFuefBjwYYhhsjRcebtaXr
RFEtCjtauVHdQRxsJbeuCZ56l5Sjliqg4EJ5AuOEpXf4s4Z98ZEoO5KPWWTFlwjp
Th2zLU3pbJPqbQcp9lxN+ETBemuYhr97XrNmFpitec7kTjl/hTM=
=kRKO
-----END PGP SIGNATURE-----
Merge tag 'stm32-dt-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.5, round 1
Highlights:
----------
- MCU/MPU:
- Replace deprecated st,hw-flow-ctrl by uart-has-rtscts.
- Fix LTDC/DSI warnings.
- MPU:
- STMP32MP15:
- Add OTP part number and Vrefint calibration in bsec.
- M4 hold management updated. As SMC call is deprecated,
the service is moved on a SCMI service.
- Add ADC internal channels (VREFINT/VDDCORE).
- ST:
- Enable ADC1&2 on STM32MP15 DKx boards.
- Adopt generic IIO bindings on STM32MP157C ED1
- Add supplies for OV5640 in STM32MP157C EV1
to fix yaml validation.
- Fix i2s bindings to match with the YAML validation (DKx boards).
- DH:
- Rearrange MAC EEPROM.
- Rename AV96 sound card.
- Adopt generic IIo bindings.
- Fix audio routing.
-PHYTEC:
- Add PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM.
This SOM embeds up to 1GB DDR3LP RAM, up to 1GB eMMC,
up to 16 MB QSPI and up to 128 GB NAND flash.
* tag 'stm32-dt-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (34 commits)
ARM: dts: stm32: fix i2s endpoint format property for stm32mp15xx-dkx
ARM: dts: stm32: Fix audio routing on STM32MP15xx DHCOM PDK2
ARM: dts: stm32: add required supplies of ov5640 in stm32mp157c-ev1
ARM: dts: stm32: Update to generic ADC channel binding on DHSOM systems
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-testbench
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-drc
ARM: dts: stm32: adopt generic iio bindings for adc channels on emstamp-argon
ARM: dts: stm32: adopt generic iio bindings for adc channels on stm32mp157c-ed1
ARM: dts: stm32: enable adc on stm32mp15xx-dkx boards
ARM: dts: stm32: add vrefint support to adc2 on stm32mp15
ARM: dts: stm32: add vrefint calibration on stm32mp15
ARM: dts: stm32: add adc internal channels to stm32mp15
ARM: dts: stm32: fix ltdc warnings in stm32mp15 boards
ARM: dts: stm32: fix dsi warnings on stm32mp15 boards
dt-bindings: display: st,stm32-dsi: Remove unnecessary fields
ARM: dts: stm32: fix warnings on stm32f469-disco board
ARM: dts: stm32: Shorten the AV96 HDMI sound card name
ARM: dts: stm32: fix m4_rproc references to use SCMI for stm32mp15
ARM: dts: stm32: Update Cortex-M4 reset declarations on stm32mp15
ARM: dts: stm32: add STM32MP1-based Phytec board
...
Link: https://lore.kernel.org/r/08d711de-bb6d-a976-735b-5e18b19818ea@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
----------
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35,
common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3,
parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH,
CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
-STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/A35 frequency:
-STM32MP25xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
This PR adds the STM32MP257F EV1 board support. This board embeds a
STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports),
2*USB typeA, 1*USB2 typeC, SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...
-----BEGIN PGP SIGNATURE-----
iQJQBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmSG5+AdHGFsZXhhbmRy
ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIUXEA/4mb17fH6BUDc1wGHb
kl7XJh8s9A98Wbjlei+fgZ6VfDRU1KuEkna/TJ+8QwBadb450RSPxCozWyaT94kq
EeVHw2pyQELBA7T4Cu/3OzyD2dQj/hELbWKlUT5UedMibguxYb+IyxMqOrw29Ghb
t5G1cfJknkbXQDKrEVDynUHoRcDIb3vLXhvL3Z8ExSDBaaVdhrpXyJow4fRBUgtY
gqEnVJHOVHsu5k+Ah2/2SaMUpxfQIUduxFMsk7pAFiZU+nRQI03Cn6EKADCIgmS0
1LZVhjfO15Tm5X2bDN+gHqC+3ASZGZqe4KkUF5RfIN+2K1Jo8CMCoezHga0y03Lb
EN6PEoHhriqNs/2azFLTQbua0RzkdJxXNNWAG5I+I0qim6hicTV9YCkkxIQlhNxu
K67BdvBEJrDNBYlkk4DDaiGRuPFSoitwYMnZqCrvLGtxtTbjrMjppCCvdJPrCGBr
aY/1hLePnnxdBvCFKODKkiAT48gPjZoEhLrbegIY2XMqseciX4o9JZbXmnMVdpqD
2l1M2xsyVe5Jxv8JRfnr6GfUj0FVIgxB8tUII7OpXxTGZN9MaOt/92DKTbvLdvma
MwIOIMKB5QYFytCNwjFMI2LJopfiFJNUKk2Yd+WNWGaEG1LmdhTSIIROQBMDM5Zg
xTR+DvbdtbgyTSSsuBDGw1UWnA==
=WkNC
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSC/wACgkQYKtH/8kJ
UidpWhAAn9bQwdIJdetMmMiJuvFJIqPg48K9OmvEpEYCxAwVFuKTV+ddGDM2kLwB
rinJ5R92FsCUBN54mPpfq75atuhZA8S3Od4N8jbjK7Geqq0MIUv6yaGYNyKJfDrx
NO3+UzIpF17eqiXDTY4ZEdw+FfWJ1fr1rKN2DNyqIQDIibvOR8smuAE9suIdNsht
0k0LOCk+PXRaNws6wIeXM71v42trb8S5UG02qQzet1qwsK7OXUc7xouTr6vQ7xMR
H4NiuEL0XfkhsxsSLhbFSpWzRoVcKhhyZzibNu4l5npBvL0VZPyYrJOU7MAODy5D
IWIS07/BNWrKx/XhCyz7w0ID2SsMGxAgGeOMx1eG3WT5953z5tWOqBgZGWrObQMO
QR4F2h+f9InLblHEdLa+n1Nfm6SAgGEA+JnDDHSbuiH1t/g01wazxCAi6Awoxur6
jv7iINiy2UauRs7/Fns0z1J0gag/8afxTYiEzBQSMdrE4zgaKKGtryoflUOXZe9W
foXtU4+mRAExrZN/3gxYQyvvLxQF7vllCYtuzeUyJzpXuYwE5clpjjEn93txXtPr
EjIS+fg3cgABaD26607ueGomQIdKxjWj/1tZSaut1yWs/zeuRjS15dT68IzzI0mK
Qk1v6mLx+gdnOQv8mn5JfzOC8MTDBrAE53B6M+mI9nZrV3VhhhE=
=fxHg
-----END PGP SIGNATURE-----
Merge tag 'stm32-mp25-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/newsoc
STM32 STM32MP25 for v6.5, round 1
Highlights:
----------
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35,
common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3,
parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH,
CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
-STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/A35 frequency:
-STM32MP25xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
This PR adds the STM32MP257F EV1 board support. This board embeds a
STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports),
2*USB typeA, 1*USB2 typeC, SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...
* tag 'stm32-mp25-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (44 commits)
MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE
arm64: defconfig: enable ARCH_STM32 and STM32 serial driver
arm64: dts: st: add stm32mp257f-ev1 board support
dt-bindings: stm32: document stm32mp257f-ev1 board
arm64: dts: st: introduce stm32mp25 pinctrl files
arm64: dts: st: introduce stm32mp25 SoCs family
arm64: introduce STM32 family on Armv8 architecture
dt-bindings: stm32: add st,stm32mp25-syscfg compatible for syscon
pinctrl: stm32: add stm32mp257 pinctrl support
dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages
ARM: dts: stm32: fix i2s endpoint format property for stm32mp15xx-dkx
ARM: dts: stm32: Fix audio routing on STM32MP15xx DHCOM PDK2
ARM: dts: stm32: add required supplies of ov5640 in stm32mp157c-ev1
ARM: dts: stm32: Update to generic ADC channel binding on DHSOM systems
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-testbench
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-drc
ARM: dts: stm32: adopt generic iio bindings for adc channels on emstamp-argon
ARM: dts: stm32: adopt generic iio bindings for adc channels on stm32mp157c-ed1
ARM: dts: stm32: enable adc on stm32mp15xx-dkx boards
ARM: dts: stm32: add vrefint support to adc2 on stm32mp15
...
Link: https://lore.kernel.org/r/080fc303-45c1-6cc0-4c5e-694e730896a6@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint. Also absolute path
starting with /schemas is preferred.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230609140754.65158-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint. Also absolute path
starting with /schemas is preferred.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230609140749.65102-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230609140655.64529-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
The hibernation feature enabled for Xilinx Versal NET SoC in DWC3 IP.
As the DWC3 IP supports the hibernation feature, to handle the wakeup
or hibernation interrupt, add host mode "wakeup" interrupt-names
optional property in the binding schema to capture remote-wakeup and
connect/ disconnect event in the hibernation state and increased maxItems
to 4 for the interrupts and interrupt-names property.
We have a dedicated IRQ line specifically for the hibernation feature.
When the "wakeup" IRQ line is triggered, it initiates a hibernation
interrupt, causing the system to wake up from the hibernation state.
Signed-off-by: Piyush Mehta <piyush.mehta@amd.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230619105032.2888128-1-piyush.mehta@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
For STM32MP25, we'll need to distinguish how is managed the delay block.
This is done through a new comptible dedicated for this SoC, as the
delay block registers are located in SYSCFG peripheral.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230619115120.64474-2-yann.gautier@foss.st.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Convert Microchip AT91 SAMA5D2 shutdown controller to YAML. SAMA7G5 SHDWC
DT node (available in arch/arm/boot/dts/sama7g5.dtsi) has syscon along with
its compatible. There is no usage of this syscon in the current code but it
may be necessary in future as some registers of SHDWC are accessed in
different drivers (at91-sama5d2_shdwc.c and arch/arm/mach-at91/pm.c).
Thus update the YAML with it to make DT checkers happy.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/20230609140706.64623-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Detailed description for this pull request:
1. Clean-up extcon core without any behavior changes
- Add extcon_alloc_cables/muex/groups to improve the readability
of extcon_dev_register.
- Fix kernel doc of property and property capability fields to aovid warnings
and add missing description of struct extcon_dev.
- Use DECLARE_BITMAP macro and sysfs_emit instead of sprintf
- Use device_match_of_node helper instead of accessing the .of_node
- Use ida_alloc/free to get the unique id for extcon device
2. Update extcon-usbc-tusb320.c to support usb_role_switch and accessory detection
- Add usb_role_switch support on extcon-usbsc-tusb320.
- Add additional accessory detection for audio/debug accessory
and then pass the deteced accessory information to typec subsystem
on extcon-usbsc-tusb320.c.
- Add the support of unregistration of typec port on both error handling
and driver removal step on
3. Update extcon provider drivers (apx288/qcom-spmi-misc/palmas)
- Replace put_device with acpi_dev_put on extcon-axp288.c
- Use platform_get_irq_byname_optional for getting irq of
usb_id and usb_vbus on extcon-qcom-spmi-misc.c.
- Remove unused of_gpio.h on extcon-palmas.c.
4. Fix the devicetree binding document
- Rename misc node name to 'usb-dect@900' on pm8941-misc.yam
- Fix usb-id and usb_vbus defintion on pm8941-misc.yaml
- Drop unneeded quotes from extcon-arizona.c devicetree documentation
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEsSpuqBtbWtRe4rLGnM3fLN7rz1MFAmSQYzMACgkQnM3fLN7r
z1MEmQ/+PQYDL5XBYEAunp1jURWHFVC+ee9DMq0L9gx2OSZ32nNslCAXrtElGQYF
FG/bh+frPVRUSrYklDUBT1aQ87acE3aGIElfwf+GTjUksvi/tTwY/JaA58Y5IthF
ZF86WBd1vDhTtMs0MCzfTZimfGWpckuBUEYr9yj0HJNc9ECh6tIdrJfReUF9SOtV
wZ6HGC/13jr31cGiMW11sH5kImz7y4AAe7Q1ZYlEGaut1mfmcDxLjeW9GqQLxqme
bHFThcXP+NESuB+7kLEEGtoCp3Tyyt5Je15onmVine7Vznwr0blUVv+d1NtdWNPX
85mtqCSASiRSqXaUccqabjs2fKXP7gOFE+3t0cMaBRMfn3+Zd6mscBEMVOFXskA3
WbvhFSX5UiY1pgGRW6sDMujrpItgS9KioJuFxOf3uRgZNy7tyJYQRaEp+5Dh7bBN
LksNfE5vXdMJKgMw/g/b7WalPj8REsiiYGCignCCEs1MB2gjUryrqT0WzLu/LKSC
OpH+xd08D7H7xu4jqWiD0ZkQs7OTACpj5GT1Xg7CsLwOhlthzHSs+sypi9h8+wVw
tToQXqSyfjrLgk0O6Ry+vKfzfgQoZqM4m4JjF8Pce1NctU3MWwhBU6hwRjeEj3lv
f5BppEk2VYDr6ofy1+OucrF/njR6QrTDlWdU8G+1g8PStWNrl4U=
=3D98
-----END PGP SIGNATURE-----
Merge tag 'extcon-next-for-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon into char-misc-next
Chanwoo writes:
Update extcon next for v6.5
Detailed description for this pull request:
1. Clean-up extcon core without any behavior changes
- Add extcon_alloc_cables/muex/groups to improve the readability
of extcon_dev_register.
- Fix kernel doc of property and property capability fields to aovid warnings
and add missing description of struct extcon_dev.
- Use DECLARE_BITMAP macro and sysfs_emit instead of sprintf
- Use device_match_of_node helper instead of accessing the .of_node
- Use ida_alloc/free to get the unique id for extcon device
2. Update extcon-usbc-tusb320.c to support usb_role_switch and accessory detection
- Add usb_role_switch support on extcon-usbsc-tusb320.
- Add additional accessory detection for audio/debug accessory
and then pass the deteced accessory information to typec subsystem
on extcon-usbsc-tusb320.c.
- Add the support of unregistration of typec port on both error handling
and driver removal step on
3. Update extcon provider drivers (apx288/qcom-spmi-misc/palmas)
- Replace put_device with acpi_dev_put on extcon-axp288.c
- Use platform_get_irq_byname_optional for getting irq of
usb_id and usb_vbus on extcon-qcom-spmi-misc.c.
- Remove unused of_gpio.h on extcon-palmas.c.
4. Fix the devicetree binding document
- Rename misc node name to 'usb-dect@900' on pm8941-misc.yam
- Fix usb-id and usb_vbus defintion on pm8941-misc.yaml
- Drop unneeded quotes from extcon-arizona.c devicetree documentation
* tag 'extcon-next-for-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon: (26 commits)
dt-bindings: extcon: wlf,arizona: drop unneeded quotes
extcon: Switch i2c drivers back to use .probe()
extcon: Drop unneeded assignments
extcon: Use sizeof(*pointer) instead of sizeof(type)
extcon: Use unique number for the extcon device ID
extcon: Remove dup device name in the message and unneeded error check
extcon: Use dev_of_node(dev) instead of dev->of_node
extcon: Use device_match_of_node() helper
extcon: Amend kernel documentation of struct extcon_dev
extcon: Use sysfs_emit() to instead of sprintf()
extcon: Use DECLARE_BITMAP() to declare bit arrays
extcon: Fix kernel doc of property capability fields to avoid warnings
extcon: Fix kernel doc of property fields to avoid warnings
extcon: usbc-tusb320: add USB_ROLE_SWITCH dependency
extcon: usbc-tusb320: add usb_role_switch support
extcon: usbc-tusb320: add accessory detection support
extcon: Add extcon_alloc_groups to simplify extcon register function
extcon: Add extcon_alloc_muex to simplify extcon register function
extcon: Add extcon_alloc_cables to simplify extcon register function
extcon: Remove redundant null checking for class
...
Backmerging into drm-misc-next to get commit 2c1c7ba457
("drm/amdgpu: support partition drm devices"), which is required to fix
commit 0adec22702 ("drm: Remove struct drm_driver.gem_prime_mmap").
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
StarFive JH7110 platforms USB have a wrapper module around
the Cadence USBSS-DRD controller. Add binding information doc
for that.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Peter Chen <peter.chen@kernel.org>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230518112750.57924-6-minda.chen@starfivetech.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Create tas2781.yaml for tas2781 driver.
Signed-off-by: Shenghao Ding <13916275206@139.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230618122819.23143-4-13916275206@139.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Convert Broadcom Kona family Secure Monitor bounce buffer bindings
to DT schema.
Changes during conversion:
- move from misc to firmware subdirectory
- add used, but previously undocumented SoC-specific compatibles
- drop deprecated compatibles (they've been deprecated for ~10 years)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com>
Link: https://lore.kernel.org/r/20230618151308.GA23586@standask-GA-A55M-S2HP
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
DTS and driver already support pcie_clkreq function for a pin. Add it
to fix dtbs_check warning:
qcom-sdx65-mtp.dtb: pinctrl@f100000: pcie-ep-clkreq-default-state: 'oneOf' conditional failed, one must be fixed:
'bias-disable', 'drive-strength', 'function', 'pins' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+'
'pcie_clkreq' is not one of ['blsp_uart1', 'blsp_spi1', ... 'gpio']
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230617111809.129232-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The DSS controller on TI's AM625 SoC is an update from that on TI's
AM65X SoC. The former has an additional OLDI TX on its first video port
that helps output cloned video or WUXGA (1920x1200@60fps) resolution
video output over a dual-link mode to reduce the required OLDI clock
output.
The second video port is same from AM65x DSS and it outputs DPI video
data. It can support 2K resolutions @ 60fps, independently.
Add the new controller's compatible and update descriptions.
Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230616150900.6617-2-a-bhatia1@ti.com
Updates for v6.5.. this includes a backmerg of drm-next tree to be able
to use new DRM DSC helpers.
Core:
+ Add Marijn Suijten as drm/msm reviewer
+ Adreno A660 bindings
+ SM8350 MDSS bindings fix
+ Fix adreno_is_a690() warnings
+ More generic (DRM) and MSM-specific DSC helpers
DP:
+ Removed obsolete USB-PD remains
+ Documented DP compatible string for sm8550 platform
DPU:
+ Enable missing features (DSPP, DSC, split display) on sc8180x,
sc8280xp, sm8450
+ Enabled writeback on sc7280
+ Implemented tearcheck support to support vsync on SM150 and
newer platforms
+ Native HDMI output support
+ Dropped unused features: regdma, GC, IGC
+ Fixed the DSC flush operations
+ Simplified QoS handling, removing obsolete and unused features
and merging SSPP and WB code paths
+ Reworked dpu_encoder initialisation path
+ Enabled DSPP support on sdm845
+ Disabled color-management if DSPP blocks are not available
+ Added support for DSC 1.2 blocks found on sm8350 and later
+ Added .fb_dirty to fix CMD panels
DSI:
+ Drop powerup quirks in favour of using pre_enable_prev_first for
downstream bridges
+ Fixed 14nm DSI PHY programming
+ Added support for DSI and 28nm DSI PHY on MSM8226 platform
+ Make use of DRM and MSM DSC helpers
MDP5:
+ Added support for display controller on MSM8226 platform
GPU:
+ A690 support
+ Don't set IO_PGTABLE_QUIRK_ARM_OUTER_WBWA on devices with coherent SMMU
(like A690)
+ Move cmdstream dumping out of fence signaling path
+ Cleanups
+ Support for a6xx devices without GMU (aka "GMU wrapper"
+ a610 support
+ a619_holi support (a619 variant without GMU)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGsUB=tRB4nR6ZCJMuLhro5zN3BQWUSywVYbaipqqDZ_cQ@mail.gmail.com
-----BEGIN PGP SIGNATURE-----
iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAmSPcdMeHHRvcnZhbGRz
QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGWrQH/3KmuvZsWMC4PpJY
VcF9VfF9i+Zv7DoG8sjD5VpNh47e87RsR6WNOFnKol5SUrM6vsBAb5i2rfQahNIv
NSj0fPCE4/Nj9LMecKVC9WD8CitxYdbR+CF9Is21AQj1VihUl9eHXGcAWxuaMyhk
TjPUwmbOOsRVMXXdGJzjX78cvLsxqpSv8A/5OTh16IBimbh7p+YjKJFkbfj/PMWf
aF1quFkIEXgzJcHCpP6KDZHr2KbpY+jIN9hUENnGKJxHYNso5u+KrIW1kAm8meP1
x26ETSquM0T70OAzovOWg+BeVkLDac/3Rh30ztLAI4AtajrlSzycvFsU9UNEJCc2
BnM2IZI=
=ANT5
-----END PGP SIGNATURE-----
Backmerge tag 'v6.4-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into drm-next
Linux 6.4-rc7
Need this to pull in the msm work.
Signed-off-by: Dave Airlie <airlied@redhat.com>
The "GMU Wrapper" is Qualcomm's name for "let's treat the GPU blocks
we'd normally assign to the GMU as if they were a part of the GMU, even
though they are not". It's a (good) software representation of the GMU_CX
and GMU_GX register spaces within the GPUSS that helps us programatically
treat these de-facto GMU-less parts in a way that's very similar to their
GMU-equipped cousins, massively saving up on code duplication.
The "wrapper" register space was specifically designed to mimic the layout
of a real GMU, though it rather obviously does not have the M3 core et al.
To sum it all up, the GMU wrapper is essentially a register space within
the GPU, which Linux sees as a dumbed-down regular GMU: there's no clocks,
interrupts, multiple reg spaces, iommus and OPP. Document it.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/542750/
Signed-off-by: Rob Clark <robdclark@chromium.org>
The "GMU Wrapper" is Qualcomm's name for "let's treat the GPU blocks
we'd normally assign to the GMU as if they were a part of the GMU, even
though they are not". It's a (good) software representation of the GMU_CX
and GMU_GX register spaces within the GPUSS that helps us programatically
treat these de-facto GMU-less parts in a way that's very similar to their
GMU-equipped cousins, massively saving up on code duplication.
The "wrapper" register space was specifically designed to mimic the layout
of a real GMU, though it rather obviously does not have the M3 core et al.
GMU wrapper-equipped A6xx GPUs require clocks and clock-names to be
specified under the GPU node, just like their older cousins. Account
for that.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/542748/
Signed-off-by: Rob Clark <robdclark@chromium.org>
Mention that the interrupt line is just asserted for a random period of
time, not the entire time.
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Jisheng Zhang <jszhang@kernel.org> says:
Sipeed's Lichee Pi 4A development board uses Lichee Module 4A core
module which is powered by T-HEAD's TH1520 SoC. Add minimal device
tree files for the core module and the development board.
Support basic uart/gpio/dmac drivers, so supports booting to a basic
shell.
This also pulls in -rc2, because of some maintainers re-jigging that
went on in the interim in commit 80e62bc848 ("MAINTAINERS: re-sort
all entries and fields").
Link: https://lore.kernel.org/r/20230617161529.2092-1-jszhang@kernel.org
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Several SoMs and boards are available that feature the T-HEAD TH1520
SoC. Document the compatible strings.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
The nau8822 codec is used on an imx6sx EVB.
Signed-off-by: Hui Wang <hui.wang@canonical.com>
Link: https://lore.kernel.org/r/Message-Id: <20220616040046.103524-2-hui.wang@canonical.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The Devicetree bindings document does not have to say in the title that
it is a "Devicetree binding", but instead just describe the hardware.
Most of these have been fixed already, so fix the handful that snuck in.
With this, a meta-schema check can be enabled to catch these
automatically.
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Sebastian Reichel <sre@kernel.org>
Link: https://lore.kernel.org/r/20230615213154.1753313-1-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
This node's register space is not accessed by any other node, which
is the traditional use for the "syscon" hint. It looks to have been
added here to make use of a Linux kernel helper syscon_node_to_regmap().
The Linux driver now uses a more appropriate helper that does not
require the hint, so let's remove it from the binding.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230516184626.154892-2-afd@ti.com
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This is an existing optional property that ieee80211.yaml/cfg80211
provides. It's useful to further restrict supported frequencies
for a specified device through device-tree.
For testing the addition, I added the ieee80211-freq-limit
property with values from an OpenMesh A62 device. This is
because the OpenMesh A62 has "special filters in front of
the RX+TX paths to the 5GHz PHYs. These filtered channel
can in theory still be used by the hardware but the signal
strength is reduced so much that it makes no sense."
The driver supported this since ~2018 by
commit 34d5629d2c ("ath10k: limit available channels via DT ieee80211-freq-limit")
Link: https://git.openwrt.org/?p=openwrt/openwrt.git;a=commit;h=e3b8ae2b09e137ce2eae33551923daf302293a0c
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
Link: https://lore.kernel.org/r/c33c928b7c6c9bb4e7abe84eb8df9f440add275b.1686486464.git.chunkeey@gmail.com
Starting with SM8550, the ICE will have its own devicetree node so add the
qcom,ice property to reference it.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230612192847.1599416-2-abel.vesa@linaro.org
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Clean up bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230609140651.64488-1-krzysztof.kozlowski@linaro.org
Acked-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
The Arm documentation has moved to Documentation/arch/arm; update
one devicetree reference to match.
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: devicetree@vger.kernel.org
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Convert the binding to DT schema format.
Since commit 514b044cba ("ASoC: tlv320aic32x4: Model PLL in CCF")
clocks & clock-names = "mclk" is mandatory, it has been added to required
properties as well. '#sound-dai-cells' is added for reference from
simple-audio-card.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230616083549.2331830-1-alexander.stein@ew.tq-group.com
Signed-off-by: Mark Brown <broonie@kernel.org>
A default resolution in the ssd130x driver isn't set to an arbitrary 96x16
anymore. Instead is set to a width and height that's controller dependent.
The datasheets for the chips describes the following display resolutions:
- SH1106: 132 x 64 Dot Matrix OLED/PLED
- SSD1305: 132 x 64 Dot Matrix OLED/PLED
- SSD1306: 128 x 64 Dot Matrix OLED/PLED
- SSD1307: 128 x 39 Dot Matrix OLED/PLED
- SSD1309: 128 x 64 Dot Matrix OLED/PLED
Update DT schema to reflect what the driver does and make its users aware.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230609170941.1150941-3-javierm@redhat.com
Some MIPI DBI panels support a three wire mode (clock, chip select,
bidirectional data) that can be used to ask the panel if it is already set
up by e.g. the bootloader and can thus skip the initialization.
This enables a flicker-free boot.
Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Noralf Trønnes <noralf@tronnes.org>
Link: https://lore.kernel.org/r/20230614123222.4167460-4-l.goehrs@pengutronix.de
Signed-off-by: Rob Herring <robh@kernel.org>
The Shineworld LH133K is a 1.3" 240x240px RGB LCD with a MIPI DBI
compatible SPI interface.
The initialization procedure is quite basic with the exception of
requiring inverted colors.
A basic mipi-dbi-cmd[1] script to get the display running thus looks
like this:
$ cat shineworld,lh133k.txt
command 0x11 # exit sleep mode
delay 120
# The display seems to require display color inversion, so enable it.
command 0x21 # INVON
# Enable normal display mode (in contrast to partial display mode).
command 0x13 # NORON
command 0x29 # MIPI_DCS_SET_DISPLAY_ON
$ mipi-dbi-cmd shineworld,lh133k.bin shineworld,lh133k.txt
[1]: https://github.com/notro/panel-mipi-dbi
Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Noralf Trønnes <noralf@tronnes.org>
Link: https://lore.kernel.org/r/20230614123222.4167460-3-l.goehrs@pengutronix.de
Signed-off-by: Rob Herring <robh@kernel.org>
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint. Also absolute path
starting with /schemas is preferred.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230609140751.65129-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The i.MX8MP has the same register layout as the i.MX6DL, so add it as a
variant allowing to add the GPT IP blocks to the i.MX8MP's dtsi file.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230327173526.851734-2-u.kleine-koenig@pengutronix.de
Signed-off-by: Rob Herring <robh@kernel.org>
The "linux,keycode" property is non-standard. Add the common property
"linux,keycodes" and mark "linux,keycode" deprecated so that the mistake
is not propagated.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230613201231.2826352-2-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
The "linux,keycode" property is missing a type probably because it was
confused with the common property "linux,keycodes".
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230613201231.2826352-1-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
A couple of display bridge properties are missing a type definition. Add
the types to them.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230613201114.2824626-1-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
"fw-init-baudrate" is missing a type, add it. While we're here, define the
default value with a schema rather than freeform text.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230613200929.2822137-1-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Compatibles with multiple entries should have usually only one fallback
compatible thus enum followed by enum is not a common case. Use 'const'
as second compatible to show the recommended approach.
Explain also when clock-names are not really necessary.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230612092611.12385-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
The st,m95640 is a 64 Kbit SPI eeprom in the same family as the two
existing st,m95* compatibles.
Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230614201056.379080-1-linux@rasmusvillemoes.dk
Signed-off-by: Rob Herring <robh@kernel.org>
The audio card uses loongson I2S controller present in
7axxx/2kxxx chips to transfer audio data.
On loongson platform, the chip has only one I2S controller.
Signed-off-by: Yingkun Meng <mengyingkun@loongson.cn>
Link: https://lore.kernel.org/r/20230614122659.3402788-1-mengyingkun@loongson.cn
Signed-off-by: Mark Brown <broonie@kernel.org>
Add dt-bindings information for Analog Devices MAX98388 I2S Amplifier
Signed-off-by: Ryan Lee <ryans.lee@analog.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230613060945.183128-1-ryan.lee.analog@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
With support for the "fixed-layout" binding it's possible and preferred
now to define fixed NVMEM cells in the layout node. Do that for the
example binding.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Message-ID: <20230611140330.154222-25-srinivas.kandagatla@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
With the introduction of NVMEM layouts, new NVMEM content structures
should be defined as such. We should also try to convert / migrate
existing NVMEM content bindings to layouts.
This commit handles fixed NVMEM cells. So far they had to be defined
directly - as device subnodes. With this change it's allowed to put them
in the DT node named "nvmem-layout".
Having NVMEM cells in separated node is preferred as it draws a nice
line between NVMEM device and its content. It results in cleaner
bindings.
FWIW a very similar situation has happened to MTD devices and their
partitions: see commit 5d96ea42eb ("dt-bindings: mtd: Clarify all
partition subnodes").
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Message-ID: <20230611140330.154222-24-srinivas.kandagatla@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Document the OTP memory found on Rockchip RK3588 SoC.
Since RK3588 uses different clocks & resets configurations than PX30 /
RK3308, provide the required changes in the binding to be able to handle
both variants.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Message-ID: <20230611140330.154222-9-srinivas.kandagatla@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
On RPi4 the bootloader[1] will copy the binary public key blob
(if present) into memory location specified by this node, for
use by the OS.
[1] https://www.raspberrypi.com/documentation/computers/configuration.html#nvmem-nodes
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Message-ID: <20230611140330.154222-7-srinivas.kandagatla@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Broadcom's NVRAM contains MACs for Ethernet interfaces. Those MACs are
usually base addresses that are also used for calculating other MACs.
For example if a router vendor decided to use gmac0 it most likely
programmed NVRAM of each unit with a proper "et0macaddr" value. That is
a base.
Ethernet interface is usually connected to switch port. Switch usually
includes few LAN ports and a WAN port. MAC of WAN port gets calculated
as relative address to the interface one. Offset varies depending on
device model.
Wireless MACs may also need to be calculated using relevant offsets.
To support all those scenarios let MAC NVMEM cells be referenced with an
index specifying MAC offset. Disallow additionalProperties while at it.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Message-ID: <20230611140330.154222-4-srinivas.kandagatla@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
STM32F4 and STM32F7 can't switch to spi device mode.
Forbid this property with compatible "st,stm32f4-spi".
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Link: https://lore.kernel.org/r/20230615075815.310261-4-valentin.caron@foss.st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
New device support
- honeywell,mprls0025pa
* New driver and dt-bindings for this series of pressure sensors.
- invensense,mpu6050
* Add support for ICM 20600 IMU (ID, bindings and device data).
- melexis,mlx90614
* Add support for mlx90615 Infra Red Thermometer after driver cleanup
and refactoring to support the differences in this device.
- renesas,x9250
* New driver and bindings for this quad potentiometer.
- rockchip,saradc
* Add support for RK3588. Also included is a bunch of refactoring and
cleanup for that driver.
- rohm,bu27008
* New driver bindings etc for this 5 photodiode color sensor.
- st,lsm9ds0/st,st-sensors
* ID added for LSM303D accelerometer and magnetometer including ACPI binding.
- ti,opt4001
* New driver and bindings for this ambient light sensor.
Features
- core
* Introduce iio_validate_own_trigger() for cases where a driver can only
consumer a trigger it registered (detected via same parent device).
Use it in the kionix,kx022a driver and new rohm,by27008 driver.
- dynaimage,al3320a
* ACPI binding CALS0001 seen on Lenovo Yoga Table 2 devices.
- kionix,kx002a
* Enable asynchronous probe.
- rohm,bu27034
* Enable asynchronous probe.
- ti,tmp006
* Explicit support for DT including binding documentation.
Cleanups, minor fixes and misc improvements.
- treewide
* Switch I2C drivers from probe_new() back to probe() - part of the
long process of getting rid of a parameter from probe()
* Various whitespace and typo fixes not otherwise called out.
- core
* industrialio-buffer,Style cleanup.
* Add documentation to extend_name field of struct iio_chan_spec to
direct people using it towards the label infrastructure instead.
extend_name was a design mistake a long time back so directly people
away from it may be useful.
- adi,ad7606
* Add HAS_IOPORT dependency to prepare for some Kconfig changes.
- bosch,bma400
* Drop pointless print of ret in a dev_err_probe() message.
- invensense,icm42600
* Rework timestamp handling to reduce jitter.
- mediatek,mt7986-auxdac
* Add DT binding for this part.
- qcom,spmi-vadc
* Allow for 1/16th prescaling used on a few devices.
* Various changes to channel labeling and naming, including dropping
use of fwnode_name which generates odd channel names. Small ABI
change as a result, but not thought to be a problem for users of this
platform.
- st,lsm6dsx
* dt-binding: Use common schema for mount-matrix via a reference.
- st,stm32
* Add a debug print for when legacy channel config is used.
- ti,palmas-adc
* Drop unused i2c.h include.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAmSF83ARHGppYzIzQGtl
cm5lbC5vcmcACgkQVIU0mcT0Foi+NRAAi8E2NRkzxteTuiFRsAokm/8HbAc/9rDq
2Xyj8zT5B6jmqpbNKPtIbxxAxLV/JY+3HBIorvDNcOVfmOfshMpT31eaKpehxPJ3
A00WaJ6bi7CTp0h/7QOZnZ27yr3tuJ2jpCiGKWERmTZ60kn3S/5JRrXWbfKVccyU
DR1SrsiVSbtDhD9w6kA7HBRsL0EmTQOP/ARlUcO4SB5BOC7rj9akaN6Q6LYSafOa
BFfTd2suekRA94mB/ugm25xAWLsl4Rdr1iNkHyaGcXaMOJZ/zWXq14y1eLbqIJIc
am8Wu2zvo+umNzuG5DMi3gxP2B57Zhcieh6sJ5egdbxB4kh5z3jrsAFiw/MLTEME
4Tc7uHBPFuXDdb8saxtmV2FVbC43+31FgCLivD0BGHtv0DndP7i//KCdp2aztmHo
juyxRCw40xiul5Ihzh3NjukM0pb1inuhgblcEZVKOyaCjhur8NXoTEEcSqXczDVU
BLHBmhQY2cKwqKWt1hbLXDs9iGlJBg0+P+P0VBsvy7WWOlvc9Hw8SryYwyBRJMYH
LW/Wh85eIcyKaaGGEd+HQAyXwGSlrhycUSJzwdcc1IrK8TrIxn5k4BpQpeToQPjJ
wBRRDigeciIN0K7L09N4hg+qTxtpLwFY945meAS0N60o5hZM4P40hnzL8m/Co0pH
gx8SugY1NGk=
=0gJ9
-----END PGP SIGNATURE-----
Merge tag 'iio-for-6.5a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next
Jonathan writes:
1st set of IIO new device support, features and cleanup for the 6.5 cycle.
New device support
- honeywell,mprls0025pa
* New driver and dt-bindings for this series of pressure sensors.
- invensense,mpu6050
* Add support for ICM 20600 IMU (ID, bindings and device data).
- melexis,mlx90614
* Add support for mlx90615 Infra Red Thermometer after driver cleanup
and refactoring to support the differences in this device.
- renesas,x9250
* New driver and bindings for this quad potentiometer.
- rockchip,saradc
* Add support for RK3588. Also included is a bunch of refactoring and
cleanup for that driver.
- rohm,bu27008
* New driver bindings etc for this 5 photodiode color sensor.
- st,lsm9ds0/st,st-sensors
* ID added for LSM303D accelerometer and magnetometer including ACPI binding.
- ti,opt4001
* New driver and bindings for this ambient light sensor.
Features
- core
* Introduce iio_validate_own_trigger() for cases where a driver can only
consumer a trigger it registered (detected via same parent device).
Use it in the kionix,kx022a driver and new rohm,by27008 driver.
- dynaimage,al3320a
* ACPI binding CALS0001 seen on Lenovo Yoga Table 2 devices.
- kionix,kx002a
* Enable asynchronous probe.
- rohm,bu27034
* Enable asynchronous probe.
- ti,tmp006
* Explicit support for DT including binding documentation.
Cleanups, minor fixes and misc improvements.
- treewide
* Switch I2C drivers from probe_new() back to probe() - part of the
long process of getting rid of a parameter from probe()
* Various whitespace and typo fixes not otherwise called out.
- core
* industrialio-buffer,Style cleanup.
* Add documentation to extend_name field of struct iio_chan_spec to
direct people using it towards the label infrastructure instead.
extend_name was a design mistake a long time back so directly people
away from it may be useful.
- adi,ad7606
* Add HAS_IOPORT dependency to prepare for some Kconfig changes.
- bosch,bma400
* Drop pointless print of ret in a dev_err_probe() message.
- invensense,icm42600
* Rework timestamp handling to reduce jitter.
- mediatek,mt7986-auxdac
* Add DT binding for this part.
- qcom,spmi-vadc
* Allow for 1/16th prescaling used on a few devices.
* Various changes to channel labeling and naming, including dropping
use of fwnode_name which generates odd channel names. Small ABI
change as a result, but not thought to be a problem for users of this
platform.
- st,lsm6dsx
* dt-binding: Use common schema for mount-matrix via a reference.
- st,stm32
* Add a debug print for when legacy channel config is used.
- ti,palmas-adc
* Drop unused i2c.h include.
* tag 'iio-for-6.5a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (59 commits)
dt-bindings: iio: rockchip: Fix 'oneOf' condition failed warning
dt-bindings: iio: afe: voltage-divider: Spelling s/curcuit/circuit/
dt-bindings: iio: adc: Add rockchip,rk3588-saradc string
iio: adc: rockchip_saradc: Use dev_err_probe
iio: adc: rockchip_saradc: Match alignment with open parenthesis
iio: adc: rockchip_saradc: Use of_device_get_match_data
iio: adc: rockchip_saradc: Make use of devm_clk_get_enabled
iio: adc: rockchip_saradc: Add support for RK3588
iio: adc: rockchip_saradc: Add callback functions
iio: temperature: tmp006: Add OF device matching support
dt-bindings: iio: temperature: Add support for tmp006
staging: iio: Switch i2c drivers back to use .probe()
iio: amplifiers: ad8366 Fix whitespace issue
iio: imu: inv_icm42600: avoid frequent timestamp jitter
MAINTAINERS: Add ROHM BU27008
iio: light: ROHM BU27008 color sensor
iio: kx022a: Use new iio_validate_own_trigger()
iio: trigger: Add simple trigger_validation helper
dt-bindings: iio: light: ROHM BU27008
iio: mlx90614: Add MLX90615 support
...
Given how late this pull request is, I'm expecting these to get queued
up for the 6.5 merge window.
- adi,ad7192
* Fix a null pointer as spi_set_drvdata() is no longer called.
* Fix wrong check prior to using internal clock.
* Fix dt-binding to make it clear the voltage reference is required.
- adi,ad74413
* DIN_SINK should not be set for functions other than digital inputs.
Enforce that in the driver.
- amlogic,meson-saradc
* Fix clock divider mask length - affects only meson 8 family.
- freescale,fxls8962af
* Fix endian type and shift of channels to match with default device setup.
* Narrow errata handling to FXLS8962AF only as doesn't affect other devices
supported by this driver.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAmSF9lMRHGppYzIzQGtl
cm5lbC5vcmcACgkQVIU0mcT0Fohnwg//XxQw7xNTXfH359zXZQmE6G7QVLJWmw/H
PM08tMYgafeMrNM2ntJ1ZN199yjWyVooqHf6r9Jn7lHaQRLpu0hAbCUG+7FDVMIB
twsguiVrnZBZt717e4TQDAo6FDzp3fI/cCz6Zebfm38OBUweYANbqK/yuBZ9VDo2
Rn1ZgYOA8yeSqcC5bJNpmWEfbFHt+DqVSCVn1rEP6pqtpaaoIIHCs7lKFUNJDmfp
Sh5HvwZHNj/lJ2+Bkw9S802iq6pFp1mpVvvjnFCo/bkvYOTQ5t+GzrGCemI2EoA1
32+RcWY2FV3NA5S9HYst8jy6Gna0EpR6Pz2FHTuB5MKtnhOHX3BMn+/v7Io6FaYy
JNY3BMVv+hOeSn7twTmP2+n4KrhntUOEl+INw46icHOaGGIrPJi3Dxv0cEAAKs9R
nSgYY7pKwkq1+RrZpNgazBF+XQjgPQAb3rdG1yKhS3JW00ucJSb1pMOqMgBwk6au
XaQY4I+oC0dRuxBKp2s9YNdfZ57saavIwJv6VJt5B7qbt2KGQ+t32rlFupX8R1d3
r90NyrWB3tkIkMrX9SQmcV8QpogwU+HQLjoQwsehcEd3CfXkbS+rrFhv4pHIXgX3
08JYBtbhF4vE/c6GAtY1wz7ZcxxLKGRU1EqPw7ocf6r7i8Zw8oYjxMfrvzK9zrKx
PoIFhm2Yi+g=
=QmKH
-----END PGP SIGNATURE-----
Merge tag 'iio-fixes-for-6.4b' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next
Jonathan writes:
2nd set of IIO fixes for the 6.4 cycle.
Given how late this pull request is, I'm expecting these to get queued
up for the 6.5 merge window.
- adi,ad7192
* Fix a null pointer as spi_set_drvdata() is no longer called.
* Fix wrong check prior to using internal clock.
* Fix dt-binding to make it clear the voltage reference is required.
- adi,ad74413
* DIN_SINK should not be set for functions other than digital inputs.
Enforce that in the driver.
- amlogic,meson-saradc
* Fix clock divider mask length - affects only meson 8 family.
- freescale,fxls8962af
* Fix endian type and shift of channels to match with default device setup.
* Narrow errata handling to FXLS8962AF only as doesn't affect other devices
supported by this driver.
* tag 'iio-fixes-for-6.4b' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio:
meson saradc: fix clock divider mask length
iio: accel: fxls8962af: errata bug only applicable for FXLS8962AF
iio: accel: fxls8962af: fixup buffer scan element type
dt-bindings: iio: ad7192: Add mandatory reference voltage source
iio: adc: ad7192: Fix internal/external clock selection
iio: adc: ad7192: Fix null ad7192_state pointer access
iio: addac: ad74413: don't set DIN_SINK for functions other than digital input
Convert the binding to DT schema format. It also updates the
reset-controller description.
Signed-off-by: Piyush Mehta <piyush.mehta@amd.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Message-ID: <20230613123048.2935502-1-piyush.mehta@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Document bindings for this ON Semiconductor Type-C USB SuperSpeed
and DisplayPort ALT Mode Linear Redriver.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Message-ID: <20230601-topic-sm8x50-upstream-redriver-v3-1-988c560e2195@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
TPS6594 is a Power Management IC which provides regulators and others
features like GPIOs, RTC, watchdog, ESMs (Error Signal Monitor), and
PFSM (Pre-configurable Finite State Machine) managing the state of the
device.
TPS6594 is the super-set device while TPS6593 and LP8764 are derivatives.
Signed-off-by: Julien Panis <jpanis@baylibre.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20230511095126.105104-2-jpanis@baylibre.com
The AXP192 PMIC is similar to the AXP202/AXP209, but with different
regulators, additional GPIOs, and a different IRQ register layout,
so it needs a new compatible string.
Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230511092609.76183-2-aidanmacdonald.0x0@gmail.com
Signed-off-by: Lee Jones <lee@kernel.org>
The phy pattern property will be used for providing eUSB2 repeater
functionality. This will be modelled as a Qualcomm PHY driver.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230510082725.3612903-1-abel.vesa@linaro.org
Signed-off-by: Lee Jones <lee@kernel.org>
This patch add support for Coresight dummy source and dummy sink trace.
Signed-off-by: Hao Zhang <quic_hazha@quicinc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230602084149.40031-3-quic_hazha@quicinc.com
watermark value is the minimum amount of packet data
required to activate the forwarding process. The watermark
implementation and maximum size is dependent on the device
where Cadence MACB/GEM is used.
Signed-off-by: Pranavi Somisetty <pranavi.somisetty@amd.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add devicetree bindings for AM62x based phyCORE-AM62 SoM
and phyBOARD-Lyra RDK.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20230504140143.1425951-1-w.egorov@phytec.de
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Merge series from Chen-Yu Tsai <wenst@chromium.org>:
This series is a cleanup and improvement of the MT6358 regulator driver.
Various discrepancies were found while preparing to upstream MT8186
device trees, which utilize the MT6366 PMIC, that is also covered by
this driver.
Patches 1~8 should go through the regulator tree, and patch 9 through
the soc tree.
This series can be seen as two parts:
Part 1 - Fixing bogus regulators (patches 1~4 and 9)
There are some regulators listed in the bindings and driver that have no
corresponding pin on the actual hardware. MediaTek says these are a
hardware construct for shared control of the same regulator in the
VCN33 case and an alternative control scheme for low power suspend.
In the VCN33 case, there's only one actual regulator, so we merge the
two and rename them to match the hardware pin. No existing devices use
these AFAICT, so this should be safe to change.
In the *_SSHUB case, the two extra regulators refer to alternative
configuration registers of the same regulators. They are intended for
the SoC's low power mode companion processor to use, not the main
processor or OS. It should be left to the implementation to choose
which set of registers to actually control.
Part 2 - Code cleanup (patches 5 and 6)
Various tables in the regulator driver were not constant, even though
they are just lookup tables. With some reworking of the code, they are
made constant.
Also, some regulators that have a single linear range were using linear
range helpers. This is more complicated than just declaring the range
and step directly in the description. This is simplified to use the
latter approach.
Please have a look. After this series is done I'll send out patches for
the MT6366 PMIC, which is what started this. That will also include
updated YAML bindings for MT6366. I think we can merge MT6358 bindings
into them afterwards.
[1] https://lore.kernel.org/linux-arm-kernel/20230609075032.2804554-1-wenst@chromium.org/
The *_sshub regulators are actually alternate configuration interfaces
for their non *_sshub counterparts. They are not separate regulator
outputs. These registers are intended for the companion processor to
use to configure the power rails while the main processor is sleeping.
They are not intended for the main operating system to use.
Since they are not real outputs they shouldn't be modeled separately.
Remove them. Luckily no device tree actually uses them.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230609083009.2822259-3-wenst@chromium.org
Signed-off-by: Mark Brown <broonie@kernel.org>
The ldo_vcn33_bt and ldo_vcn33_wifi regulators are actually the same
regulator, having the same voltage setting and output pin. There are
simply two enable bits that are ORed together to enable the regulator.
Having two regulators representing the same output pin is misleading
from a design matching standpoint, and also error-prone in driver
implementations.
Merge the two as ldo_vcn33. Neither vcn33 regulators are referenced
in upstream device trees. As far as hardware designs go, none of the
Chromebooks using MT8183 w/ MT6358 use this output.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20230609083009.2822259-2-wenst@chromium.org
Signed-off-by: Mark Brown <broonie@kernel.org>
"pwm-dutycycle-unit" is missing a type, add it.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Link: https://lore.kernel.org/r/20230613200956.2822740-1-robh@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
The GPUCC block on SM6375 is powered by VDD_CX and VDD_GX. If the latter
rail is not online, GX_GDSC will never turn on. Describe the missing
handles.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230529-topic-sm6375gpuccpd-v1-1-8d57c41a6066@linaro.org
The Linux RPMh implementation refrains from sending some RPMh votes until
the system is about to enter suspend (which is indicated by all CPU cores
entering a low-power state). Lack of the power-domains property will make
it such that these votes are never sent.
Require the power-domains property as discussed in [1].
[1] https://lore.kernel.org/linux-arm-msm/20230512150425.3171122-1-quic_bjorande@quicinc.com/
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531-topic-rsc-v1-1-b4a985f57b8b@linaro.org
Document the MI01.9 (Reference Design Platform 474) board based on IPQ5332
family of SoCs.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230605080531.3879-4-quic_kathirav@quicinc.com
The LPASS (Low Power Audio Subsystem) Audio clock controller provides reset
support when it is under the control of Q6DSP.
Add support for those resets and adds IDs for clients to request the reset.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608125315.11454-3-srinivas.kandagatla@linaro.org
The LPASS (Low Power Audio Subsystem) clock controller provides reset
support when it is under the control of Q6DSP.
Add support for those resets and adds IDs for clients to request the reset.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608125315.11454-2-srinivas.kandagatla@linaro.org
Define clock/clock-names properties of the MMCC device node to be used
on MSM8226 platform.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230509-msm8226-mmcc-parents-v1-2-83a2dfc986ab@z3ntu.xyz
This patch allows giving each of the controller's pins a meaningful
name.
Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>