- Support zero-out using TRIM for eMMC
- Allow to override the busy-timeout for the ioctl-cmds
MMC host:
- Continued the conversion of DT bindings into the JSON schema
- jz4740: Apply DMA engine limits to maximum segment size
- mmci_stm32: Use a buffer for unaligned DMA requests
- mmc_spi: Enabled high-speed modes via parsing of DT
- omap: Make clock management to be compliant with CCF
- renesas_sdhi: Support eMMC HS400 mode for R-Car V3H ES2.0
- renesas_sdhi: Don't allow support for eMMC HS400 for R-Car V3M/D3
- sdhci_am654: Fix problem when SD card slot lacks the card detect line
- sdhci-esdhc-imx: Add support for the imx8dxl variant
- sdhci-brcmstb: Enable support for clock gating to save power
- sdhci-msm: Add support for the sdx65 variant
- sdhci-msm: Add support for the sm8150 variant
- sdhci-of-dwcmshc: Add support for the Rockchip rk3588 variant
- sdhci-pci-gli: Add workaround to allow GL9755 to enter ASPM L1.2
-----BEGIN PGP SIGNATURE-----
iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAmKLelkXHHVsZi5oYW5z
c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjCk+Lg/8Ck1m60yrij05TD4qmLTdodBi
8qR4bfxHyfQrtz2k6+Uy7nJFtYqr4+YVgiyUUSfiptofIBciT8gn3lrWXmt5+ZKU
ATpz2n40DmPHF54ngBCplIUc22+4toTEoHbwpQmHivUWeLQQPHfTsl3dIBkP0ElV
DCL/JMMnRxaCRxzu+DSF8zg10QJJ53K6MQki0O8RQPsDiV39Tz2+nt1R7PKpTufe
FFn8pSuBtj3rbDFIMczFjw5HZqCvl3a+9Bp/YDs2IF4Wv+YRYSLVb0nwfh+ehBrz
4sKzMGANQr35QPupbKc1BJUGy8/+QHsY/iq10xh36cbix/Qn7KIpRfsybhgLILh/
VJmT8M2fA7i2jEuQfnMUlQ7BOmtsGd+b1LFZqZ2UrXUyfcwLKOdIh2B6D4SDLBvQ
9CohhhTsIlxN2bGjUb25QEu0ipa8DNZYWkVZB1DEoWhC3f5WQjkoe6+D3L+Jz7rE
Apfk6D5lj/sCUIZd+JyTghMRp1ZWzeDHV8umzDlTUl+YKkqtQ5udsGal288lAJen
T3+0Kvm9rpbIZckoQQ/we2rtvNH7UiOZh5ldgVJ11tHNdRoCo2qanpQYB5QDCTPD
gFpD+KHxZqcjRKVkZWMNfo1tdTJu81y6w2WiQ+W7QXnfo0OdYFTqBIDjTF9uDumA
sLTpaaMrYaCrEcbTrAw=
=eAYF
-----END PGP SIGNATURE-----
Merge tag 'mmc-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson:
"MMC core:
- Support zero-out using TRIM for eMMC
- Allow to override the busy-timeout for the ioctl-cmds
MMC host:
- Continued the conversion of DT bindings into the JSON schema
- jz4740: Apply DMA engine limits to maximum segment size
- mmci_stm32: Use a buffer for unaligned DMA requests
- mmc_spi: Enabled high-speed modes via parsing of DT
- omap: Make clock management to be compliant with CCF
- renesas_sdhi:
- Support eMMC HS400 mode for R-Car V3H ES2.0
- Don't allow support for eMMC HS400 for R-Car V3M/D3
- sdhci_am654: Fix problem when SD card slot lacks the card detect
line
- sdhci-esdhc-imx: Add support for the imx8dxl variant
- sdhci-brcmstb: Enable support for clock gating to save power
- sdhci-msm:
- Add support for the sdx65 variant
- Add support for the sm8150 variant
- sdhci-of-dwcmshc: Add support for the Rockchip rk3588 variant
- sdhci-pci-gli: Add workaround to allow GL9755 to enter ASPM L1.2"
* tag 'mmc-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (52 commits)
mmc: sdhci-of-arasan: Add NULL check for data field
mmc: core: Support zeroout using TRIM for eMMC
mmc: sdhci-brcmstb: Fix compiler warning
mmc: sdhci-msm: Add compatible string check for sdx65
dt-bindings: mmc: sdhci-msm: Document the SDX65 compatible
mmc: sdhci-msm: Add compatible string check for sm8150
dt-bindings: mmc: sdhci-msm: Add compatible string for sm8150
mmc: sdhci-msm: Add SoC specific compatibles
dt-bindings: mmc: sdhci-msm: Convert bindings to yaml
dt-bindings: mmc: brcm,sdhci-brcmstb: cleanup example
dt-bindings: mmc: brcm,sdhci-brcmstb: correct number of reg entries
mmc: sdhci-brcmstb: Enable Clock Gating to save power
mmc: sdhci-brcmstb: Re-organize flags
mmc: mmci: Remove custom ios handler
mmc: atmel-mci: Simplify if(chan) and if(!chan)
mmc: core: use kobj_to_dev()
dt-bindings: mmc: sdhci-of-dwcmhsc: Add rk3588
mmc: core: Add CIDs for cards to the entropy pool
mmc: core: Allows to override the timeout value for ioctl() path
mmc: sdhci-omap: Use of_device_get_match_data() helper
...
- Add a "big-endian" DT property to indicate that the PEX_LUT and PF
register blocks are implemented in big-endian (Hou Zhiqiang)
- Add EP mode compatible strings for ls1028a (Xiaowei Bao)
- Define DT properties for AER/PME interrupts (Li Yang)
* remotes/lorenzo/pci/layerscape:
dt-bindings: pci: layerscape-pci: define AER/PME interrupts
dt-bindings: pci: layerscape-pci: Add EP mode compatible strings for ls1028a
dt-bindings: pci: layerscape-pci: Update the description of SCFG property
dt-bindings: pci: layerscape-pci: Add a optional property big-endian
Add support for sc7280-specific clock and reset definitions.
Link: https://lore.kernel.org/r/20220506152107.1527552-5-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Instead of specifying the enum of possible reg-names, specify them
explicitly. This allows us to specify which chipsets need the "atu"
regions and which do not. Also it clearly describes which platforms
enumerate PCIe cores using the dbi region and which use parf region for
that.
Link: https://lore.kernel.org/r/20220506152107.1527552-4-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
On MSM8996/APQ8096 platforms the PCIe controller doesn't have any
resets. So move the requirement stanza under the corresponding if
condition.
Link: https://lore.kernel.org/r/20220506152107.1527552-3-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Changes to the schema:
- Fixed the ordering of clock-names/reset-names according to
the dtsi files.
- Mark vdda-supply as required only for apq/ipq8064 (as it was marked
as generally required in the txt file).
Changes to examples:
- Inline clock and reset numbers rather than including dt-bindings
files because of conflicts between the headers
- Split ranges and reg properties to follow current practice
- Change -gpio to -gpios
- Update IRQ flags to LEVEL_HIGH rater than NONE
- Removed extra "snps,dw-pcie" compatibility.
Note: while it was not clearly described in text schema, the majority of
Qualcomm platforms follow the snps,dw-pcie schema and use two
compatibility strings in the DT files: platform-specific one and a
fallback to the generic snps,dw-pcie one. However the platform itself is
not compatible with the snps,dw-pcie interface, so we are going to
remove it.
Link: https://lore.kernel.org/r/20220506152107.1527552-2-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Document the PCIe DT bindings for SM8150 SoC. The PCIe IP is similar to
the one used on SM8250.
Link: https://lore.kernel.org/r/20220326060810.1797516-2-bhupesh.sharma@linaro.org
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
* Call of_platform_populate() for MTD partitions
* Check devicetree alias for index
* mtdoops:
- Add a timestamp to the mtdoops header.
- Create a header structure for the saved mtdoops.
- Fix the size of the header read buffer.
* mtdblock: Warn if opened on NAND
* Bindings:
- reserved-memory: Support MTD/block device
- jedec,spi-nor: remove unneeded properties
- Extend fixed-partitions binding
- Add Sercomm (Suzhou) Corporation vendor prefix
MTD driver changes:
* st_spi_fsm: add missing clk_disable_unprepare() in stfsm_remove()
* phram:
- Allow cached mappings
- Allow probing via reserved-memory
* maps: ixp4xx: Drop driver
* bcm47xxpart: Print correct offset on read error
CFI driver changes:
* Rename chip_ready variables
* Add S29GL064N ID definition
* Use chip_ready() for write on S29GL064N
* Move and rename chip_check/chip_ready/chip_good_for_write
NAND core changes:
* Print offset instead of page number for bad blocks
Raw NAND controller drivers:
* Cadence: Fix possible null-ptr-deref in cadence_nand_dt_probe()
* CS553X: simplify the return expression of cs553x_write_ctrl_byte()
* Davinci: Remove redundant unsigned comparison to zero
* Denali: Use managed device resources
* GPMI:
- Add large oob bch setting support
- Rename the variable ecc_chunk_size
- Uninline the gpmi_check_ecc function
- Add strict ecc strength check
- Refactor BCH geometry settings function
* Intel: Fix possible null-ptr-deref in ebu_nand_probe()
* MPC5121: Check before clk_disable_unprepare() not needed
* Mtk:
- MTD_NAND_ECC_MEDIATEK should depend on ARCH_MEDIATEK
- Also parse the default nand-ecc-engine property if available
- Make mtk_ecc.c a separated module
* OMAP ELM:
- Convert the bindings to yaml
- Describe the bindings for AM64 ELM
- Add support for its compatible
* Renesas: Use runtime PM instead of the raw clock API and update the
bindings accordingly
* Rockchip: Check before clk_disable_unprepare() not needed
* TMIO: Check return value after calling platform_get_resource()
Raw NAND chip driver:
* Kioxia: Add support for TH58NVG3S0HBAI4 and TC58NVG0S3HTA00
SPI-NAND chip drivers:
* Gigadevice:
- Add support for:
- GD5FxGM7xExxG
- GD5F{2,4}GQ5xExxG
- GD5F1GQ5RExxG
- GD5FxGQ4xExxG
- Fix Quad IO for GD5F1GQ5UExxG
* XTX: Add support for XT26G0xA
SPI NOR core changes:
* Read back written SR value to make sure the write was done correctly.
* Introduce a common function for Read ID that manufacturer drivers can
use to verify the Octal DTR switch worked correctly.
* Add helpers for read/write any register commands so manufacturer
drivers don't open code it every time.
* Clarify rdsr dummy cycles documentation.
* Add debugfs entry to expose internal flash parameters and state.
SPI NOR manufacturer drivers changes:
* Add support for Winbond W25Q512NW-IM, and Eon EN25QH256A.
* Move spi_nor_write_ear() to Winbond module since only Winbond flashes
use it.
* Rework Micron and Cypress Octal DTR enable methods to improve
readability.
* Use the common Read ID function to verify switch to Octal DTR mode for
Micron and Cypress flashes.
* Skip polling status on volatile register writes for Micron and Cypress
flashes since the operation is instant.
-----BEGIN PGP SIGNATURE-----
iQEzBAABCgAdFiEE9HuaYnbmDhq/XIDIJWrqGEe9VoQFAmKHhXEACgkQJWrqGEe9
VoQ4FQgAwTWnv7Eps8ngxlOE1WW1Kx+XUFCYN7mUKmDycgRKWWqF0OUu3pU6T3Si
XoOixajzsPC7AJtXbbGKUkH3UtqapCZ/OVxMJzY1S1zKVgS72ChvPth+rNOA5H6f
wkwCRYBCm51hYAlOQeRoFtwLEpOP17KTZw9Jn/u5RVwbQedQnzPj5sb6PddejjF4
9nlk2auJHzENBEEBG3WLRNgvGep8mNNFarzWB4iWrMcG0w1EgBksbIdshoBmu7vj
nKcDJbyA81DqX+8d56BfAFih8H2yCXZmhUzMK+zqnNkd1NuPnDDnrQYFKmKm2hAg
3bIMIzi+8dl/m0TY6BHPHj8oIYpjYA==
=P95J
-----END PGP SIGNATURE-----
Merge tag 'mtd/for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
Pull mtd updates from Miquel Raynal:
"MTD core changes:
- Call of_platform_populate() for MTD partitions
- Check devicetree alias for index
- mtdoops:
- Add a timestamp to the mtdoops header.
- Create a header structure for the saved mtdoops.
- Fix the size of the header read buffer.
- mtdblock: Warn if opened on NAND
- Bindings:
- reserved-memory: Support MTD/block device
- jedec,spi-nor: remove unneeded properties
- Extend fixed-partitions binding
- Add Sercomm (Suzhou) Corporation vendor prefix
MTD driver changes:
- st_spi_fsm: add missing clk_disable_unprepare() in stfsm_remove()
- phram:
- Allow cached mappings
- Allow probing via reserved-memory
- maps: ixp4xx: Drop driver
- bcm47xxpart: Print correct offset on read error
CFI driver changes:
- Rename chip_ready variables
- Add S29GL064N ID definition
- Use chip_ready() for write on S29GL064N
- Move and rename chip_check/chip_ready/chip_good_for_write
NAND core changes:
- Print offset instead of page number for bad blocks
Raw NAND controller drivers:
- Cadence: Fix possible null-ptr-deref in cadence_nand_dt_probe()
- CS553X: simplify the return expression of cs553x_write_ctrl_byte()
- Davinci: Remove redundant unsigned comparison to zero
- Denali: Use managed device resources
- GPMI:
- Add large oob bch setting support
- Rename the variable ecc_chunk_size
- Uninline the gpmi_check_ecc function
- Add strict ecc strength check
- Refactor BCH geometry settings function
- Intel: Fix possible null-ptr-deref in ebu_nand_probe()
- MPC5121: Check before clk_disable_unprepare() not needed
- Mtk:
- MTD_NAND_ECC_MEDIATEK should depend on ARCH_MEDIATEK
- Also parse the default nand-ecc-engine property if available
- Make mtk_ecc.c a separated module
- OMAP ELM:
- Convert the bindings to yaml
- Describe the bindings for AM64 ELM
- Add support for its compatible
- Renesas: Use runtime PM instead of the raw clock API and update the
bindings accordingly
- Rockchip: Check before clk_disable_unprepare() not needed
- TMIO: Check return value after calling platform_get_resource()
Raw NAND chip driver:
- Kioxia: Add support for TH58NVG3S0HBAI4 and TC58NVG0S3HTA00
SPI-NAND chip drivers:
- Gigadevice:
- Add support for:
- GD5FxGM7xExxG
- GD5F{2,4}GQ5xExxG
- GD5F1GQ5RExxG
- GD5FxGQ4xExxG
- Fix Quad IO for GD5F1GQ5UExxG
- XTX: Add support for XT26G0xA
SPI NOR core changes:
- Read back written SR value to make sure the write was done
correctly.
- Introduce a common function for Read ID that manufacturer drivers
can use to verify the Octal DTR switch worked correctly.
- Add helpers for read/write any register commands so manufacturer
drivers don't open code it every time.
- Clarify rdsr dummy cycles documentation.
- Add debugfs entry to expose internal flash parameters and state.
SPI NOR manufacturer drivers changes:
- Add support for Winbond W25Q512NW-IM, and Eon EN25QH256A.
- Move spi_nor_write_ear() to Winbond module since only Winbond
flashes use it.
- Rework Micron and Cypress Octal DTR enable methods to improve
readability.
- Use the common Read ID function to verify switch to Octal DTR mode
for Micron and Cypress flashes.
- Skip polling status on volatile register writes for Micron and
Cypress flashes since the operation is instant"
* tag 'mtd/for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (68 commits)
mtd: st_spi_fsm: add missing clk_disable_unprepare() in stfsm_remove()
dt-bindings: mtd: partitions: Extend fixed-partitions binding
dt-bindings: Add Sercomm (Suzhou) Corporation vendor prefix
mtd: phram: Allow cached mappings
mtd: call of_platform_populate() for MTD partitions
mtd: rawnand: renesas: Use runtime PM instead of the raw clock API
dt-bindings: mtd: renesas: Fix the NAND controller description
mtd: rawnand: mpc5121: Check before clk_disable_unprepare() not needed
mtd: rawnand: rockchip: Check before clk_disable_unprepare() not needed
mtd: nand: MTD_NAND_ECC_MEDIATEK should depend on ARCH_MEDIATEK
mtd: rawnand: cs553x: simplify the return expression of cs553x_write_ctrl_byte()
mtd: rawnand: kioxia: Add support for TH58NVG3S0HBAI4
mtd: spi-nor: debugfs: fix format specifier
mtd: spi-nor: support eon en25qh256a variant
mtd: spi-nor: winbond: add support for W25Q512NW-IM
mtd: spi-nor: expose internal parameters via debugfs
mtd: spi-nor: export spi_nor_hwcaps_pp2cmd()
mtd: spi-nor: move spi_nor_write_ear() to winbond module
mtd: spi-nor: amend the rdsr dummy cycles documentation
mtd: cfi_cmdset_0002: Rename chip_ready variables
...
- New drivers
- Driver for the Microchip LAN966x SoC
- PMBus driver for Infineon Digital Multi-phase xdp152 family controllers
- Chip support added to existing drivers
- asus-ec-sensors
- Support for ROG STRIX X570-E GAMING WIFI II, PRIME X470-PRO,
and ProArt X570 Creator WIFI
- External temperature sensor support for ASUS WS X570-ACE
- nct6775
- Support for I2C driver
- Support for ASUS PRO H410T / PRIME H410M-R / ROG X570-E GAMING WIFI II
- lm75
- Support for - Atmel AT30TS74
- pmbus/max16601
- Support for MAX16602
- aquacomputer_d5next
- Support for Aquacomputer Farbwerk
- Support for Aquacomputer Octo
- jc42
- Support for S-34TS04A
- Kernel API changes / clarifications
- The chip parameter of with_info API is now mandatory
- New hwmon_device_register_for_thermal API call for use by the thermal
subsystem
- Improvements
- PMBus and JC42 drivers now register with thermal subsystem
- PMBus drivers now support get_voltage/set_voltage power operations
- The adt7475 driver now supports pin configuration
- The lm90 driver now supports setting extended range temperatures
configuration with a devicetree property
- The dell-smm driver now registers as cooling device
- The OCC driver delays hwmon registration until requested by userspace
- Various other minor fixes and improvements
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEiHPvMQj9QTOCiqgVyx8mb86fmYEFAmKKpskACgkQyx8mb86f
mYHmkw/+IsOgkaSwA0PMBSQvPdncDcywchhtJ20UP3aKogy9Lp4HZ9NBRPZKeL7Y
r89LSi3OT27yn+NQ7JXGIA7VLnqftoHREkyq3khJDwqRCMv0/bTxEYuO04Hdte1n
4QrLth4yMfG5domgQn/M1KyS40jsMLPLMg0ui/Zwbm6O9J4D/Jj+P8KiT+Txgdmh
Zm/a2WQEkqueXENv1XEOgZ4DvKxq236pqn9kLVBQSiI74GAtg08pB5K+HyDIcTph
1nnbW/hJclWX96/Dbw87QNV7tu5xTAfno9xN4rbTYNgafx6gtoJoXWXukA9memi4
NzkFiaOdf+47Pr+EEi7SczVf+P+EwisVt4IMahMLIXZMaStHEJFcodR3PjsVPWt/
8R6z6r+byNFjfGJDpvGwUm9zJcaiCs/zrylyrOx2UXdzMrD3A6zngsPtWoli37h0
X5vV5MYEVKSE1m4ZEt0rq8O2gc2Jrb2FyVxhEzaDoM5IwviXSNEGIiav6uPaFI/R
ehmsWV/qbqRp3lfcvwyei4frITHhpgZQC5eaEiN+LFu1XbBxy7TlSp3UAqL0jHj+
qBZxpFgAz9MmEH1NgfSc8hHdz1cKIo9eR8IdteFg3WexcJ9evFwKiVK8yvlMOlVS
CnOhGOTOFHZVASnNQS45Vi9Ofr6Ou2YSss2McyB1eMOYUMC0cxU=
=LA2x
-----END PGP SIGNATURE-----
Merge tag 'hwmon-for-v5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging
Pull hwmon updates from Guenter Roeck:
"New drivers:
- Driver for the Microchip LAN966x SoC
- PMBus driver for Infineon Digital Multi-phase xdp152 family
controllers
Chip support added to existing drivers:
- asus-ec-sensors:
- Support for ROG STRIX X570-E GAMING WIFI II, PRIME X470-PRO, and
ProArt X570 Creator WIFI
- External temperature sensor support for ASUS WS X570-ACE
- nct6775:
- Support for I2C driver
- Support for ASUS PRO H410T / PRIME H410M-R /
ROG X570-E GAMING WIFI II
- lm75:
- Support for - Atmel AT30TS74
- pmbus/max16601:
- Support for MAX16602
- aquacomputer_d5next:
- Support for Aquacomputer Farbwerk
- Support for Aquacomputer Octo
- jc42:
- Support for S-34TS04A
Kernel API changes / clarifications:
- The chip parameter of with_info API is now mandatory
- New hwmon_device_register_for_thermal API call for use by the
thermal subsystem
Improvements:
- PMBus and JC42 drivers now register with thermal subsystem
- PMBus drivers now support get_voltage/set_voltage power operations
- The adt7475 driver now supports pin configuration
- The lm90 driver now supports setting extended range temperatures
configuration with a devicetree property
- The dell-smm driver now registers as cooling device
- The OCC driver delays hwmon registration until requested by
userspace
... and various other minor fixes and improvements"
* tag 'hwmon-for-v5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging: (71 commits)
hwmon: (aquacomputer_d5next) Fix an error handling path in aqc_probe()
hwmon: (sl28cpld) Fix typo in comment
hwmon: (pmbus) Check PEC support before reading other registers
hwmon: (dimmtemp) Fix bitmap handling
hwmon: (lm90) enable extended range according to DTS node
dt-bindings: hwmon: lm90: add ti,extended-range-enable property
dt-bindings: hwmon: lm90: add missing ti,tmp461
hwmon: (ibmaem) Directly use ida_alloc()/free()
hwmon: Directly use ida_alloc()/free()
hwmon: (asus-ec-sensors) fix Formula VIII definition
dt-bindings: trivial-devices: Add xdp152
hwmon: (sl28cpld-hwmon) Use HWMON_CHANNEL_INFO macro
hwmon: (pwm-fan) Use HWMON_CHANNEL_INFO macro
hwmon: (peci/dimmtemp) Use HWMON_CHANNEL_INFO macro
hwmon: (peci/cputemp) Use HWMON_CHANNEL_INFO macro
hwmon: (mr75203) Use HWMON_CHANNEL_INFO macro
hwmon: (ltc2992) Use HWMON_CHANNEL_INFO macro
hwmon: (as370-hwmon) Use HWMON_CHANNEL_INFO macro
hwmon: Make chip parameter for with_info API mandatory
thermal/drivers/thermal_hwmon: Use hwmon_device_register_for_thermal()
...
- Initial support for the ARMv9 Scalable Matrix Extension (SME). SME
takes the approach used for vectors in SVE and extends this to provide
architectural support for matrix operations. No KVM support yet, SME
is disabled in guests.
- Support for crashkernel reservations above ZONE_DMA via the
'crashkernel=X,high' command line option.
- btrfs search_ioctl() fix for live-lock with sub-page faults.
- arm64 perf updates: support for the Hisilicon "CPA" PMU for monitoring
coherent I/O traffic, support for Arm's CMN-650 and CMN-700
interconnect PMUs, minor driver fixes, kerneldoc cleanup.
- Kselftest updates for SME, BTI, MTE.
- Automatic generation of the system register macros from a 'sysreg'
file describing the register bitfields.
- Update the type of the function argument holding the ESR_ELx register
value to unsigned long to match the architecture register size
(originally 32-bit but extended since ARMv8.0).
- stacktrace cleanups.
- ftrace cleanups.
- Miscellaneous updates, most notably: arm64-specific huge_ptep_get(),
avoid executable mappings in kexec/hibernate code, drop TLB flushing
from get_clear_flush() (and rename it to get_clear_contig()),
ARCH_NR_GPIO bumped to 2048 for ARCH_APPLE.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAmKH19IACgkQa9axLQDI
XvEFWg//bf0p6zjeNaOJmBbyVFsXsVyYiEaLUpFPUs3oB+81s2YZ+9i1rgMrNCft
EIDQ9+/HgScKxJxnzWf68heMdcBDbk76VJtLALExbge6owFsjByQDyfb/b3v/bLd
ezAcGzc6G5/FlI1IP7ct4Z9MnQry4v5AG8lMNAHjnf6GlBS/tYNAqpmj8HpQfgRQ
ZbhfZ8Ayu3TRSLWL39NHVevpmxQm/bGcpP3Q9TtjUqg0r1FQ5sK/LCqOksueIAzT
UOgUVYWSFwTpLEqbYitVqgERQp9LiLoK5RmNYCIEydfGM7+qmgoxofSq5e2hQtH2
SZM1XilzsZctRbBbhMit1qDBqMlr/XAy/R5FO0GauETVKTaBhgtj6mZGyeC9nU/+
RGDljaArbrOzRwMtSuXF+Fp6uVo5spyRn1m8UT/k19lUTdrV9z6EX5Fzuc4Mnhed
oz4iokbl/n8pDObXKauQspPA46QpxUYhrAs10B/ELc3yyp/Qj3jOfzYHKDNFCUOq
HC9mU+YiO9g2TbYgCrrFM6Dah2E8fU6/cR0ZPMeMgWK4tKa+6JMEINYEwak9e7M+
8lZnvu3ntxiJLN+PrPkiPyG+XBh2sux1UfvNQ+nw4Oi9xaydeX7PCbQVWmzTFmHD
q7UPQ8220e2JNCha9pULS8cxDLxiSksce06DQrGXwnHc1Ir7T04=
=0DjE
-----END PGP SIGNATURE-----
Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 updates from Catalin Marinas:
- Initial support for the ARMv9 Scalable Matrix Extension (SME).
SME takes the approach used for vectors in SVE and extends this to
provide architectural support for matrix operations. No KVM support
yet, SME is disabled in guests.
- Support for crashkernel reservations above ZONE_DMA via the
'crashkernel=X,high' command line option.
- btrfs search_ioctl() fix for live-lock with sub-page faults.
- arm64 perf updates: support for the Hisilicon "CPA" PMU for
monitoring coherent I/O traffic, support for Arm's CMN-650 and
CMN-700 interconnect PMUs, minor driver fixes, kerneldoc cleanup.
- Kselftest updates for SME, BTI, MTE.
- Automatic generation of the system register macros from a 'sysreg'
file describing the register bitfields.
- Update the type of the function argument holding the ESR_ELx register
value to unsigned long to match the architecture register size
(originally 32-bit but extended since ARMv8.0).
- stacktrace cleanups.
- ftrace cleanups.
- Miscellaneous updates, most notably: arm64-specific huge_ptep_get(),
avoid executable mappings in kexec/hibernate code, drop TLB flushing
from get_clear_flush() (and rename it to get_clear_contig()),
ARCH_NR_GPIO bumped to 2048 for ARCH_APPLE.
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (145 commits)
arm64/sysreg: Generate definitions for FAR_ELx
arm64/sysreg: Generate definitions for DACR32_EL2
arm64/sysreg: Generate definitions for CSSELR_EL1
arm64/sysreg: Generate definitions for CPACR_ELx
arm64/sysreg: Generate definitions for CONTEXTIDR_ELx
arm64/sysreg: Generate definitions for CLIDR_EL1
arm64/sve: Move sve_free() into SVE code section
arm64: Kconfig.platforms: Add comments
arm64: Kconfig: Fix indentation and add comments
arm64: mm: avoid writable executable mappings in kexec/hibernate code
arm64: lds: move special code sections out of kernel exec segment
arm64/hugetlb: Implement arm64 specific huge_ptep_get()
arm64/hugetlb: Use ptep_get() to get the pte value of a huge page
arm64: kdump: Do not allocate crash low memory if not needed
arm64/sve: Generate ZCR definitions
arm64/sme: Generate defintions for SVCR
arm64/sme: Generate SMPRI_EL1 definitions
arm64/sme: Automatically generate SMPRIMAP_EL2 definitions
arm64/sme: Automatically generate SMIDR_EL1 defines
arm64/sme: Automatically generate defines for SMCR
...
the code considerably this way
- Rip out the silly edac_align_ptr() contraption which was computing the
size of the private structures of each driver and thus allowing for a
one-shot memory allocation. This was clearly unnecessary and confusing
so switch to simple and boring kmalloc* calls.
- Last but not least, the usual garden variety of fixes, cleanups and
improvements all over EDAC land
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmKLRJkACgkQEsHwGGHe
VUorYQ//a3s/j1wIXB5J0q7c9xlumqhxJz9P2A42kZMEW6MR94Ovr2lDnN6FRN5z
dlLLn/fxjh3El084jaKrfhHHyB0Z78Qte/Caf4E3HVuhmZ2dQw58vXAm3TNMsiPz
DEnJrRJ/vuX/VEcuuvX9wwSovPqNINW4lb9cWcIfGPToX051coUvuxTQXmCO80Hd
2syv88S0a8tw94E6DeB+5hhAQdgdV2dK3rZChTNi1guDqHqv14E6oQowWe6+Dvq/
XGBbJtmjuWsh2ZtS1KDnGYO0jvzLxe/5kjdgXYUoftG30MVTkVV0pBk0G+lPQQBN
2nSLd9zEgSceB5SlNlfWtQQuL1I56q3chxT7mj5JBPRsqQmV6Rxg9E0jnyiUH6Cf
Q9btDizjU7vUpDKe1Y8fJEMR3nXTIK58AnjcDmTZIu5hVZFY2nYnql0txClmkTUE
Bffud97C7a8uiSECp6oS5vjQHK12xwqiD8KRIaAHlBDYnpqTOJw/mDoKUvV74yiJ
TRvvPAiPgoA5ZLLkCFKxA7IzFXtgz9HL7m/MbbBo63ed187qvMyBxcyb8Teih/iy
u6eK0W1fux+zEaS6q5Jp0v415aqVvoa0UHgImTlOJhBaWENlEQixHslFMaqnlDTV
yhG405KxxMgW9/L9nI4kqP827zIr4iXJCVg3rJsOdytEzfwWy2o=
=Hwmn
-----END PGP SIGNATURE-----
Merge tag 'edac_updates_for_v5.19_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras
Pull EDAC updates from Borislav Petkov:
- Switch ghes_edac to use the CPER error reporting routines and
simplify the code considerably this way
- Rip out the silly edac_align_ptr() contraption which was computing
the size of the private structures of each driver and thus allowing
for a one-shot memory allocation. This was clearly unnecessary and
confusing so switch to simple and boring kmalloc* calls.
- Last but not least, the usual garden variety of fixes, cleanups and
improvements all over EDAC land
* tag 'edac_updates_for_v5.19_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
EDAC/xgene: Fix typo processsors -> processors
EDAC/i5100: Remove unused inline function i5100_nrecmema_dm_buf_id()
EDAC: Use kcalloc()
EDAC/ghes: Change ghes_hw from global to static
EDAC/armada_xp: Use devm_platform_ioremap_resource()
EDAC/synopsys: Add a SPDX identifier
EDAC/synopsys: Add driver support for i.MX platforms
EDAC/dmc520: Don't print an error for each unconfigured interrupt line
EDAC/mc: Get rid of edac_align_ptr()
EDAC/device: Sanitize edac_device_alloc_ctl_info() definition
EDAC/device: Get rid of the silly one-shot memory allocation in edac_device_alloc_ctl_info()
EDAC/pci: Get rid of the silly one-shot memory allocation in edac_pci_alloc_ctl_info()
EDAC/mc: Get rid of silly one-shot struct allocation in edac_mc_alloc()
efi/cper: Reformat CPER memory error location to more readable
EDAC/ghes: Unify CPER memory error location reporting
efi/cper: Add a cper_mem_err_status_str() to decode error description
powerpc/85xx: Remove fsl,85... bindings
Core code:
- Make the managed interrupts more robust by shutting them down in the
core code when the assigned affinity mask does not contain online
CPUs.
- Make the irq simulator chip work on RT
- A small set of cpumask and power manageent cleanups
Drivers:
- A set of changes which mark GPIO interrupt chips immutable to prevent
the GPIO subsystem from modifying it under the hood. This provides
the necessary infrastructure and converts a set of GPIO and pinctrl
drivers over.
- A set of changes to make the pseudo-NMI handling for GICv3 more
robust: a missing barrier and consistent handling of the priority
mask.
- Another set of GICv3 improvements and fixes, but nothing outstanding
- The usual set of improvements and cleanups all over the place
- No new irqchip drivers and not even a new device tree binding!
100+ interrupt chips are truly enough.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCgAxFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAmKLOEoTHHRnbHhAbGlu
dXRyb25peC5kZQAKCRCmGPVMDXSYoQ4ED/9B1kDwunvkNAPJDmSmr4hFU7EU3ZLb
SyS2099PWekgU3TaWdD6eILm9hIvsAmmhbU7CJ0EWol6G5VsqbNoYsfOsWliuGTi
CL3ygZL84hL4b24c3sipqWAF60WCEKLnYV7pb1DgiZM41C87+wxPB49FQbHVjroz
WDRTF8QYWMqoTRvxGMCflDfkAwydlCrqzQwgyUB5hJj3vbiYX9dVMAkJmHRyM3Uq
Prwhx1Ipbj/wBSReIbIXlNx4XI/iUDI0UWeh02XkVxLb5Jzg7vPCHiuyVMR1DW2J
oEjAR+/1sGwVOoRnfRlwdRUmRRItdlbopbL4CuhO/ENrM/r/o/rMvDDMwF4WoMW9
zXvzFBLllVpLvyFvVHO1LKI6Hx2mdyAmQ1M/TxMFOmHAyfOPtN150AJDPKdCrMk/
0F0B0y/KPgU9P/Q9yLh2UiXRAkoUBpLpk20xZbAUGHnjXXkys4Z2fE+THIob+Ibe
pUnXsgCXVVWyqJjdikPF2gqsSsCFUo7iblHRzI0hzOAPe3MTph0qh3hZoFAFNEYP
IIyAv9+IiT1EvBMgjHNmZ51U0uTbt3qWOSxebEoU3a598wwEVNRRVyutqvREXhl8
inkzpL2N3uBPX7sA25lYkH4QKRbzVoNkF/s0e/J9WZdYbj3SsxGouoGdYA2xgvtM
8tiCnFC9hfzepQ==
=xcXv
-----END PGP SIGNATURE-----
Merge tag 'irq-core-2022-05-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull interrupt handling updates from Thomas Gleixner:
"Core code:
- Make the managed interrupts more robust by shutting them down in
the core code when the assigned affinity mask does not contain
online CPUs.
- Make the irq simulator chip work on RT
- A small set of cpumask and power manageent cleanups
Drivers:
- A set of changes which mark GPIO interrupt chips immutable to
prevent the GPIO subsystem from modifying it under the hood. This
provides the necessary infrastructure and converts a set of GPIO
and pinctrl drivers over.
- A set of changes to make the pseudo-NMI handling for GICv3 more
robust: a missing barrier and consistent handling of the priority
mask.
- Another set of GICv3 improvements and fixes, but nothing
outstanding
- The usual set of improvements and cleanups all over the place
- No new irqchip drivers and not even a new device tree binding!
100+ interrupt chips are truly enough"
* tag 'irq-core-2022-05-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (39 commits)
irqchip: Add Kconfig symbols for sunxi drivers
irqchip/gic-v3: Fix priority mask handling
irqchip/gic-v3: Refactor ISB + EOIR at ack time
irqchip/gic-v3: Ensure pseudo-NMIs have an ISB between ack and handling
genirq/irq_sim: Make the irq_work always run in hard irq context
irqchip/armada-370-xp: Do not touch Performance Counter Overflow on A375, A38x, A39x
irqchip/gic: Improved warning about incorrect type
irqchip/csky: Return true/false (not 1/0) from bool functions
irqchip/imx-irqsteer: Add runtime PM support
irqchip/imx-irqsteer: Constify irq_chip struct
irqchip/armada-370-xp: Enable MSI affinity configuration
irqchip/aspeed-scu-ic: Fix irq_of_parse_and_map() return value
irqchip/aspeed-i2c-ic: Fix irq_of_parse_and_map() return value
irqchip/sun6i-r: Use NULL for chip_data
irqchip/xtensa-mx: Fix initial IRQ affinity in non-SMP setup
irqchip/exiu: Fix acknowledgment of edge triggered interrupts
irqchip/gic-v3: Claim iomem resources
dt-bindings: interrupt-controller: arm,gic-v3: Make the v2 compat requirements explicit
irqchip/gic-v3: Relax polling of GIC{R,D}_CTLR.RWP
irqchip/gic-v3: Detect LPI invalidation MMIO registers
...
For this cycle, the libata.force kernel parameter changes stand out.
Beside that, some small cleanups in various drivers. In more details:
* Changes to the pata_mpc52xx driver in preparation for powerpc's
asm/prom.h cleanup, from Christophe.
* Improved ATA command allocation, from John.
* Various small cleanups to the pata_via, pata_sil680, pata_ftide010,
sata_gemini, ahci_brcm drivers and to libata-core, from Sergey, Diego,
Ruyi, Mighao and Jiabing.
* Add support for the RZ/G2H SoC to the rcar-sata driver, from Lad.
* AHCI RAID ID cleanup, from Dan.
* Improvement to the libata.force kernel parameter to allow most horkage
flags to be manually forced for debugging drive issues in the field
without needing recompiling a kernel, from me.
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQSRPv8tYSvhwAzJdzjdoc3SxdoYdgUCYosMtQAKCRDdoc3SxdoY
dhi6APsGXkkiaTheBeshjhPZiet80iEh4gJknp5QwgJ6QovjDwEAzjApUC0S1sq2
atD4Y7T6HnKQBp66lJHvvgbFuHlxMgg=
=YuEq
-----END PGP SIGNATURE-----
Merge tag 'ata-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata
Pull ata updates from Damien Le Moal:
"For this cycle, the libata.force kernel parameter changes stand out.
Beside that, some small cleanups in various drivers. In more detail:
- Changes to the pata_mpc52xx driver in preparation for powerpc's
asm/prom.h cleanup, from Christophe.
- Improved ATA command allocation, from John.
- Various small cleanups to the pata_via, pata_sil680, pata_ftide010,
sata_gemini, ahci_brcm drivers and to libata-core, from Sergey,
Diego, Ruyi, Mighao and Jiabing.
- Add support for the RZ/G2H SoC to the rcar-sata driver, from Lad.
- AHCI RAID ID cleanup, from Dan.
- Improvement to the libata.force kernel parameter to allow most
horkage flags to be manually forced for debugging drive issues in
the field without needing recompiling a kernel, from me"
* tag 'ata-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata:
ata: pata_ftide010: Remove unneeded ERROR check before clk_disable_unprepare
doc: admin-guide: Update libata kernel parameters
ata: libata-core: Allow forcing most horkage flags
ata: libata-core: Improve link flags forced settings
ata: libata-core: Refactor force_tbl definition
ata: libata-core: cleanup ata_device_blacklist
ata: simplify the return expression of brcm_ahci_remove
ata: Make use of the helper function devm_platform_ioremap_resource()
ata: libata-core: replace "its" with "it is"
ahci: Add a generic 'controller2' RAID id
dt-bindings: ata: renesas,rcar-sata: Add r8a774e1 support
ata: pata_via: fix sloppy typing in via_do_set_mode()
ata: pata_sil680: fix result type of sil680_sel{dev|reg}()
ata: libata-core: fix parameter type in ata_xfer_mode2shift()
libata: Improve ATA queued command allocation
ata: pata_mpc52xx: Prepare cleanup of powerpc's asm/prom.h
Now that the schema tools can extract type information for all
properties (in order to decode dtb files), finding properties missing
any type definition is fairly trivial though not yet automated.
Fix the various property schemas which are missing a type. Most of these
tend to be device specific properties which don't have a vendor prefix.
A vendor prefix is how we normally ensure a type is defined.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org> # for everything in .../bindings/display/
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Peter Rosin <peda@axentia.se>
Acked-by: Bartosz Golaszewski <brgl@bgdev.pl>
Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20220519211411.2200720-1-robh@kernel.org
This reverts commit b20eee62ee. The
example has just been removed altogether in the mailbox tree.
Reported-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
A 's/pf/of/' on rpmsg-name description.
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20220512013921.164637-2-swboyd@chromium.org
The Wolfson Microelectronics Arizona audio can be connected via SPI bus
(e.g. WM5110 on Exynos5433 TM2 board), so allow SPI peripheral
properties.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20220504084304.46173-1-krzysztof.kozlowski@linaro.org
This is quite a big update, partly due to the addition of some larger
drivers (more of which is to follow since at least the AVS driver is
still a work in progress) and partly due to Charles' work sorting out
our handling of endianness. As has been the case recently it's much
more about drivers than the core.
- Overhaul of endianness specification for data formats, avoiding
needless restrictions due to CODECs.
- Initial stages of Intel AVS driver merge.
- Introduction of v4 IPC mechanism for SOF.
- TDM mode support for AK4613.
- Support for Analog Devices ADAU1361, Cirrus Logic CS35L45, Maxim
MAX98396, MediaTek MT8186, NXP i.MX8 micfil and SAI interfaces,
nVidia Tegra186 ASRC, and Texas Instruments TAS2764 and TAS2780
-----BEGIN PGP SIGNATURE-----
iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmKLf5EACgkQJNaLcl1U
h9ASqAf/YnwbFP919ree/DEKUDCNc4klUH5M4JOexXbZlZDqxKYRGZjoLuiwX/PQ
Au/xOjGEvm3Yg5/g5c8YFVNcIkv1O8VclRkV59oIxlBwKmQeTKvq+lOmlel2l1wZ
XOmvHjE46wxH1N1cLwL6KkX0YDn59orSZGYZRpfLjL61y6LQWsLNU0tY6AWCRATB
Llnrbu+DYgCsYNTEOOOY5s4V+4LkQm8TLdft91Va7mBdkPPRFoXRO0HGcVBqbkoN
7pf2mrjrLAWL9yuA8FlrgJbHq58DF9WGe5uEU7qlVL1zw46ClgIM0ABxPOdNdjV2
Wzb1jI7GmztgQNxlR9BcJB0kxAj9vA==
=oD5l
-----END PGP SIGNATURE-----
Merge tag 'asoc-v5.19' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Updates for v5.19
This is quite a big update, partly due to the addition of some larger
drivers (more of which is to follow since at least the AVS driver is
still a work in progress) and partly due to Charles' work sorting out
our handling of endianness. As has been the case recently it's much
more about drivers than the core.
- Overhaul of endianness specification for data formats, avoiding
needless restrictions due to CODECs.
- Initial stages of Intel AVS driver merge.
- Introduction of v4 IPC mechanism for SOF.
- TDM mode support for AK4613.
- Support for Analog Devices ADAU1361, Cirrus Logic CS35L45, Maxim
MAX98396, MediaTek MT8186, NXP i.MX8 micfil and SAI interfaces,
nVidia Tegra186 ASRC, and Texas Instruments TAS2764 and TAS2780
The clock for this driver switched to the common clock controller driver.
Therefore, update common clock properties for ethernet device in the binding
document.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Introduce dts bindings for mt7986 soc in mediatek,net.yaml.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Some devices can operate in an extended temperature mode.
Therefore add a boolean ti,extended-range-enable to be able to
select this feature in the device tree node. Also make sure that this
feature can only be enabled for the devices supporting this feature.
Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220517135614.8185-1-holger.brunck@hitachienergy.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
This sensor is already supported from the driver, but is missing in the
list of compatible devices in the yaml file.
Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220517075626.16809-1-holger.brunck@hitachienergy.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
These Super I/O chips have an i2c interface that some systems expose
to a BMC; the BMC's device tree can now describe that via this
binding.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220428012707.24921-2-zev@bewilderbeest.net
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
The adt7473, adt7475, adt7476 and adt7490 have pins that can be used for
different functions. Add bindings so that it is possible to describe
what pin functions are intended by the hardware design.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20220323034056.260455-2-chris.packham@alliedtelesis.co.nz
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Add a binding for the temperature sensor and the fan controller on the
Microchip LAN966x family.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20220401214032.3738095-4-michael@walle.cc
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
- fix reset timing of Ilitek touchscreens
- update maintainer entry of DT binding of Mediatek 6779 keypad
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQST2eWILY88ieB2DOtAj56VGEWXnAUCYolIugAKCRBAj56VGEWX
nL6pAQDuLus7t4GLJrg63DS3RXpPII3f1IHMq5lNluqfek9BogEA27Ze2+7pbwMb
iwqrj1UuMTobD2YPbuuxJtiDW2ADOQw=
=e4+T
-----END PGP SIGNATURE-----
Merge tag 'input-for-v5.18-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
Pull input fixes from Dmitry Torokhov:
"A small fixup to ili210x touchscreen driver, and updated maintainer
entry for the device tree binding of Mediatek 6779 keypad:
- fix reset timing of Ilitek touchscreens
- update maintainer entry of DT binding of Mediatek 6779 keypad"
* tag 'input-for-v5.18-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
Input: ili210x - use one common reset implementation
Input: ili210x - fix reset timing
dt-bindings: input: mediatek,mt6779-keypad: update maintainer
The stm32 ipcc mailbox driver supports only two interrupts (rx and tx), so
remove the unsupported "wakeup" one.
Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Tegra234 supports sending/receiving 32-bit and 128-bit data over
a shared mailbox. Based on the data size to be used, clients need
to specify the type of shared mailbox in the device tree.
Add a macro for 128-bit shared mailbox. Mailbox clients can use this
macro as a flag in device tree to enable 128-bit data support for a
shared mailbox.
Signed-off-by: Kartik <kkartik@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Consumer examples in the bindings of resource providers are trivial,
useless and duplicating code. Additionally the incomplete qcom,smp2p
example triggers DT schema warnings.
Cleanup the example by removing the consumer part and fixing the
indentation to DT schema convention.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family. Hence move its compatible value to the R-Car Gen4 section.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/2882a6de3905a57ae62d91060d27521af43c4068.1651497024.git.geert+renesas@glider.be
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Document the watchdog timeout mode property. If this property is used
the user can select what happens on watchdog timeout. Set this property
to 1 to enable SHUTDOWN (the device resets), set it to 0 and the device
will go to POWERDOWN on watchdog timeout.
If this property is not set, don't touch the WATCHDOG_SD bit and leave
the configuration to OTP. This way backward compatibility is not broken.
Signed-off-by: Andrej Picej <andrej.picej@norik.com>
Reviewed-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20211206064732.280375-4-andrej.picej@norik.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Document RZ/G2UL WDT bindings. RZ/G2UL WDT is similar to one found
on the RZ/G2L SoC. No driver changes are required as generic compatible
string "renesas,rzg2l-wdt" will be used as a fallback.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220424071323.151757-1-biju.das.jz@bp.renesas.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
This refers common bindings, so this is preferred for
unevaluatedProperties instead of additionalProperties.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/1649317606-21267-1-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Document the watchdog disable option which can be used if the hardware
automatic suspend option is broken.
Based on commit c514430c51 ("dt-bindings: watchdog: da9062: add
suspend disable option").
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Adam Thomson <DLG-Adam.Thomson.Opensource@dm.renesas.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220422072713.3172345-1-primoz.fiser@norik.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
New compatible to manage clock and reset of STM32MP13 SoC.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Link: https://lore.kernel.org/r/20220516070600.7692-2-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
These four files are left over from the h8300 removal.
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Document the Atmel (now Microchip) AT30TS74 which is an LM75 based
temperature sensor.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Rosin <peda@axentia.se>
Link: https://lore.kernel.org/r/9c01b1b5-871a-2b34-9f98-766d043e0759@axentia.se
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Update google,cros-ec-pwm node documentation to mention the
google,cros-ec-pwm-type compatible as a valid alternative.
Signed-off-by: Fabio Baltieri <fabiobaltieri@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add binding documentation for the MT6795 Helio X10 SoC.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Renamed hte dt binding directory to timestamp according review comment.
Addressed minor comment about having HTE acronym first in the common dt
binding document.
The change reflects above renaming in MAINTAINERS files too.
Signed-off-by: Dipen Patel <dipenp@nvidia.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Convert the rk808 bindings into yaml format. clock-output-names varies
in maxItems depending on whether or not the clock-cells is 0 or 1. For
the rk805, rk809, and rk817. This preserves behavior with the existing
driver handling setting the clock for these specific PMICs. When this
driver is corrected and the devicetrees updated this logic can be
removed (since the rk805, rk808, and rk817 only have one actual clock).
Note this patch was previously sent as a series, all of the patches in
the series except this one have been committed to mainline.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20220519161731.1168-1-macroalpha82@gmail.com
* Print offset instead of page number for bad blocks
Raw NAND controller drivers:
* Cadence: Fix possible null-ptr-deref in cadence_nand_dt_probe()
* CS553X: simplify the return expression of cs553x_write_ctrl_byte()
* Davinci: Remove redundant unsigned comparison to zero
* Denali: Use managed device resources
* GPMI:
- Add large oob bch setting support
- Rename the variable ecc_chunk_size
- Uninline the gpmi_check_ecc function
- Add strict ecc strength check
- Refactor BCH geometry settings function
* Intel: Fix possible null-ptr-deref in ebu_nand_probe()
* MPC5121: Check before clk_disable_unprepare() not needed
* Mtk:
- MTD_NAND_ECC_MEDIATEK should depend on ARCH_MEDIATEK
- Also parse the default nand-ecc-engine property if available
- Make mtk_ecc.c a separated module
* OMAP ELM:
- Convert the bindings to yaml
- Describe the bindings for AM64 ELM
- Add support for its compatible
* Renesas: Use runtime PM instead of the raw clock API and update the
bindings accordingly
* Rockchip: Check before clk_disable_unprepare() not needed
* TMIO: Check return value after calling platform_get_resource()
Raw NAND chip driver:
* Kioxia: Add support for TH58NVG3S0HBAI4 and TC58NVG0S3HTA00
SPI-NAND chip drivers:
* Gigadevice:
- Add support for:
- GD5FxGM7xExxG
- GD5F{2,4}GQ5xExxG
- GD5F1GQ5RExxG
- GD5FxGQ4xExxG
- Fix Quad IO for GD5F1GQ5UExxG
* XTX: Add support for XT26G0xA
-----BEGIN PGP SIGNATURE-----
iQEzBAABCgAdFiEE9HuaYnbmDhq/XIDIJWrqGEe9VoQFAmKD51AACgkQJWrqGEe9
VoQJ8AgAo8qjO5QQmd76v1q1Regxxl7RsH7hr7r9gJfgTwzhQC/xIyTiorcVPG7B
UDNu4Dwe3OAPbmU54TQNS/AMQkgHGMcIRTVut8+oL+ZnjYl+gv261GxmsfxaK/Hu
Vvvq9X0iyaKpZfyq3uksbsxiXbwMn4fHT7Reaimc9Thw+XKD7AcYWCuFb9GAWfaf
XQUVLg6y4Qk4BR9ZpYAx2v5FH4amJV9RKKTIqiymwcjnBZjYOI29wgKwY1hX+3bm
2Wu4wcccWhDzlV0Casf/hIGBydKx3omV+cJHLtmx7s+dqPvYSUGuvR2nbq5wuMqp
ZcAYeRhGEAYMYcMB/QuKmh4g/Js26w==
=QyqB
-----END PGP SIGNATURE-----
Merge tag 'nand/for-5.19' into mtd/next
NAND core:
* Print offset instead of page number for bad blocks
Raw NAND controller drivers:
* Cadence: Fix possible null-ptr-deref in cadence_nand_dt_probe()
* CS553X: simplify the return expression of cs553x_write_ctrl_byte()
* Davinci: Remove redundant unsigned comparison to zero
* Denali: Use managed device resources
* GPMI:
- Add large oob bch setting support
- Rename the variable ecc_chunk_size
- Uninline the gpmi_check_ecc function
- Add strict ecc strength check
- Refactor BCH geometry settings function
* Intel: Fix possible null-ptr-deref in ebu_nand_probe()
* MPC5121: Check before clk_disable_unprepare() not needed
* Mtk:
- MTD_NAND_ECC_MEDIATEK should depend on ARCH_MEDIATEK
- Also parse the default nand-ecc-engine property if available
- Make mtk_ecc.c a separated module
* OMAP ELM:
- Convert the bindings to yaml
- Describe the bindings for AM64 ELM
- Add support for its compatible
* Renesas: Use runtime PM instead of the raw clock API and update the
bindings accordingly
* Rockchip: Check before clk_disable_unprepare() not needed
* TMIO: Check return value after calling platform_get_resource()
Raw NAND chip driver:
* Kioxia: Add support for TH58NVG3S0HBAI4 and TC58NVG0S3HTA00
SPI-NAND chip drivers:
* Gigadevice:
- Add support for:
- GD5FxGM7xExxG
- GD5F{2,4}GQ5xExxG
- GD5F1GQ5RExxG
- GD5FxGQ4xExxG
- Fix Quad IO for GD5F1GQ5UExxG
* XTX: Add support for XT26G0xA
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
- Read back written SR value to make sure the write was done correctly.
- Introduce a common function for Read ID that manufacturer drivers can
use to verify the Octal DTR switch worked correctly.
- Add helpers for read/write any register commands so manufacturer
drivers don't open code it every time.
- Clarify rdsr dummy cycles documentation.
- Add debugfs entry to expose internal flash parameters and state.
SPI NOR manufacturer drivers changes:
- Add support for Winbond W25Q512NW-IM, and Eon EN25QH256A.
- Move spi_nor_write_ear() to Winbond module since only Winbond flashes
use it.
- Rework Micron and Cypress Octal DTR enable methods to improve
readability.
- Use the common Read ID function to verify switch to Octal DTR mode for
Micron and Cypress flashes.
- Skip polling status on volatile register writes for Micron and Cypress
flashes since the operation is instant.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQTlUWNzXGEo3bFmyIR4drqP028CQUCYoH1/QAKCRAR4drqP028
CXQeAP9hAfNGV55cOsd+z+3+xOxKeAYN/PC7UmXSvFgJZKYEqgEA/UF+SwsrOTyd
x+5UwNSOvrUX404j6ROP0kH4/kzARAY=
=Krne
-----END PGP SIGNATURE-----
Merge tag 'spi-nor/for-5.19' into mtd/next
SPI NOR core changes:
- Read back written SR value to make sure the write was done correctly.
- Introduce a common function for Read ID that manufacturer drivers can
use to verify the Octal DTR switch worked correctly.
- Add helpers for read/write any register commands so manufacturer
drivers don't open code it every time.
- Clarify rdsr dummy cycles documentation.
- Add debugfs entry to expose internal flash parameters and state.
SPI NOR manufacturer drivers changes:
- Add support for Winbond W25Q512NW-IM, and Eon EN25QH256A.
- Move spi_nor_write_ear() to Winbond module since only Winbond flashes
use it.
- Rework Micron and Cypress Octal DTR enable methods to improve
readability.
- Use the common Read ID function to verify switch to Octal DTR mode for
Micron and Cypress flashes.
- Skip polling status on volatile register writes for Micron and Cypress
flashes since the operation is instant.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCYoX6TAAKCRDj7w1vZxhR
xUHwAP9mla9iep+JVAqg1MkN2+JgFbjb8x2A/QY+Nxd1xgHQrQD9FlSNnLbiwgWJ
2W4+OooKp7DKXGXa4N1al95vKeSW0Aw=
=cJ8Z
-----END PGP SIGNATURE-----
Merge tag 'drm-misc-next-fixes-2022-05-19' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
A device tree binding change for Rockchip VOP2
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220519080556.42p52cya4u6y3kps@houat
The contents of the clock binding have been moved to the clock binding
schema in the dtschema repository. The desire is for common bindings to
be hosted in the dtschema repository.
Replace the contents with a link to the clock binding schema as there
are still many references to clock-bindings.txt in the tree. This will
prevent additions without a schema.
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220428154154.2284317-1-robh@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add the binding string for the Agilex based Intel n6000 board.
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Add device tree bindings documentation for the Intel Hard
Processor System (HPS) Copy Engine.
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Add binding for the Qualcomm SC8280XP Global Clock controller.
The clock-names property is purposefully omitted, to clearly communicate
to the writer (and reader) of the DeviceTree source based on this
binding that the order of "clocks" is significant, in contrast to
previous GCC bindings.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220505025457.1693716-2-bjorn.andersson@linaro.org
While Linux uses a different driver, the Ilitek
ILI210x/ILI2117/ILI2120/ILI251x touchscreen controller Device Tree
binding documentation is very similar.
- Drop the fixed reg value, as some controllers use a different
address,
- Make reset-gpios optional, as it is not always wired.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/0c5f06c9d262c1720b40d068b6eefe58ca406601.1638539806.git.geert+renesas@glider.be
The DTS should always have fixed clock order, even if it comes with
clock-names property. Drop the pattern to make the order strict.
Existing DTS already match this.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220424150333.75172-3-krzysztof.kozlowski@linaro.org
There is no need to add minItems when it is equal to maxItems.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220424150333.75172-2-krzysztof.kozlowski@linaro.org
There is no need to add minItems when it is equal to maxItems.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220424150333.75172-1-krzysztof.kozlowski@linaro.org
D1 has a DMA controller similar to the one in other Allwinner SoCs.
Add its compatible, and include it in the list of variants with a
separate MBUS clock gate.
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20220424172759.33383-2-samuel@sholland.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
The pl330 DMA controller on Exynos SoC (e.g. dma-controller@3880000 in
Exynos5420) belongs to power domain, so allow such property.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220427064048.86635-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
The generic properties, used in most of the drivers and defined in
generic dma-common DT bindings, are 'dma-channels' and 'dma-requests'.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220503065407.52188-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Just like for the NAND controller that is also on this SoC, let's
provide a SoC generic and a more specific couple of compatibles for the
DMA controller.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20220427095653.91804-4-miquel.raynal@bootlin.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This system controller contains several registers that have nothing to
do with the clock handling, like the DMA mux register. Describe this
part of the system controller as a subnode.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20220427095653.91804-3-miquel.raynal@bootlin.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
The Renesas RZN1 DMA IP is based on a DW core, with eg. an additional
dmamux register located in the system control area which can take up to
32 requests (16 per DMA controller). Each DMA channel can be wired to
two different peripherals.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20220427095653.91804-2-miquel.raynal@bootlin.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
The RZ/V2M SoC has an additional clock to access the registers. The HW
manual says this clock should not be touched as it is used by the
"ISP Firmware".
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Link: https://lore.kernel.org/r/20220512072649.7879-1-phil.edworthy@renesas.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Detailed description for this pull request:
1. update extcon core driver
- extcon_get_extcon_dev() has been almost used to get the extcon device
on booting time. If extcon provider driver is probed at late time,
the extcon consumer driver get the -EPROBE_DEFER return value.
It requires the inefficient handling code of -EPROBE_DEFER.
Instead, extcon_get_extcon_dev() will return -EPROBE_DEFER
if the required extcon device is none. It makes the extcon consumer driver
to be simplified when getting extcon device.
- Register device after dev_set_drvdata because of accessing
the sysfs attributes at timing of between drv_set_data and device_register.
- Fix some kernel-doc comments of extcon functions.
2. update extcon provider driver
- Update extcon-intel-int3496.c
: Add support for controlling vbus power via regulator and support
to the extcon-intel-int3496.c driver to bind to devices without
an ACPi companion. And fix the minor clean-up.
- Use struct_size() helper on extcon-usbc-cros-ec.c
- Remove the disable irq operation in system sleep for using vbus/id
gpio as the wakeup source on extcon-usb-gpio.c
- Add support of SM5703 device by using existing extcon-sm5502.c
and rename i2c_devic_id from sm5703 to sm5703-muic to reduce confusion
between SM5703 MFD device and extcon device.
- Add usb role class support and add queue work sync before driver release
on extcon-ptn5150.c
-----BEGIN PGP SIGNATURE-----
iQJKBAABCgA0FiEEsSpuqBtbWtRe4rLGnM3fLN7rz1MFAmJ+HMwWHGN3MDAuY2hv
aUBzYW1zdW5nLmNvbQAKCRCczd8s3uvPUz8/EACINpiJn/aifPux8jpRbQG9XPzH
qi+X2aELH4jahYrah9hHmvopXpzA3VY988f6bDlFGojnxKnlTAQ6f5+qjhJIY3/c
sd7SdYk1gpTKqQTL+3nYk3iHtrd+MT4LK1eSTLhdevGe6Rfis1P5MIDgt5kksYle
YwBf6GO9hcENRUeFYIlZ2t40ZIaTGkworQL5gDTdDWl/vNDf8Q4rW2iFQxKv5FyM
r4Q52N11cDQ9Wzic40hCdsRjFZF9hBiX+NYFZ66kWeEXJkpP/yGfOutVywhiD5KG
HTImOSvAmwOaEhK59Xy2SmaJ5vsumAfD9o2/s6p/zlXKyIRkgkf/q/u7hEUSz4Zy
W+86YPRLOWBLfICN5rosyQEO4GCYVZQgVAiBz+qcTdJ36IGw0p2rWSkYpTZMlIBC
d59NFQnugLbByQPLOXwp9ZCejJ1CuEDYok4ZfZcJP1cLw5pjcKGegUMY4orwqD1D
Tg0h0AFFfKweyswP/ppV3+AHPqixYxUgvAhgb5hfqtDez0ubPuxKy8bnYrj5mdcl
tOCP1m4CG40f8cO9L8SbS0pzhcFn+kVx6azYp8xYHNCtGJFoZ0yPq58fusyJ43ia
gcgAbn6i/12KrWOqkC3Dycy8fEXdpGJFdkbEKrX5D3DO7CBkxQc3td4AIbInpStE
SHFILd5SehqKcwwYBA==
=vxeW
-----END PGP SIGNATURE-----
Merge tag 'extcon-next-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon into char-misc-next
Chanwoo writes:
Update extcon next for v5.19
Detailed description for this pull request:
1. update extcon core driver
- extcon_get_extcon_dev() has been almost used to get the extcon device
on booting time. If extcon provider driver is probed at late time,
the extcon consumer driver get the -EPROBE_DEFER return value.
It requires the inefficient handling code of -EPROBE_DEFER.
Instead, extcon_get_extcon_dev() will return -EPROBE_DEFER
if the required extcon device is none. It makes the extcon consumer driver
to be simplified when getting extcon device.
- Register device after dev_set_drvdata because of accessing
the sysfs attributes at timing of between drv_set_data and device_register.
- Fix some kernel-doc comments of extcon functions.
2. update extcon provider driver
- Update extcon-intel-int3496.c
: Add support for controlling vbus power via regulator and support
to the extcon-intel-int3496.c driver to bind to devices without
an ACPi companion. And fix the minor clean-up.
- Use struct_size() helper on extcon-usbc-cros-ec.c
- Remove the disable irq operation in system sleep for using vbus/id
gpio as the wakeup source on extcon-usb-gpio.c
- Add support of SM5703 device by using existing extcon-sm5502.c
and rename i2c_devic_id from sm5703 to sm5703-muic to reduce confusion
between SM5703 MFD device and extcon device.
- Add usb role class support and add queue work sync before driver release
on extcon-ptn5150.c
* tag 'extcon-next-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon:
extcon: Modify extcon device to be created after driver data is set
extcon: sm5502: Clarify SM5703's i2c device ID
extcon: ptn5150: Add usb role class support
extcon: ptn5150: Add queue work sync before driver release
extcon: sm5502: Add support for SM5703
dt-bindings: extcon: bindings for SM5703
extcon: usb-gpio: Remove disable irq operation in system sleep
extcon: Fix some kernel-doc comments
extcon: usbc-cros-ec: Use struct_size() helper in kzalloc()
extcon: int3496: Add support for controlling Vbus through a regulator
extcon: int3496: Add support for binding to plain platform devices
extcon: int3496: Request non-exclusive access to the ID GPIO
extcon: int3496: Make the driver a bit less verbose
extcon: Fix extcon_get_extcon_dev() error handling
- Support for v1.6.0 Qualcomm controllers
- Bunch of pm updates by Intel for peripheral attachment and system pm
etc
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmJ8/LIACgkQfBQHDyUj
g0cg/BAAhpuUHSE+4Xzhgbb93o6AAKVLFnGXuDCUYHGTJ/TyFarq8msHrEF8oAqu
l7SPJjfpga1KNG6BVla0fTIVepdEZegdf2EF7xjYeszg9TwLX7Ek8kaGk8HJ9pKO
euuRfy1xdouGobrk/gfywKNCLZWM2sCFow7FkdOhlvrofkeqj89rvYPkGY/c1cbM
Pmnjg22aYR+cqXJcuLZ8SpO2QljVo0UGkgrn3Uoo7Qjgk/xq7NaW0TyS23w5O4nz
VrDnGoP/kpOVMdXkp6y4mKhAfCWMj655Kr6Ag9+gIysk/qL0QVCkVwZ38u6XVK9z
duUmwIIYemGIh5qP1sbjhUJ6cmcSDLR9+u4QliFMJqpKko1njLx3omOUm2/GN+fJ
Jm75BQ16D7yruYD4nQPUl7KIqh/PyQRe4ofCY29qrrmUnAZFBrkf+HMRG+6roKyf
z9fyQl4QdabVFOsMFdMXsMFTkCw5OIWjpPy/qdozHiCkAQH0C/P3EQSVKQfan2eb
blLVOdr7pMHsks6IoXjqLHBX7lYGlmp8S1Qmh+GiENv7Zpl2vQBLOc9K0/jdHcBU
wVuHOd320HN5MoZx3kuyHI6uoEL43kSHv4itaHc41wijetdu/I41X+ns5onukk5O
2NXmowoZAoCtriJT7EGhJNczFymu63VyQu3wFI0g2zg8i6S4bCk=
=ZFFY
-----END PGP SIGNATURE-----
Merge tag 'soundwire-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire into char-misc-next
Vinod writes:
soundwire updates for 5.19-rc1
- Support for v1.6.0 Qualcomm controllers
- Bunch of pm updates by Intel for peripheral attachment and system pm
etc
* tag 'soundwire-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire:
soundwire: qcom: adjust autoenumeration timeout
soundwire: qcom: use pm_runtime_resume_and_get()
soundwire: intel: use pm_runtime_resume_and_get()
soundwire: cadence: use pm_runtime_resume_and_get()
soundwire: bus: use pm_runtime_resume_and_get()
soundwire: qcom: return error when pm_runtime_get_sync fails
soundwire: bus: pm_runtime_request_resume on peripheral attachment
soundwire: intel: disable WAKEEN in pm_runtime resume
soundwire: intel: prevent pm_runtime resume prior to system suspend
soundwire: cadence: recheck device0 attachment after status change
dt-bindings: soundwire: qcom: Add bindings for audio clock reset control property
soundwire: qcom: Add compatible name for v1.6.0
soundwire: stream: Fix error return code in do_bank_switch()
soundwire: qcom: fix an error message in swrm_wait_for_frame_gen_enabled()
Usual mixed bag. Stand out this time is Andy Shevchenko's continuing
effort to move drivers over the generic firmware interfaces.
Device support
* sprd,sc2720
- upm9620 binding addition.
- Refactor and support for sc2720, sc2721 and sc2730.
* ti,ads1015
- Refactor driver and add support for TLA2024.
Device support (IDs only)
* invensense,mpu6050
- Add ID for ICM-20608-D.
* st,accel:
- Add ID for lis302dl.
* st,lsm6dsx
- Add support for ASM330LHHX (can fallback to LSM6DSR.)
Features
* convert drivers to device properties
- IIO core
- adi,ad7266
- adi,adis16480
- adi,adxl355
- bosch,bmi160
- domintech,dmard06
- fsl,fxas21002c
- invensense,mpu3050
- linear,ltc2983
- linear,ltc2632
- maxbotix,mb1232
- maxim,max31856
- maxim,max31865
- multiplexer
- ping
- rescale
- taos,tsl2772
* core
- Add runtime check on whether realbits fit in storagebits for each
channel.
* adi,ad_sigma_delta
- Add sequencer support and relevant update_scan_mode callbacks for
adi,ad7192 and adi,ad7124.
Cleanup and minor fixes
* MAINTAINERS
- Update Lorenzo Bianconi's email address for IIO drivers.
- Add entry for ad3552r and update maintainer in dt-binding doc.
* tree-wide
- Replace strtobool() with kstrtobool().
- Drop false OF dependencies.
* core
- Tidy up and document IIO modes.
- Take iio_buffer_enabled() out of header allowing current_mode to be
moved to the opaque structure.
- As all kfifo buffers use the same mode value, drop that parameter
and set it unconditionally.
- White space fixes and similar.
- Drop use of list iterator variable for
list_for_each_entry_continue_reverse and use list_prepare_entry to
restart.
* sysfs-trigger
- Replace use of 'found' variable with dedicate list iterator variable.
* adi,ad7124
- Drop misleading shift.
* adi,ad2s1210
- Remove redundant local variable assignment.
* adi,adis16480
- Use local device pointer to reduce repetition.
- Improve handling of clocks.
* domintech,dmard09
- White space.
* dummy driver
- Improve error handling.
* fsl,mma8452
- Add missing documentation of name element.
* invensense,mpu3050
- Stop remove() returning non 0.
* kionix,kxsd9
- White space.
* linear,ltc2688
- Use local variable for struct device.
- Combine of_node_put() error handling paths.
* linear,ltc2983
- Avoid use of constants in messages where a define is available.
* microchip,mcp4131
- Fix compatible in dt example.
* pni,rm3100
- Stop directly accessing iio_dev->current_mode just to find out
if the buffer is enabled.
* renesas,rzg2l
- Relax kconfig constraint to include newer devices.
* sprd,sc27xx
- Fix wrong scaling mask.
- Improve the calibration values.
* samsung,ssp
- Replace a 'found' variable in favor of an explicit value that was
found.
* sensortek,stk3xx
- Add proximity-near-level binding and driver support.
* st,st_sensors:
- Drop unused accel_type enum.
- Return early in *_write_raw()
- Drop unnecessary locking in _avail functions.
- Add local lock to protect odr against concurrent updates allowing
mlock to no longer be used outside of the core.
- Use iio_device_claim_direct_mode() rather than racy checking of
the current mode.
* st,stmpe-adc
- Fix checks on wait_for_completion_timeout().
- Allow use of of_device_id for matching.
* st,stm32-dfsdm
- Stop accessing iio_dev->current_mode to find out if the buffer
is enabled (so we can hide that variable in the opaque structure)
* st,vl53l0x
- Fix checks on wait_for_completion_timeout.
* ti,ads1015
- Add missing ID for ti,ads1115 in binding doc.
- Convert from repeated chip ID look up to selecting static const
data.
- Switch to read_avail() callback.
* ti,ads8688
- Use of_device_id for driver matching.
* ti,palmas-adc
- Drop a warning on minor calibration mismatch leading to slightly
negative values after applying the calibration.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAmJy4f0RHGppYzIzQGtl
cm5lbC5vcmcACgkQVIU0mcT0FohyzQ//e2RJF/oUjd5WreX9fywnK2qwXE0n6yfQ
OrXuLvdAZ4ZwELmQyCg7XWVZY1u6JXvW1/TJXpjI0Y4sXSCSs+Z514BJOQYOrEyv
2MH5mqkXq5IeskKAOxKBLeOz8e8txKyB2S4lDSVH11y40i32U+3SMdZHUt4ThVJU
xd6FMJqEvXrbramQSj3O61YvICBedOcoKe4Da7nJtmr42zkDuBYJRlmtCnRoXx1l
wrNgozEdqMh/JIRayVjlKfPpu3OiEFwt/uKvLEepKei/djUMdRnMyjTcXTziDGNg
+B/51pWm7BLKE3YiqVAFZGBOi7OXZ0bRFVaUZyPOOP/xRr7DrdDRgFVpM4/Z9D0y
p3anrWwkp6UF+IlatxjIDNGiAlWlWgNUZsFxWBMjRHAunOGhlrTNV7PVh81+LNBM
I8Z9B+FDW/ECuxRSP2oK0an+4fVwJiOfGWSnuo6cIkW2ewh8kwr6Vvnu3bDytyew
7xU9TvJN3fhYgU8pWK1VQ3ZIYan4zcAL/v40KBHDVIF49iKerYbKHGkCI4vJvakH
lzf+dsUzYfQesTmB2sQUDdVvwpBtVd/xbD+mytRWv3bjapGIZ9r9LDGbjr8rgH0M
egyPpxfdfVYjTWdpIx/tDHfyPEkuL7EjitKV7B83NbMq0N6GhQN2sT8L8DM7aC5p
0x7kV5B4ZnE=
=wZYX
-----END PGP SIGNATURE-----
Merge tag 'iio-for-5.19a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next
Jonathan writes:
First set of IIO new device support, features and cleanup for 5.19
Usual mixed bag. Stand out this time is Andy Shevchenko's continuing
effort to move drivers over the generic firmware interfaces.
Device support
* sprd,sc2720
- upm9620 binding addition.
- Refactor and support for sc2720, sc2721 and sc2730.
* ti,ads1015
- Refactor driver and add support for TLA2024.
Device support (IDs only)
* invensense,mpu6050
- Add ID for ICM-20608-D.
* st,accel:
- Add ID for lis302dl.
* st,lsm6dsx
- Add support for ASM330LHHX (can fallback to LSM6DSR.)
Features
* convert drivers to device properties
- IIO core
- adi,ad7266
- adi,adis16480
- adi,adxl355
- bosch,bmi160
- domintech,dmard06
- fsl,fxas21002c
- invensense,mpu3050
- linear,ltc2983
- linear,ltc2632
- maxbotix,mb1232
- maxim,max31856
- maxim,max31865
- multiplexer
- ping
- rescale
- taos,tsl2772
* core
- Add runtime check on whether realbits fit in storagebits for each
channel.
* adi,ad_sigma_delta
- Add sequencer support and relevant update_scan_mode callbacks for
adi,ad7192 and adi,ad7124.
Cleanup and minor fixes
* MAINTAINERS
- Update Lorenzo Bianconi's email address for IIO drivers.
- Add entry for ad3552r and update maintainer in dt-binding doc.
* tree-wide
- Replace strtobool() with kstrtobool().
- Drop false OF dependencies.
* core
- Tidy up and document IIO modes.
- Take iio_buffer_enabled() out of header allowing current_mode to be
moved to the opaque structure.
- As all kfifo buffers use the same mode value, drop that parameter
and set it unconditionally.
- White space fixes and similar.
- Drop use of list iterator variable for
list_for_each_entry_continue_reverse and use list_prepare_entry to
restart.
* sysfs-trigger
- Replace use of 'found' variable with dedicate list iterator variable.
* adi,ad7124
- Drop misleading shift.
* adi,ad2s1210
- Remove redundant local variable assignment.
* adi,adis16480
- Use local device pointer to reduce repetition.
- Improve handling of clocks.
* domintech,dmard09
- White space.
* dummy driver
- Improve error handling.
* fsl,mma8452
- Add missing documentation of name element.
* invensense,mpu3050
- Stop remove() returning non 0.
* kionix,kxsd9
- White space.
* linear,ltc2688
- Use local variable for struct device.
- Combine of_node_put() error handling paths.
* linear,ltc2983
- Avoid use of constants in messages where a define is available.
* microchip,mcp4131
- Fix compatible in dt example.
* pni,rm3100
- Stop directly accessing iio_dev->current_mode just to find out
if the buffer is enabled.
* renesas,rzg2l
- Relax kconfig constraint to include newer devices.
* sprd,sc27xx
- Fix wrong scaling mask.
- Improve the calibration values.
* samsung,ssp
- Replace a 'found' variable in favor of an explicit value that was
found.
* sensortek,stk3xx
- Add proximity-near-level binding and driver support.
* st,st_sensors:
- Drop unused accel_type enum.
- Return early in *_write_raw()
- Drop unnecessary locking in _avail functions.
- Add local lock to protect odr against concurrent updates allowing
mlock to no longer be used outside of the core.
- Use iio_device_claim_direct_mode() rather than racy checking of
the current mode.
* st,stmpe-adc
- Fix checks on wait_for_completion_timeout().
- Allow use of of_device_id for matching.
* st,stm32-dfsdm
- Stop accessing iio_dev->current_mode to find out if the buffer
is enabled (so we can hide that variable in the opaque structure)
* st,vl53l0x
- Fix checks on wait_for_completion_timeout.
* ti,ads1015
- Add missing ID for ti,ads1115 in binding doc.
- Convert from repeated chip ID look up to selecting static const
data.
- Switch to read_avail() callback.
* ti,ads8688
- Use of_device_id for driver matching.
* ti,palmas-adc
- Drop a warning on minor calibration mismatch leading to slightly
negative values after applying the calibration.
* tag 'iio-for-5.19a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (95 commits)
iio: ti-ads8688: use of_device_id for OF matching
iio: stmpe-adc: use of_device_id for OF matching
dt-bindings: iio: Fix incorrect compatible strings in examples
iio: gyro: mpu3050: Make mpu3050_common_remove() return void
iio: dac: ltc2632: Make use of device properties
iio: temperature: max31865: Make use of device properties
iio: proximity: mb1232: Switch to use fwnode_irq_get()
iio: imu: adis16480: Improve getting the optional clocks
iio: imu: adis16480: Use temporary variable for struct device
iio: imu: adis16480: Make use of device properties
staging: iio: ad2s1210: remove redundant assignment to variable negative
iio: adc: sc27xx: add support for PMIC sc2730
iio: adc: sc27xx: add support for PMIC sc2720 and sc2721
iio: adc: sc27xx: refactor some functions for support more PMiCs
iio: adc: sc27xx: structure adjustment and optimization
iio: adc: sc27xx: Fine tune the scale calibration values
iio: adc: sc27xx: fix read big scale voltage not right
dt-bindings:iio:adc: add sprd,ump9620-adc dt-binding
iio: proximity: stk3310: Export near level property for proximity sensor
dt-bindings: iio: light: stk33xx: Add proximity-near-level
...
RK3588 can have 10 different device functions, so increase the maximum
amount appropriately. Considering rockchip uses auto-generated pinmux
files, adding a quite complex if construct to increase the limit just
for rk3588 does not seem to be worth the effort.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220504213251.264819-19-sebastian.reichel@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
'gpio-reserved-ranges' property is already used and supported by common pinctrl
bindings, so add it also here to fix warnings like:
qrb5165-rb5.dtb: gpio@c000: 'gpio-reserved-ranges' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220508135932.132378-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
'input-disable' is already used and supported by common pinctrl
bindings, so add it also here to fix warnings like:
arch/arm64/boot/dts/qcom/qrb5165-rb5.dtb: gpio@c000: lt9611-rst-state: 'oneOf' conditional failed, one must be fixed:
'input-disable' does not match any of the regexes: 'pinctrl-[0-9]+'
'function', 'input-disable', 'output-high', 'pins', 'power-source' do not match any of the regexes: '(pinconf|-pins)$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220507194913.261121-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add missing 'gpio-line-names' property and describe its constraints for
all models except PM8226 (which seems not really used).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220507194913.261121-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:
arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dtb: gpios@c000: divclk4-state: 'oneOf' conditional failed, one must be fixed:
'pins' is a required property
'function' is a required property
'pinconf' does not match any of the regexes: 'pinctrl-[0-9]+'
[[2]] is not of type 'object'
Make the schema stricter and expect such nodes to be either named
'pinconfig' or followed with '-pins' prefix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220507194913.261121-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The pm6125 comes with 9 GPIOs, without holes.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220511220613.1015472-3-marijn.suijten@somainline.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add VTM bindings documentation. In the Voltage Thermal
Management Module(VTM), K3 J72XX supplies a voltage
reference and a temperature sensor feature that are gathered in the band
gap voltage and temperature sensor (VBGAPTS) module. The band
gap provides current and voltage reference for its internal
circuits and other analog IP blocks. The analog-to-digital
converter (ADC) produces an output value that is proportional
to the silicon temperature.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220517172920.10857-2-j-keerthy@ti.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
The Qualcomm SC8280XP platform has three instances of the tsens block,
add a compatible for these instances.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220503153436.960184-1-bjorn.andersson@linaro.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Add compatible for the LMh blocks found in the Qualcomm sc8180x
platform.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220502164504.3972938-2-bjorn.andersson@linaro.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Document RZ/G2UL TSU bindings. The TSU block on RZ/G2UL is identical to one
found on RZ/G2L SoC. No driver changes are required as generic compatible
string "renesas,rzg2l-tsu" will be used as a fallback.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220501081930.23743-1-biju.das.jz@bp.renesas.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Add compatibility string for the thermal sensors on MSM8960/APQ8064
platforms.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220406002648.393486-2-dmitry.baryshkov@linaro.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Add documentation for PMIC5 Gen2 ADC_TM peripheral.
It is used for monitoring ADC channel thresholds for PMIC7-type
PMICs. It is present on PMK8350, like PMIC7 ADC and can be used
to monitor up to 8 ADC channels, from any of the PMIC7 PMICs
on a target, through PBS(Programmable Boot Sequence).
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1648991869-20899-2-git-send-email-quic_jprakash@quicinc.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Document RZ/V2L TSU bindings. The TSU block on RZ/V2L is identical to one
found on RZ/G2L SoC. No driver changes are required as generic compatible
string "renesas,rzg2l-tsu" will be used as a fallback.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20220308212315.4551-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
The ADIN1300 supports generating certain clocks on its GP_CLK pin, as
well as providing the reference clock on CLK25_REF.
Add DT properties to configure both pins.
Technically the phy also supports a recovered 125MHz clock for
synchronous ethernet. However SyncE should be configured dynamically at
runtime, so it is explicitly omitted in this binding.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Pull ARM SoC fixes from Arnd Bergmann:
"The SoC bug fixes have calmed down sufficiently, there is one minor
update for the MAINTAINERS file, and few bug fixes for dts
descriptions:
- Updates to the BananaPi R2-Pro (rk3568) dts to match production
hardware rather than the prototype version.
- Qualcomm sm8250 soundwire gets disabled on some machines to avoid
crashes
- A number of aspeed SoC specific fixes, addressing incorrect pin
cotrol settings, some values in the romed8hm board, and a revert
for an accidental removal of a DT node"
* 'arm/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
MAINTAINERS: omap: remove me as a maintainer
ARM: dts: aspeed: Add video engine to g6
ARM: dts: aspeed: romed8hm3: Fix GPIOB0 name
ARM: dts: aspeed: romed8hm3: Add lm25066 sense resistor values
ARM: dts: aspeed-g6: fix SPI1/SPI2 quad pin group
ARM: dts: aspeed-g6: add FWQSPI group in pinctrl dtsi
dt-bindings: pinctrl: aspeed-g6: add FWQSPI function/group
pinctrl: pinctrl-aspeed-g6: add FWQSPI function-group
dt-bindings: pinctrl: aspeed-g6: remove FWQSPID group
pinctrl: pinctrl-aspeed-g6: remove FWQSPID group in pinctrl
ARM: dts: aspeed-g6: remove FWQSPID group in pinctrl dtsi
arm64: dts: qcom: sm8250: don't enable rx/tx macro by default
arm64: dts: rockchip: Add gmac1 and change network settings of bpi-r2-pro
arm64: dts: rockchip: Change io-domains of bpi-r2-pro
This uses anyOf which is wrong. Use oneOf and move the items under the
description. Also drop allOf for $ref.
Reported-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/CAE-0n50KE9bkqZvCOLtCGiq3g1jYhK7zpVcVFBzinaguNhNaPw@mail.gmail.com
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Detailed description for this pull request:
1. Update devfreq core
- Add cpu based scaling support to passive governor. Some device like
cache might require the dynamic frequency scaling. But, it has very
tightly to cpu frequency. So that use passive governor to scale
the frequency according to current cpu frequency.
To decide the frequency of the device, the governor does one of the following:
: Derives the optimal devfreq device opp from required-opps property of
the parent cpu opp_table.
: Scales the device frequency in proportion to the CPU frequency. So, if
the CPUs are running at their max frequency, the device runs at its
max frequency. If the CPUs are running at their min frequency, the
device runs at its min frequency. It is interpolated for frequencies
in between.
2. Update devfreq driver
- Update rk3399_dmc.c as following:
: Convert dt-binding document to YAML and deprecate unused properties.
: Use Hz units for the device-tree properties of rk3399_dmc.
: rk3399_dmc is able to set the idle time before changing the dmc clock.
Specify idle time parameters by using nano-second unit on dt bidning.
: Add new disable-freq properties to optimize the power-saving feature
of rk3399_dmc.
: Disable devfreq-event device on remove() to fix unbalanced
enable-disable count.
: Use devm_pm_opp_of_add_table()
: Block PMU (Power-Management Unit) transitions when scaling frequency
by ARM Trust Firmware in order to fix the conflict between PMU and DMC
(Dynamic Memory Controller).
-----BEGIN PGP SIGNATURE-----
iQJKBAABCgA0FiEEsSpuqBtbWtRe4rLGnM3fLN7rz1MFAmKDddYWHGN3MDAuY2hv
aUBzYW1zdW5nLmNvbQAKCRCczd8s3uvPU1o0EACGE7FV/pA/sbOFhhLXQlI1XMQf
C2XVvjigP5M7Y9qgM6qLBKCSmRPbBjuO4VLKkIycmo2GRcUs+Sk5CqALjWZF0tDR
aiAV+P3wIC2pCZNtAXJG6BhP5GNzGYYdv2zJfNmVUsYUYVC3ezppuE1Yp2Sscq5t
K43eAOq0c9+TTeLfdDKdi07QtevMHwbOxjNUhwnzN5+yD9cknK1Ht5FVjDc8eYTG
yBJPgMy9qhNqEZ4gl9zpKJkpAJMOhquT4ZtytNioIfnmKCrpyiOy+yApvW5WiU1d
/8KMiG42C47rUBYCiEGEdn6PaTOpuOK0hnuoxlxE07dqJP349SbozFTqZxfbCJhI
OjZSdLTolPFq82zuAafBJmijmeAiYdI0FKrhXmQo4doeleIQG9z0h8YpkQSnF47L
xsj7QswD0LxtMQbYv5zds1NoGnUn/U+TpoJ8mbpg5gPWKaBTNdTZFJQj+HXtrDyy
1ouR41u6kOoLLDHu2I5f9dTMptJRg3jS+kQfDv17K8u5mAmcwFidpOiyac6m2xad
Nnn85NAE9JaxpzVe3+S3uQdscEe2FBWEZCkbrCcPn2T88BZwrfcby02YRBw22WkS
p4xPAOncw4lhZ6z3pedcH/1+kk6uoTube5QK8ddSRxYrRavtOsqchAaec+hYRNif
CbjJOqsdbDLa7ANLxw==
=/3W8
-----END PGP SIGNATURE-----
Merge tag 'devfreq-next-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux
Pull devfreq changes for 5.19-rc1 from Chanwoo Choi:
"1. Update devfreq core
- Add cpu based scaling support to passive governor. Some device like
cache might require the dynamic frequency scaling. But, it has very
tightly to cpu frequency. So that use passive governor to scale
the frequency according to current cpu frequency.
To decide the frequency of the device, the governor does one of the following:
: Derives the optimal devfreq device opp from required-opps property of
the parent cpu opp_table.
: Scales the device frequency in proportion to the CPU frequency. So, if
the CPUs are running at their max frequency, the device runs at its
max frequency. If the CPUs are running at their min frequency, the
device runs at its min frequency. It is interpolated for frequencies
in between.
2. Update devfreq drivers
- Update rk3399_dmc.c as following:
: Convert dt-binding document to YAML and deprecate unused properties.
: Use Hz units for the device-tree properties of rk3399_dmc.
: rk3399_dmc is able to set the idle time before changing the dmc clock.
Specify idle time parameters by using nano-second unit on dt bidning.
: Add new disable-freq properties to optimize the power-saving feature
of rk3399_dmc.
: Disable devfreq-event device on remove() to fix unbalanced
enable-disable count.
: Use devm_pm_opp_of_add_table()
: Block PMU (Power-Management Unit) transitions when scaling frequency
by ARM Trust Firmware in order to fix the conflict between PMU and DMC
(Dynamic Memory Controller)."
* tag 'devfreq-next-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux:
PM / devfreq: passive: Keep cpufreq_policy for possible cpus
PM / devfreq: passive: Reduce duplicate code when passive_devfreq case
PM / devfreq: Add cpu based scaling support to passive governor
PM / devfreq: Export devfreq_get_freq_range symbol within devfreq
PM / devfreq: rk3399_dmc: Block PMU during transitions
soc: rockchip: power-domain: Manage resource conflicts with firmware
PM / devfreq: rk3399_dmc: Avoid static (reused) profile
PM / devfreq: rk3399_dmc: Use devm_pm_opp_of_add_table()
PM / devfreq: rk3399_dmc: Disable edev on remove()
PM / devfreq: rk3399_dmc: Support new *-ns properties
PM / devfreq: rk3399_dmc: Support new disable-freq properties
PM / devfreq: rk3399_dmc: Use bitfield macro definitions for ODT_PD
PM / devfreq: rk3399_dmc: Drop excess timing properties
PM / devfreq: rk3399_dmc: Drop undocumented ondemand DT props
dt-bindings: devfreq: rk3399_dmc: Add more disable-freq properties
dt-bindings: devfreq: rk3399_dmc: Specify idle params in nanoseconds
dt-bindings: devfreq: rk3399_dmc: Fix Hz units
dt-bindings: devfreq: rk3399_dmc: Deprecate unused/redundant properties
dt-bindings: devfreq: rk3399_dmc: Convert to YAML
Add support for HPE GXP. The GXP is based on the cortex a9 processor and
supports arm7.
Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Add support for the HPE GXP Timer and Watchdog. There are multiple
timers on the SoC but only one is enabled at this time.
Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
When the binding was converted it appeared necessary to set
'unevaluatedProperties: true' because of the switch devices on the
turris-mox board. Actually the error was because of the reg property
being incorrect causing the rest of the properties to be unevaluated.
After the reg properties are fixed for turris-mox we can set
'unevaluatedProperties: false' as is generally expected.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
These interconnects are modeled as clks, not interconnects, therefore
remove the compatibles from the binding as they're unused.
Cc: Alex Elder <elder@linaro.org>
Cc: Taniya Das <quic_tdas@quicinc.com>
Cc: Mike Tipton <quic_mdtipton@quicinc.com>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20220415005828.1980055-3-swboyd@chromium.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
This contains a few fixes for the sc8180x interconnect provider driver to make
it functional.
* icc-sc8180x
dt-bindings: interconnect: Add SC8180X QUP0 virt provider
interconnect: qcom: sc8180x: Modernize sc8180x probe
interconnect: qcom: sc8180x: Fix QUP0 nodes
interconnect: qcom: sc8180x: Mark some BCMs keepalive
Link: https://lore.kernel.org/r/20220503211925.1022169-1-bjorn.andersson@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Add compatible for the QUP0 BCM provider found in SC8180X.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220503211925.1022169-2-bjorn.andersson@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
The PCA85073A RTC has the same programming model as the PCF85063A.
Add a compatible entry for it.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20220419014445.341444-1-festevam@gmail.com
Convert rockchip,rk3368-cru.txt to YAML.
Changes against original bindings:
- Add clocks and clock-names because the device has to have
at least one input clock.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220329180550.31043-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Convert rockchip,rk3228-cru.txt to YAML.
Changes against original bindings:
Add clocks and clock-names because the device has to have
at least one input clock.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220330121923.24240-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Convert rockchip,rk3036-cru.txt to YAML.
Changes against original bindings:
Add clocks and clock-names because the device has to have
at least one input clock.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220330114847.18633-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Convert rockchip,rk3308-cru.txt to YAML.
Changes against original bindings:
- Add clocks and clock-names because the device has to have
at least one input clock.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220329184339.1134-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
If the ChromeOS board is a detachable, this cros-ec-keyb device won't
have a matrix keyboard but it may have some button switches, e.g. volume
buttons and power buttons. The driver still registers a keyboard though
and that leads to userspace confusion around where the keyboard is.
We tried to work around this by only registering the keyboard device when
rows/columns properties were specified for the device, but that led to
another problem where removing the rows/columns properties breaks the
existing binding. Technically before that commit the rows/columns
properties were required, otherwise the driver would fail to probe.
Removing the properties from devicetrees makes the driver fail to probe
unless the corresponding driver patch is present. Furthermore, this makes
requiring matrix keyboard properties for devices that really have a
keyboard impossible because the compatible drives the schema and now the
properties are optional.
Add a more specific compatible for this type of device that indicates to
the OS that there are only switches and no matrix keyboard present.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20220516183452.942008-2-swboyd@chromium.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Convert rockchip,px30-cru.txt to YAML.
Changes against original bindings:
Use compatible string: "rockchip,px30-pmucru"
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220330103923.11063-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Current dts files with RK3188/RK3066 'cru' nodes are manually verified.
In order to automate this process rockchip,rk3188-cru.txt has to be
converted to YAML.
Changed:
Add properties to fix notifications by clocks.yaml for example:
clocks
clock-names
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220329111323.3569-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Current dts files with RK3288 'cru' nodes are manually verified.
In order to automate this process rockchip,rk3288-cru.txt has to be
converted to YAML.
Changed:
Add properties to fix notifications by clocks.yaml for example:
clocks
clock-names
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220329113657.4567-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This documentation provides wrong node name for the Ethernet controller.
It should be "ethernet" instead of "smsc" as required by Ethernet
controller devicetree schema:
Documentation/devicetree/bindings/net/ethernet-controller.yaml
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220517111505.929722-4-o.rempel@pengutronix.de
Create initial schema for Microchip/SMSC LAN95xx USB Ethernet controllers and
import some of currently supported USB IDs form drivers/net/usb/smsc95xx.c
These devices are already used in some of DTs. So, this schema makes it official.
NOTE: there was no previously documented txt based DT binding for this
controllers.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220517111505.929722-3-o.rempel@pengutronix.de
Create schema for ASIX USB Ethernet controllers and import some of
currently supported USB IDs form drivers/net/usb/asix_devices.c
These devices are already used in some of DTs. So, this schema makes it official.
NOTE: there was no previously documented txt based DT binding for this
controllers.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220517111505.929722-2-o.rempel@pengutronix.de
No properly bus-type for DPI video bus, add bus-type 7 for it.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Xin Ji <xji@analogixsemi.com>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Convert the old text based dw9807-vcm chip DT bindings to json-schema.
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
The imx412 like many I2C camera sensors has three voltage rails which
depending on platform may be necessary to switch power onto directly.
Add in as optional rails so as not to break anything for existing users.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Jacopo Mondi <jacopo@jmondi.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
The SCP co-processor can optionally be passed a reserved memory region
to use. Add this property in the dt-binding.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220511195452.871897-3-nfraprado@collabora.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Commit ca23ecfdbd ("remoteproc/mediatek: support L1TCM") added support
for the l1tcm memory region on the MT8192 SCP, adding a new da_to_va
callback that handles l1tcm while keeping the old one for
back-compatibility with MT8183. However, since the mt8192 compatible was
missing from the dt-binding, the accompanying dt-binding commit
503c64cc42 ("dt-bindings: remoteproc: mediatek: add L1TCM memory region")
mistakenly added this reg as if it were for mt8183. And later
it became common to all platforms as their compatibles were added.
Fix the dt-binding so that the l1tcm reg can be present only on the
supported platforms: mt8192 and mt8195.
Fixes: 503c64cc42 ("dt-bindings: remoteproc: mediatek: add L1TCM memory region")
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220511195452.871897-2-nfraprado@collabora.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
The VOP2 driver relies on reg-names properties, but these are not
documented. Add the missing documentation and make reg-names mandatory.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20220511082109.1110043-2-s.hauer@pengutronix.de
Since commit
| 1f9234401c ("dt-bindings: can: add can-controller.yaml")
there is a common CAN controller binding. Add this to the ctucanfd
binding.
Cc: Ondrej Ille <ondrej.ille@gmail.com>
Acked-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
The Renesas R-Car CAN FD Controller always uses two or more interrupts.
Make the interrupt-names properties a required property, to make it
easier to identify the individual interrupts.
Update the example accordingly.
Link: https://lore.kernel.org/all/a68e65955e0df4db60233d468f348203c2e7b940.1651512451.git.geert+renesas@glider.be
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Add the missing power-domain property which is needed on all the
RZ/N1 SoC IPs.
Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20220513104957.257721-2-miquel.raynal@bootlin.com
The generic property, used in most of the drivers and defined in generic
dma-common DT bindings, is 'dma-channels'.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220503065147.51728-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
The "interrupt" property is optional because it is only necessary for
controllers supporting DMAs (Not implemented yet in the new driver).
Cc: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Tested-by: Joel Stanley <joel@jms.id.au>
Tested-by: Tao Ren <rentao.bupt@gmail.com>
Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Link: https://lore.kernel.org/r/20220509175616.1089346-3-clg@kaod.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Document the Ethernet AVB IP found on RZ/V2M SoC.
It includes the Ethernet controller (E-MAC) and Dedicated Direct memory
access controller (DMAC) for transferring transmitted Ethernet frames
to and received Ethernet frames from respective storage areas in the
RAM at high speed.
The AVB-DMAC is compliant with IEEE 802.1BA, IEEE 802.1AS timing and
synchronization protocol, IEEE 802.1Qav real-time transfer, and the
IEEE 802.1Qat stream reservation protocol.
R-Car has a pair of combined interrupt lines:
ch22 = Line0_DiA | Line1_A | Line2_A
ch23 = Line0_DiB | Line1_B | Line2_B
Line0 for descriptor interrupts (which we call dia and dib).
Line1 for error related interrupts (which we call err_a and err_b).
Line2 for management and gPTP related interrupts (mgmt_a and mgmt_b).
RZ/V2M hardware has separate interrupt lines for each of these.
It has 3 clocks; the main AXI clock, the AMBA CHI (Coherent Hub
Interface) clock and a gPTP reference clock.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Signed-off-by: David S. Miller <davem@davemloft.net>
Convert rockchip,rv1108-cru.txt to YAML.
Changes against original bindings:
Add clocks and clock-names because the device has to have
at least one input clock.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220330131608.30040-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The rk3568 cru requires a clock input and a phandle to the grf node. Add
these bindings to clear some dtbs_check warnings.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220511150117.113070-2-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The node names should be generic, so use "flash" for dataflash nodes and
for cfi-flash.
Suggested-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220412105013.249793-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
- Add new Qualcomm device-tree compatible strings
- Add new Nvidia device-tree compatible string for Tegra234
- Fix UAF in SMMUv3 shared virtual addressing code
- Force identity-mapped domains for users of ye olde SMMU legacy binding
- Minor cleanups
-----BEGIN PGP SIGNATURE-----
iQFEBAABCgAuFiEEPxTL6PPUbjXGY88ct6xw3ITBYzQFAmJ6eJ0QHHdpbGxAa2Vy
bmVsLm9yZwAKCRC3rHDchMFjNNroB/92+cfwPyDnA8qdsSCAbyRU2ChrcZvHfKom
0YxnN6mxQxevcFcLEg8NfbueVgcpZuogrVmBy2ES7s/yJwyFbHk9Pxsq8WO1oMNC
idIZHjpS9AC4yItgHPzmZd0sUEzmOgINMjHFxdXVnVz4F6EpfrPfRucaBBDe4y1M
QjKKkjFhMuKjiZWBbQYxRjTJR2LelpK3c2rWhdBxqOLpFJ+XoEcBcaPqiLU5BLcE
Lbzg88ldneFfM8ixAv0fFY+agxv0vorWXS7GDFOg0nRStMqOeI6Y1mOSKnskVtcD
dc+Gm8tX7ObeDu/59l+2BsebSemMYapdy7QCEAQDKmna6SayFFA4
=Z0YK
-----END PGP SIGNATURE-----
Merge tag 'arm-smmu-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into arm/smmu
Arm SMMU updates for 5.19
- Add new Qualcomm device-tree compatible strings
- Add new Nvidia device-tree compatible string for Tegra234
- Fix UAF in SMMUv3 shared virtual addressing code
- Force identity-mapped domains for users of ye olde SMMU legacy binding
- Minor cleanups
For "st,stm32mp1-rcc-secure" schema, clocks and clock-names entries are now
required properties.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220511092559.4952-1-alexandre.torgue@foss.st.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
the video-decoder on rk3328.
RK3399 received some improvements and nodes for the memory controller.
Additional peripherals for PineNote, Gru and BananaPi-R2-Pro.
New boards are the Firefly Station M2, Pine64 SoQuartz SOM and
Quartz64 model B as well as the Radxa Rock3 model A.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmJ8RpUQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgQJjB/9PfcoC3u5FzRDuE8w74u0A3UPx+diqHdsR
QKwqsqngjMNsnCQjwsu8qbbbBevgvELorOVEY+RjuY4uNkxecf9j8lFlItk2UvVf
2ZZZm/vNP16Gaera5S7GVYiWmisLdbyQ8xw61iJoNbCrsWeLDVxJ2unyG+E7dxa6
u5bHhsd58PE/BI0Paxf/OIw4oGh2FAbCbMiXNQjwHHu5eGjgy+V6guqkJ6FruhmG
qlu9DZQz33DGQ7N57ympheqVsih9vm3lA0dfSiOpiyG2CNwZ8k80aW40mEcuJkbA
yWGUHbMc80Kxi2sWkYDWpagavt6M1bn8pQgCrNrRYWVPhktUvG2c
=2V+q
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ+JMgACgkQmmx57+YA
GNnq2g//ek80cpzuUCOr6ox1Im/gIdo+Yf8NqbuI481alwWjfS9Nl1wptr/b3nP3
A3xrHvNrN2T/OFsyvWkHI7ZItk821E5Y8AtawPVuozr8myZ5msiyZ63cXcKkiVvG
+f8txwBgbvWVqVXtgOZFQs/BfGr+DLA3VHXewwZAdZp0GKzgmXWF5WKJtb0q8KOn
yQoTGjiN0bDQR9UuX18bVJgibtH+POuQdkScvPfukiXyIpgdY0hlQHt67VTkWfeY
jH7OgbcG768hipWXK3IKoLkl1ECL6Sycy/aMiSbqHu0Pp/qA9hJdFKHaQ2+sj4vF
HjaslQRTFsj0Lp0nJaUeDq37Ds1P/ZfAqo+xXeWNjZzvowBIDLB3vOk6AW0aSVw4
mmhVDULyEE5IunoXORLjXkhvPtP5SLA4SBbANvrSCtk/pn9DvG+YE+GjjrD8loHC
eujIFeV+THp3JMpM2nmAQxKo2Xz+3s3eEi70XzDfZBNNBO8n0eRHM4oKukUTWOAl
kA7jHRCnU0TFp+y4VyfocZUarbJiisj0eeeQkzQFQCSJyX8mFYyY9rd+DrJleged
ab1AoQhwJrNppb7yy0WegQ8LAJi/zbT8wVklgqpyh7DKR7FAZLjEQWcepOFJ8vPm
FJUmYjCJSqTnjCxFvHNavudxD+DGl/Rc9eSZr9UDUIzFod85MMQ=
=XPfy
-----END PGP SIGNATURE-----
Merge tag 'v5.19-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
New peripherals supported on rk356x: sfc, usb3, sata and
the video-decoder on rk3328.
RK3399 received some improvements and nodes for the memory controller.
Additional peripherals for PineNote, Gru and BananaPi-R2-Pro.
New boards are the Firefly Station M2, Pine64 SoQuartz SOM and
Quartz64 model B as well as the Radxa Rock3 model A.
* tag 'v5.19-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (32 commits)
arm64: dts: rockchip: enable otg/drd operation of usb_host0_xhci in rk356x
arm64: dts: rockchip: rename HDMI ref clock to 'ref' on rk3399
arm64: dts: rockchip: add dts for Firefly Station M2 rk3566
arm64: dts: rockchip: add SoQuartz CM4IO dts
arm64: dts: rockchip: add Pine64 Quartz64-B device tree
dt-bindings: arm: rockchip: Add Firefly Station M2
dt-bindings: arm: rockchip: Add Pine64 SoQuartz SoM
dt-bindings: arm: rockchip: Add Pine64 Quartz64 Model B
arm64: dts: rockchip: enable usb hub on the radxa rock3 model a
arm64: dts: rockchip: add usb3 support to the radxa rock3 model a
arm64: dts: rockchip: add rk356x sfc support
arm64: dts: rockchip: Add USB and TCPC to rk3566-pinenote
arm64: dts: rockchip: Add accelerometer to rk3566-pinenote
arm64: dts: rockchip: add an input enable pinconf to rk3399
arm64: dts: rockchip: Add vdec support for RK3328
arm64: dts: rockchip: Rename vdec_mmu node for RK3328
arm64: dts: rockchip: Enable dmc and dfi nodes on gru
arm64: dts: rockchip: Add dfi and dmc nodes to rk3399
arm64: dts: rockchip: add clocks property to cru nodes rk3399
arm64: dts: rockchip: use generic node name for pmucru on rk3399
...
Link: https://lore.kernel.org/r/7748558.DvuYhMxLoT@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Microchip XISC supports a bus width of 14 bits.
Add it to the supported bus widths.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
