proxmox-mirrors/mirror_ubuntu-kernels
1
0
Fork 0
mirror of https://git.proxmox.com/git/mirror_ubuntu-kernels.git synced 2026-01-07 02:09:20 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
1,216,913 Commits 2 Branches 91 Tags 3.2 GiB
7003589dab
Commit Graph

1795 Commits

Author SHA1 Message Date
Linus Torvalds
f8fd5c2483 This pull request is full of clk driver changes. In fact, there aren't any 
changes to the clk framework this time around. That's probably because everyone
 was on vacation (yours truly included). We did lose a couple clk drivers this
 time around because nobody was using those devices. That skews the diffstat a
 bit, but either way, nothing looks out of the ordinary here. The usual suspects
 are chugging along adding support for more SoCs and fixing bugs.
 
 If I had to choose, I'd say the theme for the past few months has been
 "polish". There's quite a few patches that migrate to
 devm_platform_ioremap_resource() in here. And there's more than a handful of
 patches that move the NR_CLKS define from the DT binding header to the driver.
 There's even patches that migrate drivers to use clk_parent_data and clk_hw to
 describe clk tree topology. It seems that the spring (summer?) cleaning bug got
 some folks, or the semiconductor shortage finally hit the software side.
 
 New Drivers:
  - StarFive JH7110 SoC clock drivers
  - Qualcomm IPQ5018 Global Clock Controller driver
  - Versa3 clk generator to support 48KHz playback/record with audio codec on
    RZ/G2L SMARC EVK
 
 Removed Drivers:
  - Remove non-OF mmp clk drivers
  - Remove OXNAS clk driver
 
 Updates:
  - Add __counted_by to struct clk_hw_onecell_data and struct spmi_pmic_div_clk_cc
  - Move defines for numbers of clks (NR_CLKS) from DT headers to drivers
  - Introduce kstrdup_and_replace() and use it
  - Add PLL rates for Rockchip rk3568
  - Add the display clock tree for Rockchip rv1126
  - Add Audio Clock Generator (ADG) clocks on Renesas R-Car Gen3 and RZ/G2 SoCs
  - Convert sun9i-mmc clock to use devm_platform_get_and_ioremap_resource()
  - Fix function name in a comment in ccu_mmc_timing.c
  - Parameter name correction for ccu_nkm_round_rate()
  - Implement CLK_SET_RATE_PARENT for Allwinner NKM clocks, i.e. consider alternative
    parent rates when determining clock rates
  - Set CLK_SET_RATE_PARENT for Allwinner A64 pll-mipi
  - Support finding closest (as opposed to closest but not higher) clock rate
    for NM, NKM, mux and div type clocks, as use it for Allwinner A64 pll-video0
  - Prefer current parent rate if able to generate ideal clock rate for Allwinner NKM clocks
  - Clean up Qualcomm SMD RPM driver, with interconnect bus clocks moved out to
    the interconnect drivers
  - Fix various PM runtime bugs across many Qualcomm clk drivers
  - Migrate Qualcomm MDM9615 is to parent_hw and parent_data
  - Add network related resets on Qualcomm IPQ4019
  - Add a couple missing USB related clocks to Qualcomm IPQ9574
  - Add missing gpll0_sleep_clk_src to Qualcomm MSM8917 global clock controller
  - In the Qualcomm QDU1000 global clock controller, GDSCs, clkrefs, and GPLL1 are
    added, while PCIe pipe clock, SDCC rcg ops are corrected
  - Add missing GDSCs to and correct GDSCs for the SC8280XP global clock controller driver
  - Support retention for the Qualcomm SC8280XP display clock controller GDSCs.
  - Qualcommm's SDCC apps_clk_src is marked with CLK_OPS_PARENT_ENABLE to fix
    issues with missing parent clocks across sc7180, sm7150, sm6350 and sm8250,
    while sm8450 is corrected to use floor ops
  - Correct Qualcomm SM6350 GPU clock controller's clock supplies
  - Drop unwanted clocks from the Qualcomm IPQ5332 GCC driver
  - Add missing OXILICX GDSC to Qualcomm MSM8226 GCC
  - Change the delay in the Qualcomm reset controller to fsleep() for correctness
  - Extend the Qualcomm SM83550 Video clock controller to support SC8280XP
  - Add graphics clock support on Renesas RZ/G2M, RZ/G2N, RZ/G2E, and R-Car H3,
    M3-W, and M3-N SoCs
  - Add Clocked Serial Interface (CSI) clocks on Renesas RZ/V2M
  - Add PWM (MTU3) clock and reset on Renesas RZ/G2UL and RZ/Five
  - Add the PDM IPC clock for i.MX93
  - Add 519.75MHz frequency support for i.MX9 PLL
  - Simplify the .determine_rate() implementation for i.MX GPR mux
  - Make the i.MX8QXP LPCG clock use devm_platform_ioremap_resource()
  - Add the audio mux clock to i.MX8
  - Fix the SPLL2 MULT range for PLLv4
  - Update the SPLL2 type in i.MX8ULP
  - Fix the SAI4 clock on i.MX8MP
  - Add silicon revision print for i.MX25 on clocks init
  - Drop the return value from __mx25_clocks_init()
  - Fix the clock pauses on no-op set_rate for i.MX8M composite clock
  - Drop restrictions for i.MX PLL14xx and fix its max prediv value
  - Drop the 393216000 and 361267200 from i.MX PLL14xx rate table to allow
    glitch free switching
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmTv2wkRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSW1LRAAuHR2HoyB4bRHmCa1bfOfYYDfSWsBWEav
 tWIfBl86Nl/Je50Gk2NJ9vqU5OPqRZ57TIniijHHoX5n7/kYcr8KVmlomY07hUeg
 CzWyothkxg4k7+rQwVAWvmlR2YAVwzHDKcwq7gkMZOnW/y26LXip99cjopu2CJLx
 zVwTgvWollmd4KVlicnAlx4zUjgNkWR24iA4Lcf5ir+Dr6FYNjxLI+akBA8EPxxi
 wLixZbScgBSgpGn6KVgoFhclCToPS0gt5m6HfQxJ/svOCU54l+jRKpzkNZGWvyu4
 A8t3CRrwL2iS/mfCGk2yRlaKySoLLpjlpW1AI7fHTWbG2P6p8ZphtN7jOeeAEsbq
 TNpzWEjtY6B/lfRzxxINXkrtLaqmlnFY/P5np5fDrf/61gRFxLFQemyRdY/xCSJf
 Kwq8ja1mrSGWoDGG9XhDqTf9Yek9LRObNzlDrEmn/i/qLTcxhOIz58pzHg4iAlx5
 9HDtnJ8hKg4uE1TtT12Bmasb1+WzG7GYYESNfKWZhCvbRqEUzcDOHk7xpwYa1ffx
 yZIgMs7Sb/exNW8LMPYmgnyj/f9eo5IdjiQvune+Zy5NrdzfyN6Sf/LSibrqCF2z
 X5aFHqQrR8+PifD+se+g5HPa0ezSmBIhXzYUTOC6f+nywlrJjhwDXPDYI6Lcd//p
 r4mpOmJS+G4=
 =h2Jz
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk subsystem updates from Stephen Boyd:
 "This pull request is full of clk driver changes. In fact, there aren't
  any changes to the clk framework this time around. That's probably
  because everyone was on vacation (yours truly included). We did lose a
  couple clk drivers this time around because nobody was using those
  devices. That skews the diffstat a bit, but either way, nothing looks
  out of the ordinary here. The usual suspects are chugging along adding
  support for more SoCs and fixing bugs.

  If I had to choose, I'd say the theme for the past few months has been
  "polish". There's quite a few patches that migrate to
  devm_platform_ioremap_resource() in here. And there's more than a
  handful of patches that move the NR_CLKS define from the DT binding
  header to the driver. There's even patches that migrate drivers to use
  clk_parent_data and clk_hw to describe clk tree topology. It seems
  that the spring (summer?) cleaning bug got some folks, or the
  semiconductor shortage finally hit the software side.

  New Drivers:
   - StarFive JH7110 SoC clock drivers
   - Qualcomm IPQ5018 Global Clock Controller driver
   - Versa3 clk generator to support 48KHz playback/record with audio
     codec on RZ/G2L SMARC EVK

  Removed Drivers:
   - Remove non-OF mmp clk drivers
   - Remove OXNAS clk driver

  Updates:
   - Add __counted_by to struct clk_hw_onecell_data and struct
     spmi_pmic_div_clk_cc
   - Move defines for numbers of clks (NR_CLKS) from DT headers to
     drivers
   - Introduce kstrdup_and_replace() and use it
   - Add PLL rates for Rockchip rk3568
   - Add the display clock tree for Rockchip rv1126
   - Add Audio Clock Generator (ADG) clocks on Renesas R-Car Gen3 and
     RZ/G2 SoCs
   - Convert sun9i-mmc clock to use
     devm_platform_get_and_ioremap_resource()
   - Fix function name in a comment in ccu_mmc_timing.c
   - Parameter name correction for ccu_nkm_round_rate()
   - Implement CLK_SET_RATE_PARENT for Allwinner NKM clocks, i.e.
     consider alternative parent rates when determining clock rates
   - Set CLK_SET_RATE_PARENT for Allwinner A64 pll-mipi
   - Support finding closest (as opposed to closest but not higher)
     clock rate for NM, NKM, mux and div type clocks, as use it for
     Allwinner A64 pll-video0
   - Prefer current parent rate if able to generate ideal clock rate for
     Allwinner NKM clocks
   - Clean up Qualcomm SMD RPM driver, with interconnect bus clocks
     moved out to the interconnect drivers
   - Fix various PM runtime bugs across many Qualcomm clk drivers
   - Migrate Qualcomm MDM9615 is to parent_hw and parent_data
   - Add network related resets on Qualcomm IPQ4019
   - Add a couple missing USB related clocks to Qualcomm IPQ9574
   - Add missing gpll0_sleep_clk_src to Qualcomm MSM8917 global clock
     controller
   - In the Qualcomm QDU1000 global clock controller, GDSCs, clkrefs,
     and GPLL1 are added, while PCIe pipe clock, SDCC rcg ops are
     corrected
   - Add missing GDSCs to and correct GDSCs for the SC8280XP global
     clock controller driver
   - Support retention for the Qualcomm SC8280XP display clock
     controller GDSCs.
   - Qualcommm's SDCC apps_clk_src is marked with CLK_OPS_PARENT_ENABLE
     to fix issues with missing parent clocks across sc7180, sm7150,
     sm6350 and sm8250, while sm8450 is corrected to use floor ops
   - Correct Qualcomm SM6350 GPU clock controller's clock supplies
   - Drop unwanted clocks from the Qualcomm IPQ5332 GCC driver
   - Add missing OXILICX GDSC to Qualcomm MSM8226 GCC
   - Change the delay in the Qualcomm reset controller to fsleep() for
     correctness
   - Extend the Qualcomm SM83550 Video clock controller to support
     SC8280XP
   - Add graphics clock support on Renesas RZ/G2M, RZ/G2N, RZ/G2E, and
     R-Car H3, M3-W, and M3-N SoCs
   - Add Clocked Serial Interface (CSI) clocks on Renesas RZ/V2M
   - Add PWM (MTU3) clock and reset on Renesas RZ/G2UL and RZ/Five
   - Add the PDM IPC clock for i.MX93
   - Add 519.75MHz frequency support for i.MX9 PLL
   - Simplify the .determine_rate() implementation for i.MX GPR mux
   - Make the i.MX8QXP LPCG clock use devm_platform_ioremap_resource()
   - Add the audio mux clock to i.MX8
   - Fix the SPLL2 MULT range for PLLv4
   - Update the SPLL2 type in i.MX8ULP
   - Fix the SAI4 clock on i.MX8MP
   - Add silicon revision print for i.MX25 on clocks init
   - Drop the return value from __mx25_clocks_init()
   - Fix the clock pauses on no-op set_rate for i.MX8M composite clock
   - Drop restrictions for i.MX PLL14xx and fix its max prediv value
   - Drop the 393216000 and 361267200 from i.MX PLL14xx rate table to
     allow glitch free switching"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (207 commits)
  clk: qcom: Fix SM_GPUCC_8450 dependencies
  clk: lmk04832: Support using PLL1_LD as SPI readback pin
  clk: lmk04832: Don't disable vco clock on probe fail
  clk: lmk04832: Set missing parent_names for output clocks
  clk: mvebu: Convert to devm_platform_ioremap_resource()
  clk: nuvoton: Convert to devm_platform_ioremap_resource()
  clk: socfpga: agilex: Convert to devm_platform_ioremap_resource()
  clk: ti: Use devm_platform_get_and_ioremap_resource()
  clk: mediatek: Convert to devm_platform_ioremap_resource()
  clk: hsdk-pll: Convert to devm_platform_ioremap_resource()
  clk: gemini: Convert to devm_platform_ioremap_resource()
  clk: fsl-sai: Convert to devm_platform_ioremap_resource()
  clk: bm1880: Convert to devm_platform_ioremap_resource()
  clk: axm5516: Convert to devm_platform_ioremap_resource()
  clk: actions: Convert to devm_platform_ioremap_resource()
  clk: cdce925: Remove redundant of_match_ptr()
  clk: pxa910: Move number of clocks to driver source
  clk: pxa1928: Move number of clocks to driver source
  clk: pxa168: Move number of clocks to driver source
  clk: mmp2: Move number of clocks to driver source
  ...
 2023-08-30 19:53:39 -07:00
Linus Torvalds
8f447694c2 Devicetree updates for v6.6: 
DT core:
 - Add support for generating DT nodes for PCI devices. This is the
   groundwork for applying overlays to PCI devices containing
   non-discoverable downstream devices.
 
 - DT unittest additions to check reverted changesets, to test for
   refcount issues, and to test unresolved symbols. Also, various
   clean-ups of the unittest along the way.
 
 - Refactor node and property manipulation functions to better share code
   with old API and changeset API
 
 - Refactor changeset print functions to a common implementation
 
 - Move some platform_device specific functions into of_platform.c
 
 Bindings:
 - Treewide fixing of typos
 
 - Treewide clean-up of SPDX tags to use 'OR' consistently
 
 - Last chunk of dropping unnecessary quotes. With that, the check
   for unnecessary quotes is enabled in yamllint.
 
 - Convert ftgmac100, zynqmp-genpd, pps-gpio, syna,rmi4, and qcom,ssbi
   bindings to DT schema format
 
 - Add Allwinner V3s xHCI USB, Saef SF-TC154B display, QCom SM8450 Inline
   Crypto Engine, QCom SM6115 UFS, QCom SDM670 PDC interrupt controller,
   Arm 2022 Cortex cores, and QCom IPQ9574 Crypto bindings
 
 - Fixes for Rockchip DWC PCI binding
 
 - Ensure all properties are evaluated on USB connector schema
 
 - Fix dt-check-compatible script to find of_device_id instances with
   compiler annotations
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmTubyoACgkQ+vtdtY28
 YcPamA//feXFYNPiIbSa7XqfAu1PE5XSg3PqCe77QvLBGJU7saTwRJApc88iTjlA
 hc5EELnZKp3FE9N7DJdmvEjYxKDqtJOukO+txKy3mFBWo+gZQURthZVcbLxUZmpw
 XmYA4b/GrIv5h8YWG1wokyaGTtSfTcf0+RmAtVepiDk5kWQKaC04Let356fKn9xi
 ePgLTZV6BJvPoGpMWd08o+1szUAc6Vihs9qWu7g0+mtb5K5xi/l05YMz3REu7kpf
 iz06CE/uzYvHpFBJZ6izN+9Qqxh52DnWckXX68v8kStHUON2h1YmZYvjhGrfay4k
 rHeDnHoRBrepDDCytXQ/fxzGtURr3b8yBnlhzEQadMLXmf25mm+TRBDmf6GnX5ij
 QmHlj+eSARIafcbb4fqF1Hdyv8c7XM0AkEnj1XrIWLtXPuRNSHlS25dngCztbII/
 lqmtBaH1ifCKj2VQ8YL8sVX7k208YU9vDNKZHQyA8dPEYwhknrWmp1F0OAnBB+wz
 F11kDE7xkZ0/gE7mUHwe9mP94hC6Ceks4IuBvsTzBmSwqXxyCz8gM2KHK4U3gNUr
 Sk2hWgZn+k2HM9zLb38FE18C6hqws6RBUWnJwZ4V3qPo2eYJ8Jzkvm7oonxjHgCC
 4FmYYAoCQhBEkZPOJ4map0eO5VbShn9Hrgs46Jj4WoXmm7dFDLc=
 =kl+z
 -----END PGP SIGNATURE-----

Merge tag 'devicetree-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
 "DT core:

   - Add support for generating DT nodes for PCI devices. This is the
     groundwork for applying overlays to PCI devices containing
     non-discoverable downstream devices.

   - DT unittest additions to check reverted changesets, to test for
     refcount issues, and to test unresolved symbols. Also, various
     clean-ups of the unittest along the way.

   - Refactor node and property manipulation functions to better share
     code with old API and changeset API

   - Refactor changeset print functions to a common implementation

   - Move some platform_device specific functions into of_platform.c

  Bindings:

   - Treewide fixing of typos

   - Treewide clean-up of SPDX tags to use 'OR' consistently

   - Last chunk of dropping unnecessary quotes. With that, the check for
     unnecessary quotes is enabled in yamllint.

   - Convert ftgmac100, zynqmp-genpd, pps-gpio, syna,rmi4, and qcom,ssbi
     bindings to DT schema format

   - Add Allwinner V3s xHCI USB, Saef SF-TC154B display, QCom SM8450
     Inline Crypto Engine, QCom SM6115 UFS, QCom SDM670 PDC interrupt
     controller, Arm 2022 Cortex cores, and QCom IPQ9574 Crypto bindings

   - Fixes for Rockchip DWC PCI binding

   - Ensure all properties are evaluated on USB connector schema

   - Fix dt-check-compatible script to find of_device_id instances with
     compiler annotations"

* tag 'devicetree-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (64 commits)
  dt-bindings: usb: Add V3s compatible string for OHCI
  dt-bindings: usb: Add V3s compatible string for EHCI
  dt-bindings: display: panel: mipi-dbi-spi: add Saef SF-TC154B
  dt-bindings: vendor-prefixes: document Saef Technology
  dt-bindings: thermal: lmh: update maintainer address
  of: unittest: Fix of_unittest_pci_node() kconfig dependencies
  dt-bindings: crypto: ice: Document sm8450 inline crypto engine
  dt-bindings: ufs: qcom: Add ICE to sm8450 example
  dt-bindings: ufs: qcom: Add sm6115 binding
  dt-bindings: ufs: qcom: Add reg-names property for ICE
  dt-bindings: yamllint: Enable quoted string check
  dt-bindings: Drop remaining unneeded quotes
  of: unittest-data: Fix whitespace - angular brackets
  of: unittest-data: Fix whitespace - indentation
  of: unittest-data: Fix whitespace - blank lines
  of: unittest-data: Convert remaining overlay DTS files to sugar syntax
  of: overlay: unittest: Add test for unresolved symbol
  of: unittest: Add separators to of_unittest_overlay_high_level()
  of: unittest: Cleanup partially-applied overlays
  of: unittest: Merge of_unittest_apply{,_revert}_overlay_check()
  ...
 2023-08-30 16:59:03 -07:00
Linus Torvalds
0e72db7767 ARM: devicetree updates for 6.6 
These are the devicetree updates for Arm and RISC-V based SoCs,
 mainly from Qualcomm, NXP/Freescale, Aspeed, TI, Rockchips,
 Samsung, ST and Starfive.
 
 Only a few new SoC got added:
 
  - TI AM62P5, a variant of the existing Sitara AM62x family
 
  - Intel Agilex5, an FPGFA platform that includes an
    Cortex-A76/A55 SoC.
 
  - Qualcomm ipq5018 is used in wireless access points
 
  - Qualcomm SM4450 (Snapdragon 4 Gen 2) is a new low-end mobile
    phone platform.
 
 In total, 29 machines get added, which is low because of the summer
 break. These cover SoCs from Aspeed, Broadcom, NXP, Samsung, ST,
 Allwinner, Amlogic, Intel, Qualcomm, Rockchip, TI and T-Head.  Most of
 these are development and reference boards.
 
 Despite not adding a lot of new machines, there are over 700 patches in
 total, most of which are cleanups and minor fixes.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTuZOQACgkQYKtH/8kJ
 UieJGw/5AWNde1VYY/3uhdHSNeXtF+1LICZYoLQiSTWbpnlEoLhQseymRCybWRhd
 882TLCuEMrHV+ftP5z+kdYS+QJE3K8GNRxp4vAgLTRwnZItEE3qD8/jNeTtK5BqT
 7h9OYZJQhfczsIXISIljsvez2T3n5fA1glq2drc2fLl9AbEYvlByDCtCNmzqMYli
 II/S03vJqT3eFnOwut70EdFtnW3FIJ+HJLWu46zWLhrx2XJVS8hNaWqhQ3uKZ58p
 Q9cWAltu4biaILVpD/0vZST+m77HqcrPtVSwR9uHvzEzDEzYk/GYzn7DDlWgdVbt
 DJMkgK1pLJq67KpsefMqgTioCh2FBiWfNQ6FjsgJ06ykXgThLJfbzeeB4zU4fnDT
 YmcV/8gR6Np/wNeSBlPNLI6BZ1EF4h0Lkm6p//QgayYhdMVbE59K+SNwq4wps24l
 JU3dcxxblwpVmAaKSL5p0lbYTn8VKuz9rcXYIziQm1m8zaCwjq863bDFJKz8JsP8
 0tQ/azvS4Off9fKIMbUE4fiFmDGhgLTi0XL+GIlOFJF6JS6ToD2nL4FGRBJZPWNn
 iPNEV0F/dDnonB7Jfu92NodULY6B0mXs5/q+dPwde6oSpIDU2ORyNRb6Zk4fGC0l
 C+iPdb3BErf+GQYBLnRqQaMuV0sA6mN89lC6KlzWwwHK0UUoohg=
 =bO3j
 -----END PGP SIGNATURE-----

Merge tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
 "These are the devicetree updates for Arm and RISC-V based SoCs, mainly
  from Qualcomm, NXP/Freescale, Aspeed, TI, Rockchips, Samsung, ST and
  Starfive.

  Only a few new SoC got added:

   - TI AM62P5, a variant of the existing Sitara AM62x family

   - Intel Agilex5, an FPGFA platform that includes an Cortex-A76/A55
     SoC.

   - Qualcomm ipq5018 is used in wireless access points

   - Qualcomm SM4450 (Snapdragon 4 Gen 2) is a new low-end mobile phone
     platform.

  In total, 29 machines get added, which is low because of the summer
  break. These cover SoCs from Aspeed, Broadcom, NXP, Samsung, ST,
  Allwinner, Amlogic, Intel, Qualcomm, Rockchip, TI and T-Head. Most of
  these are development and reference boards.

  Despite not adding a lot of new machines, there are over 700 patches
  in total, most of which are cleanups and minor fixes"

* tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (735 commits)
  arm64: dts: use capital "OR" for multiple licenses in SPDX
  ARM: dts: use capital "OR" for multiple licenses in SPDX
  arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved
  ARM: dts: qcom: apq8064: add support to gsbi4 uart
  riscv: dts: change TH1520 files to dual license
  riscv: dts: thead: add BeagleV Ahead board device tree
  dt-bindings: riscv: Add BeagleV Ahead board compatibles
  ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board
  ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators
  dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs
  ARM: dts: stm32: support display on stm32f746-disco board
  ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco
  ARM: dts: stm32: add pin map for LTDC on stm32f7
  ARM: dts: stm32: add ltdc support on stm32f746 MCU
  arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sdm670: Add PDC
  riscv: dts: starfive: fix jh7110 qspi sort order
  ...
 2023-08-30 16:53:46 -07:00
Linus Torvalds
1544df9ab4 ARM: SoC drivers for 6.6 
The main change this time is the introduction of the drivers/genpd
 subsystem that gets split out from drivers/soc to keep common
 functionality together. Ulf Hansson is taking over maintainership for
 these and is sending a separate pull request with the same commits,
 but they are in the soc drivers tree to avoid conflicts against other
 soc driver patches.
 
 The SCMI driver subsystem gets an update to version 3.2 of the
 specification. There are also updates to memory, reset and other firmware
 drivers.
 
 On the soc driver side, the updates are mostly cleanups across a number
 of Arm platforms. On driver for loongarch adds power management for DT
 based systems, another driver is for HiSilicon's Arm server chips with
 their HCCS system health interface.
 
 The remaining updates for the most part add support for additional
 hardware in existing drivers or contain minor cleanups. Most of these
 are for the Qualcomm Snapdragon platform.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTuWdMACgkQYKtH/8kJ
 UicprBAAsvZ5h636MOwYasgK1bKnsWgj9yrBSzIf7VzKbBS5/QCrDSDek9oDvTBp
 p6Rr+WC1RQl9i2DiRVSbEqkUS6X4hQF0kJdLudBwYuxBDf8ayzFzKAKk/ecsyoaC
 0Rkeh4fCu1zVnQ2DZSPFJVRl01/oCr1ZtJ1W0UrXCslOSQy2987VqpJ/EQbaDLgb
 3imxpvJNBscaKwcYRgxhcIMBLdGi3qXRE/TmAf1WMe8w6dfk5KmFiPPD7zxPTnFb
 0fssdxgocjOkXEn6L1VdBMoTt4UQaU+xbnFsOsDA/F0EjR9ZLlhtwZxANv4GicP6
 52FMFaxeXSUnpBelzuyRQpgnt9WW3ZbBGb9iaisTl1pwjC3PcN2noo8uFZk+kO6b
 8q0fh4KVmD0QIupC4cfTsF4SGAQvnhko2ls9bt4FTF+z0COV3Ifs2cAggH+hn3yD
 IziBrUUZrR4G8XhisJRQNZcRh1H/vVchcumqsxzCMhpXLWwdZ5vW85GCR/fAtQQT
 woYgqFHXZjEko66bu2dtayr1dgmPvfbO6rXpUkIdeskY6XuKfZXuB93LkhsZ17LY
 dfAaBLUebjMcpLrltCqyP1tUoqGyVOTJKxtB2MolHo/V/2JbKYmYHAMy+qX5I0Qm
 UUbQDpHnkaQMTK2L/qvdfE4lgwWfFWX7lCK/AGa4ZBFl+Zl6DgE=
 =xmHW
 -----END PGP SIGNATURE-----

Merge tag 'soc-drivers-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "The main change this time was the introduction of the drivers/genpd
  subsystem that gets split out from drivers/soc to keep common
  functionality together.

  The SCMI driver subsystem gets an update to version 3.2 of the
  specification. There are also updates to memory, reset and other
  firmware drivers.

  On the soc driver side, the updates are mostly cleanups across a
  number of Arm platforms. On driver for loongarch adds power management
  for DT based systems, another driver is for HiSilicon's Arm server
  chips with their HCCS system health interface.

  The remaining updates for the most part add support for additional
  hardware in existing drivers or contain minor cleanups. Most of these
  are for the Qualcomm Snapdragon platform"

* tag 'soc-drivers-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (136 commits)
  bus: fsl-mc: Use common ranges functions
  soc: kunpeng_hccs: fix some sparse warnings about incorrect type
  soc: loongson2_pm: add power management support
  soc: dt-bindings: add loongson-2 pm
  soc: rockchip: grf: Fix SDMMC not working on RK3588 with bus-width > 1
  genpd: rockchip: Add PD_VO entry for rv1126
  bus: ti-sysc: Fix cast to enum warning
  soc: kunpeng_hccs: add MAILBOX dependency
  MAINTAINERS: remove OXNAS entry
  dt-bindings: interrupt-controller: arm,versatile-fpga-irq: mark oxnas compatible as deprecated
  irqchip: irq-versatile-fpga: remove obsolete oxnas compatible
  soc: qcom: aoss: Tidy up qmp_send() callers
  soc: qcom: aoss: Format string in qmp_send()
  soc: qcom: aoss: Move length requirements from caller
  soc: kunpeng_hccs: fix size_t format string
  soc: ti: k3-socinfo.c: Add JTAG ID for AM62PX
  dt-bindings: firmware: qcom: scm: Updating VMID list
  firmware: imx: scu-irq: support identifying SCU wakeup source from sysfs
  firmware: imx: scu-irq: enlarge the IMX_SC_IRQ_NUM_GROUP
  firmware: imx: scu-irq: add imx_scu_irq_get_status
  ...
 2023-08-30 16:42:21 -07:00
Stephen Boyd
41680df097 Merge branch 'clk-qcom' into clk-next 
* clk-qcom: (87 commits)
  clk: qcom: Fix SM_GPUCC_8450 dependencies
  clk: qcom: smd-rpm: Set XO rate and CLK_IS_CRITICAL on PCNoC
  clk: qcom: smd-rpm: Add a way to define bus clocks with rate and flags
  clk: qcom: gcc-ipq5018: change some variable static
  clk: qcom: gcc-ipq4019: add missing networking resets
  dt-bindings: clock: qcom: ipq4019: add missing networking resets
  clk: qcom: gcc-msm8917: Enable GPLL0_SLEEP_CLK_SRC
  dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC
  clk: qcom: gcc-qdu1000: Update the RCGs ops
  clk: qcom: gcc-qdu1000: Update the SDCC clock RCG ops
  clk: qcom: gcc-qdu1000: Add support for GDSCs
  clk: qcom: gcc-qdu1000: Add gcc_ddrss_ecpri_gsi_clk support
  clk: qcom: gcc-qdu1000: Register gcc_gpll1_out_even clock
  clk: qcom: gcc-qdu1000: Fix clkref clocks handling
  clk: qcom: gcc-qdu1000: Fix gcc_pcie_0_pipe_clk_src clock handling
  dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs
  clk: qcom: gcc-sm8450: Use floor ops for SDCC RCGs
  clk: qcom: ipq5332: drop the gcc_apss_axi_clk_src clock
  clk: qcom: ipq5332: drop the mem noc clocks
  clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks
  ...
 2023-08-30 14:39:58 -07:00
Stephen Boyd
3462100cf3 Merge branches 'clk-imx', 'clk-samsung', 'clk-annotate', 'clk-marvell' and 'clk-lmk' into clk-next 
- Add __counted_by to struct clk_hw_onecell_data and struct spmi_pmic_div_clk_cc
 - Remove non-OF mmp clk drivers
 - Move number of clks from DT headers to drivers

* clk-imx:
  clk: imx: pll14xx: dynamically configure PLL for 393216000/361267200Hz
  clk: imx: pll14xx: align pdiv with reference manual
  clk: imx: composite-8m: fix clock pauses when set_rate would be a no-op
  clk: imx25: make __mx25_clocks_init return void
  clk: imx25: print silicon revision during init
  dt-bindings: clocks: imx8mp: make sai4 a dummy clock
  clk: imx8mp: fix sai4 clock
  clk: imx: imx8ulp: update SPLL2 type
  clk: imx: pllv4: Fix SPLL2 MULT range
  clk: imx: imx8: add audio clock mux driver
  dt-bindings: clock: fsl,imx8-acm: Add audio clock mux support
  clk: imx: clk-imx8qxp-lpcg: Convert to devm_platform_ioremap_resource()
  clk: imx: clk-gpr-mux: Simplify .determine_rate()
  clk: imx: Add 519.75MHz frequency support for imx9 pll
  clk: imx93: Add PDM IPG clk
  dt-bindings: clock: imx93: Add PDM IPG clk

* clk-samsung:
  dt-bindings: clock: samsung: remove define with number of clocks
  clk: samsung: exynoautov9: do not define number of clocks in bindings
  clk: samsung: exynos850: do not define number of clocks in bindings
  clk: samsung: exynos7885: do not define number of clocks in bindings
  clk: samsung: exynos5433: do not define number of clocks in bindings
  clk: samsung: exynos5420: do not define number of clocks in bindings
  clk: samsung: exynos5410: do not define number of clocks in bindings
  clk: samsung: exynos5260: do not define number of clocks in bindings
  clk: samsung: exynos5250: do not define number of clocks in bindings
  clk: samsung: exynos4: do not define number of clocks in bindings
  clk: samsung: exynos3250: do not define number of clocks in bindings

* clk-annotate:
  clk: qcom: clk-spmi-pmic-div: Annotate struct spmi_pmic_div_clk_cc with __counted_by
  clk: Annotate struct clk_hw_onecell_data with __counted_by

* clk-marvell:
  clk: pxa910: Move number of clocks to driver source
  clk: pxa1928: Move number of clocks to driver source
  clk: pxa168: Move number of clocks to driver source
  clk: mmp2: Move number of clocks to driver source
  clk: mmp: Remove old non-OF clock drivers

* clk-lmk:
  clk: lmk04832: Support using PLL1_LD as SPI readback pin
  clk: lmk04832: Don't disable vco clock on probe fail
  clk: lmk04832: Set missing parent_names for output clocks
 2023-08-30 14:39:19 -07:00
Stephen Boyd
032bcf783e Merge branches 'clk-versa', 'clk-strdup', 'clk-amlogic', 'clk-allwinner' and 'clk-rockchip' into clk-next 
- Add Versa3 clk generator to support 48KHz playback/record with audio
   codec on RZ/G2L SMARC EVK
 - Introduce kstrdup_and_replace() and use it

* clk-versa:
  clk: vc7: Use i2c_get_match_data() instead of device_get_match_data()
  clk: vc5: Use i2c_get_match_data() instead of device_get_match_data()
  clk: versaclock3: Switch to use i2c_driver's probe callback
  clk: Add support for versa3 clock driver
  dt-bindings: clock: Add Renesas versa3 clock generator bindings

* clk-strdup:
  clk: ti: Replace kstrdup() + strreplace() with kstrdup_and_replace()
  clk: tegra: Replace kstrdup() + strreplace() with kstrdup_and_replace()
  driver core: Replace kstrdup() + strreplace() with kstrdup_and_replace()
  lib/string_helpers: Add kstrdup_and_replace() helper

* clk-amlogic: (22 commits)
  dt-bindings: soc: amlogic: document System Control registers
  dt-bindings: clock: amlogic: convert amlogic,gxbb-aoclkc.txt to dt-schema
  dt-bindings: clock: amlogic: convert amlogic,gxbb-clkc.txt to dt-schema
  clk: meson: axg-audio: move bindings include to main driver
  clk: meson: meson8b: move bindings include to main driver
  clk: meson: a1: move bindings include to main driver
  clk: meson: eeclk: move bindings include to main driver
  clk: meson: aoclk: move bindings include to main driver
  dt-bindings: clk: axg-audio-clkc: expose all clock ids
  dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock ids
  dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock ids
  dt-bindings: clk: meson8b-clkc: expose all clock ids
  dt-bindings: clk: g12a-aoclkc: expose all clock ids
  dt-bindings: clk: g12a-clks: expose all clock ids
  dt-bindings: clk: axg-clkc: expose all clock ids
  dt-bindings: clk: gxbb-clkc: expose all clock ids
  clk: meson: migrate axg-audio out of hw_onecell_data to drop NR_CLKS
  clk: meson: migrate meson8b out of hw_onecell_data to drop NR_CLKS
  clk: meson: migrate a1 clock drivers out of hw_onecell_data to drop NR_CLKS
  clk: meson: migrate meson-aoclk out of hw_onecell_data to drop NR_CLKS
  ...

* clk-allwinner:
  clk: sunxi-ng: nkm: Prefer current parent rate
  clk: sunxi-ng: a64: select closest rate for pll-video0
  clk: sunxi-ng: div: Support finding closest rate
  clk: sunxi-ng: mux: Support finding closest rate
  clk: sunxi-ng: nkm: Support finding closest rate
  clk: sunxi-ng: nm: Support finding closest rate
  clk: sunxi-ng: Add helper function to find closest rate
  clk: sunxi-ng: Add feature to find closest rate
  clk: sunxi-ng: a64: allow pll-mipi to set parent's rate
  clk: sunxi-ng: nkm: consider alternative parent rates when determining rate
  clk: sunxi-ng: nkm: Use correct parameter name for parent HW
  clk: sunxi-ng: Modify mismatched function name
  clk: sunxi: sun9i-mmc: Use devm_platform_get_and_ioremap_resource()

* clk-rockchip:
  clk: rockchip: rv1126: Add PD_VO clock tree
  clk: rockchip: rk3568: Fix PLL rate setting for 78.75MHz
  clk: rockchip: rk3568: Add PLL rate for 101MHz
 2023-08-30 14:38:19 -07:00
Stephen Boyd
d10ebc7c64 Merge branches 'clk-bindings', 'clk-starfive', 'clk-rm', 'clk-renesas' and 'clk-cleanup' into clk-next 
- Remove OXNAS clk driver

* clk-bindings:
  dt-bindings: clock: versal: Convert the xlnx,zynqmp-clk.txt to yaml
  dt-bindings: clock: xlnx,versal-clk: drop select:false
  dt-bindings: clock: versal: Add versal-net compatible string
  dt-bindings: clock: ast2600: Add I3C and MAC reset definitions
  dt-bindings: arm: hisilicon,cpuctrl: Merge "hisilicon,hix5hd2-clock" into parent binding

* clk-starfive:
  reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support
  clk: starfive: Simplify .determine_rate()
  clk: starfive: Add StarFive JH7110 Video-Output clock driver
  clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver
  clk: starfive: Add StarFive JH7110 System-Top-Group clock driver
  clk: starfive: jh7110-sys: Add PLL clocks source from DTS
  clk: starfive: Add StarFive JH7110 PLL clock driver
  dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator
  dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator
  dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator
  dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs
  dt-bindings: soc: starfive: Add StarFive syscon module
  dt-bindings: clock: Add StarFive JH7110 PLL clock generator

* clk-rm:
  dt-bindings: clk: oxnas: remove obsolete bindings
  clk: oxnas: remove obsolete clock driver

* clk-renesas:
  clk: renesas: rcar-gen3: Add ADG clocks
  clk: renesas: r8a77965: Add 3DGE and ZG support
  clk: renesas: r8a7796: Add 3DGE and ZG support
  clk: renesas: r8a7795: Add 3DGE and ZG support
  clk: renesas: emev2: Remove obsolete clkdev registration
  clk: renesas: r9a07g043: Add MTU3a clock and reset entry
  clk: renesas: rzg2l: Simplify .determine_rate()
  clk: renesas: r9a09g011: Add CSI related clocks
  clk: renesas: r8a774b1: Add 3DGE and ZG support
  clk: renesas: r8a774e1: Add 3DGE and ZG support
  clk: renesas: r8a774a1: Add 3DGE and ZG support
  clk: renesas: rcar-gen3: Add support for ZG clock

* clk-cleanup:
  clk: mvebu: Convert to devm_platform_ioremap_resource()
  clk: nuvoton: Convert to devm_platform_ioremap_resource()
  clk: socfpga: agilex: Convert to devm_platform_ioremap_resource()
  clk: ti: Use devm_platform_get_and_ioremap_resource()
  clk: mediatek: Convert to devm_platform_ioremap_resource()
  clk: hsdk-pll: Convert to devm_platform_ioremap_resource()
  clk: gemini: Convert to devm_platform_ioremap_resource()
  clk: fsl-sai: Convert to devm_platform_ioremap_resource()
  clk: bm1880: Convert to devm_platform_ioremap_resource()
  clk: axm5516: Convert to devm_platform_ioremap_resource()
  clk: actions: Convert to devm_platform_ioremap_resource()
  clk: cdce925: Remove redundant of_match_ptr()
  drivers: clk: keystone: Fix parameter judgment in _of_pll_clk_init()
  clk: Explicitly include correct DT includes
 2023-08-30 14:37:45 -07:00
Dave Airlie
38f88732b2 Merge tag 'drm-msm-next-2023-08-20' of https://gitlab.freedesktop.org/drm/msm into drm-next 
Updates for v6.6, which includes a backmerge of msm-fixes to avoid conficts.

Core:
- SM6125 MDSS support

DPU:
- SM6125 DPU support
- Added subblocks to display snapshot
- Use UBWC data from MDSS driver rather than duplicating it
- dpu_core_perf cleanup

DSI:
- Enabled burst mode to fix CMD mode panels
- Runtime PM support
- refgen regulator support

DSI PHY:
- SM6125 support in 14nm DSI PHY driver

GPU:
- Rework GPU identification to prepare for a7xx, and other a7xx prep
- Cleanups and fixes
- Disallow legacy relocs on a6xx and newer
- a690: switch to using a660_gmu.bin fw as this is what we have in
  linux-firmware and we see no evidence that it should be different
  from other a660 family (a6xx subgen 4) devices
- Submit overhead opts, 1.6x faster for NO_IMPLICIT_SYNC commits with
  100 BOs to 2.5x faster for 1000 BOs

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGv_01g-edjdfKLWWcb-rO5aSyLsv5FpbKrTkXVL9+ngTQ@mail.gmail.com
 2023-08-24 10:15:59 +10:00
Krzysztof Kozlowski
440b075bd2 dt-bindings: use capital "OR" for multiple licenses in SPDX 
Documentation/process/license-rules.rst and checkpatch expect the SPDX
identifier syntax for multiple licenses to use capital "OR".  Correct it
to keep consistent format and avoid copy-paste issues.

Correct also the format // -> .* in few Allwinner binding headers as
pointed out by checkpatch:

  WARNING: Improper SPDX comment style for 'include/dt-bindings/reset/sun50i-h6-ccu.h', please use '/*' instead

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20230823084540.112602-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
 2023-08-23 15:00:31 -05:00
Arnd Bergmann
c708140e96 SoCFPGA DTS updates for v6.6 
- Fix dtbs_check warnings for usbphy, sram, rstmgr, memory, partitions
 - Updated "stmmaceth-ocp" reset-names to "ahb" for stmmac ethernet
 - Add initial support for Agilex5
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAmTg5+8ACgkQGZQEC4Gj
 KPRA7Q/8C6ugL9LlR5JEUruaAugaRnYL2BgotdwhMuCbU7d3oj+pFBzHR8PR/MCI
 CZXnLehpmwOkGz0K0QLey6nQuGZS18DK19DxJkL46hr69Rqpu8XHb2yPjiBtbh/o
 0ZwpxuRTKz1QbP9hprw/RIHSbZ/AWaI2O/90xicC0p1qWXmxSz0Kv6YOoQ61o/yO
 On91yS3R+75o1NoHD+FoKiPuwwTfaHc7TrS/UIshPKAuk6yo/Cd3Is5EdYL+5xEz
 kXDRkt2X3g7il/Jm9AOFJvA4Q1VLD9Ke4C9o9ePvj167GklaLnJ9JT8Qw7PGXaoE
 wolse2+bJA4a9acPbkYmYSSyyKtZnIgV5oTXFgeWQ0eo0qmoTNqgx6eMIOyRltxs
 3OTTvNyw9+ZOhW4YRv/lJWwDL3uMlKsMV/2JOSPua5V4kXrPi/A+HhIZGDll1Naf
 y+HYNoJiSrDAiNYwWglz4f4LR+xU3wc3cS4uLrAU+aCE+NHYAj/Jqn8/EC26NDbQ
 wVsPfQMQN9j0wCrMzZZf4LUEYM6C90ZeqUFqwB6mqctfAbT/fQyLdyKL8Gu/QrG0
 lhp2J4vb2UJ9eQ1zBoBtb6flcQegHP/ybmRM4Q5ep3LvVOHhilZT5mO8mj36q84g
 3Co2RqQ8oknTgmxTF93jguAW+JPtmfvwA66x+CetC0fSmSWN2HI=
 =OfJk
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTkFA0ACgkQYKtH/8kJ
 UiejLBAAnafzyrMqZnO6nc6hvK/7ONSN2QZqaYoZ0Ho6fSvz5KxqVqPjUq4EshEZ
 HB9kZ42YvJQZYyi8Pvd/7BIQe3WvwLZ6tW4NALoiMsfpL127wzfwJlDj5yOiltLu
 aZtwhRvRV7jHKlh06wh8eax3vd4P3ozR5DUufcCJp59xI8MTS2UYI6enrIoA2h06
 uC0xWhuEvseHdzYQbC2hAZlZA1Z/7BBYCJO5iKq5cdW0zHpy0h7h2k3ba2M2BsZM
 JtaIIyrjjF70nmydNY9UfHt0iU3u5InbZ7GdJEc9kkGsbB4fLiSUdn8ScPXShXaY
 W4qhsLQ9DhyDlkb+xmzkt2FRH9gh98xe2Ej4CmZM/4X3Xc/g+kquGZ4kHllNHJK5
 AWodtDcrio3V7eCmiGerSBdvChr6pB31qVpuaCaiuCr+OpPZGdj/Z2c0qjCDo9h6
 Pn8sH8jVgye3AQ30NmSrpJz12tN/H86BeiW59eFeJ3jRXi8qx7oMyyuLVNDzo+sF
 6EkydHcSNrl0HF2gKQRSFMLvYfaYUZFBA/iSycrn24UjKc86DWd3aGbcofQSbJOV
 WeZAODlghXX9/R6yVKf4Vt/O6m3Lb2xreCilkIKJD5wpdQAu8hz7NXJAMtNJY1ed
 MKASPnHm1jP6Is/6acr5pDYFpbG3HOsyOxpzNQYRVHEFElMxQSk=
 =mFST
 -----END PGP SIGNATURE-----

Merge tag 'socfpga_dts_updates_for_v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt

SoCFPGA DTS updates for v6.6
- Fix dtbs_check warnings for usbphy, sram, rstmgr, memory, partitions
- Updated "stmmaceth-ocp" reset-names to "ahb" for stmmac ethernet
- Add initial support for Agilex5

* tag 'socfpga_dts_updates_for_v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: agilex5: add initial support for Intel Agilex5 SoCFPGA
  dt-bindings: clock: add Intel Agilex5 clock manager
  dt-bindings: reset: add reset IDs for Agilex5
  dt-bindings: intel: Add Intel Agilex5 compatible
  arm64: dts: socfpga: change the reset-name of "stmmaceth-ocp" to "ahb"
  arm64: dts: socfpga: n5x/stratix10: fix dtbs_check warning for partitions
  arm64: dts: agilex/stratix10: Updated QSPI Flash layout for UBIFS
  arm64: dts: agilex/stratix10/n5x: fix dtbs_check for rstmgr
  arm64: dts: stratix10/agilex/n5x: fix dtbs_check warning for memory node
  arm64: dts: socfpga: stratix10: fix dtbs_check warning for usbphy
  arm64: dts: socfpga: agilex/stratix10: fix dtbs_check warnings for sram

Link: https://lore.kernel.org/r/20230819161418.931258-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2023-08-21 21:49:00 -04:00
Arnd Bergmann
6522fbd48a Qualcomm ARM64 DeviceTree updates for v6.6 
Initial support for the SM4450 platform and the QRD device thereon is
 added.
 
 The IPQ5018 platform is introduced, and the RDP432-C2 board thereon.
 
 A shared definition of the IPQ5332 RDP is introduced, as is GPIO-based
 LEDs and buttons.
 
 On the IPQ9574 RDP433 USB, CPU cooling maps and regulators are added.
 
 On MSM8916, the D3 camera mezzanine is improved and refactored out to
 its own dts. The Samsung Galaxy S4 Mini gains support for its PMIC with
 charger, while Samsung Galaxy J5 and E5 gains touchscreen support.
 
 A few fixes for MSM8939 are introduced, and initial support for Samsung
 Galaxy A7 is add.
 
 Support for scaling the cache bus fabric is introduced on MSM8996. A
 missing interrupt for the USB2 controller is added. The touchscreen vio
 supply on Xiaomi Mi 5 is corrected, and a few other cleanups are
 introduces across other devices.
 
 The display controller is introduced for MSM8998, a few clock fixes are
 introduced and missing power domains are added for the multimedia
 subsystem iommu.
 
 Reserved memory-regions and reserved GPIO lists are updated for the
 QDU/QRU1000 IDPs.
 
 USB3 PHY is added to the QCM2290, the RB1 gains regulators and GPU is
 enabled for the RB2.
 
 PCIe and Ethernet support is introduced on SA8775P, and enabled for the
 Ride board.
 
 On SC7180 the PSCI integration is refactored, to allow supporting
 devices with the Qualcomm firmware. BWMON is introduced, alongside the
 CPUfreq-based bus voting.
 
 A number of fixes are added for SC8180X, on the Primus and Lenovo Flex
 5G devices pmic_glink is introduced and wired up, to provide support for
 external display.
 
 Missing SCM interconnect is added to SC8280XP, and the PDC is marked as
 wakeup-parent of TLMM. On the CRD the gpio for vreg_misc_3p3 is
 corrected and a few regulators are renamed to align with schematics. The
 Lenovo Thinkpad X13s gains camera activity LED and a set of previously
 reserved GPIOs are released. The SA8540P Ride platform gains RTC
 support.
 
 For SDM670 CPU and L3 frequency scaling is added, the PDC is introduced
 and wired up as wakeup-parent of the TLMM.
 
 On SDM845 the UFS controller gains interconnect path description,
 power-domain information is added to GCC and minimum frequency of the
 UFS ICE is corrected. On RB3 continuous splash memory region is
 described, and the camera subsystem is enabled. On the Lenovo Yoga C630
 a missing power supply for the display panel is added, and the debug
 UART is introduced.
 
 SDX75 RPMh power-domains and SPMI controller are introduces, the PMX75
 PMIC is described and added to the IDP.
 
 GPU description is added to SM6115, and together with display enabled on
 the Lenovo Tab P11.
 
 On SM635 BWMON is introduced for LLCC and DDR scaling. Display and GPU
 is added, and the PDC is registered as wakeup-parent of TLMM.
 
 L3 cache scaling is introduced on SM6375.
 
 The DSI PHY compatible and an interrupt for I2C7 are corrected for
 SM8150, on the Sony Xperia 1 and 5 the ramoops pmsg size is corrected.
 
 On SM8250 BWMONs are introduced for DDR and LLCC scaling, the UFS node
 gains interconnect paths, SMMU is marked as DMA coherent and dynamic
 power coefficients are updated. On Sony Xperia 1 II and 5 II GPIO line
 names are updated.
 
 On SM8350 missing cluster sleep states and LMH interrupts are added,
 the CPU compatibles are corrected and APR and LPASS pinctrl support is
 introduced. The HDK gains uSD card support and PMK8350 is added.
 
 For SM8450 support for RNG and RPMh stats are added, the ICE handling is
 extracted from the UFS node and the display subsystem gains a missing
 interconnect path. Thermal description is improved for the HDK.
 
 On SM8550 MTP and QRD the pmic_glink is introduced, to provide
 DisplayPort output. A missing regulator supply is also added.
 
 A few platforms that happens to share the RPMH power-domain resource
 identifier constants are migrated to new generic defines. ADC channel
 names are generalized on various PMICs.
 
 A variety of devices gain chassis-type, and the GIC_SPI constant is
 replacing the 0 across a few different platforms.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmTgOtYVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Fr20P/jDKWelSMYqeVFfa49XGXyvRwWmf
 TaSb8IlD9cqQ3ScFYwmJGf2gVqt7zBfGU2EoxkMbpFeGjyZZYpw86Y3fvU1A5oxy
 TQ++kBQAvuSGEUqdGE7Xv6lIUmKPyVmcayRpI6IgGI5iaU1y5bI6xmh3bjhL//NQ
 mcsH11SLPPvDyZ608Etvw1rNtPImSI8nOucaBSlmnkxT1NuzIjPhNG+rNwgBSBHU
 O8sKi80hYrVw78sR3sXH+cBCCMhkFg377maCo9ZE14TFdAT3Ggn2uXX01PXCvn1z
 cO/wFAZ5vOe4KU1+maWkvOsEOCqjghdFUoVK7e9xtMpeuhoXjAuFf1L26d02mOK3
 I48/apsj8ak/kmC89eo1RrOWniytI+YGPZwd5wYIOh0Q2oS8+IpC0nZhm9V86IIU
 DoWxbdf0TZ++e3D232AftFqKutbL9utJanq9l34zmI50F7QK4BSbBRKT81pRTrml
 y4tR7bukrGYKVRq3Kpf5vyWwPEpYIfZ7o9k6J56IcaLoaMvctW/vcnf8R0Qr5gJb
 3vHUEBsozERKd2NcFw9g1Ay86DbAxC+3wyfHHMWgolA7fYCNVSXN6R6hKXb6d503
 6ORnP4U6NjxpibIXC3jj+zmvbUM/GhSgrw3yErPb83n9P9pJ5Aw2+6J+Xmt75U5z
 9hyHUWkbhyNQqBVA
 =uK0C
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTkEYEACgkQYKtH/8kJ
 Uie31xAAvhedx3cixHT570K/qxw8tTM06btXNhEek+/oMiW5eCcGKCRW5ixcpPog
 9sLGI4xt5aMVdJshIYWovCDpCQWCoSYiqFx9N2/2zF+DrXYjeKNCpU6oVcPh1MG7
 Xm5Fy2s99BipT6z6ha5kqeirdgjH+po8Jtkw54AfROzJa2oTD6GBvsPtxxW3CYgJ
 lDoHTvU59gwl1Dk60FIkc2slyA57VqqRuVLAmurgO2nGOFU9FODb/lNuMIh8AeKt
 +scXrEVozQPDeefSCbKTqROBvIuYyMbXmFHLW+VmM9EgXnOcV2IEVOSZCiMYi9Ic
 RWpfOHVAn9xM/zFhHh23onJPUrISwcJv05A1PU92WFNWh7uoly67KD712gPStwmd
 /rKI25DPk3Z7nc7LwzO5VqovOpU9Q0t+/NDOLiRn1A8/hljqVMhq8eTo9AY9sBJN
 EW5AZw1KUzrXH+9RQsNKDAJckpfgDaI8sB+ueXOZMHHhhKaugMILp/PgpN6isQZu
 G7ZkJadpQBliJ3pvsHpK6JlXcJoB4TafIx7pJPDCHbAFOnMhCmEUPW7TX36n0uQ3
 4d/ghMENBmDWkmZGlFLtl7SfKNmuT/HQhcG75QZxqPiw/uhRGepNaswqtkpMMeFD
 Vl+spE5wosXSG8Ra2W/UJfNfEKYL1TKevPwJXZWmT9WUehMSG+U=
 =zUL1
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm ARM64 DeviceTree updates for v6.6

Initial support for the SM4450 platform and the QRD device thereon is
added.

The IPQ5018 platform is introduced, and the RDP432-C2 board thereon.

A shared definition of the IPQ5332 RDP is introduced, as is GPIO-based
LEDs and buttons.

On the IPQ9574 RDP433 USB, CPU cooling maps and regulators are added.

On MSM8916, the D3 camera mezzanine is improved and refactored out to
its own dts. The Samsung Galaxy S4 Mini gains support for its PMIC with
charger, while Samsung Galaxy J5 and E5 gains touchscreen support.

A few fixes for MSM8939 are introduced, and initial support for Samsung
Galaxy A7 is add.

Support for scaling the cache bus fabric is introduced on MSM8996. A
missing interrupt for the USB2 controller is added. The touchscreen vio
supply on Xiaomi Mi 5 is corrected, and a few other cleanups are
introduces across other devices.

The display controller is introduced for MSM8998, a few clock fixes are
introduced and missing power domains are added for the multimedia
subsystem iommu.

Reserved memory-regions and reserved GPIO lists are updated for the
QDU/QRU1000 IDPs.

USB3 PHY is added to the QCM2290, the RB1 gains regulators and GPU is
enabled for the RB2.

PCIe and Ethernet support is introduced on SA8775P, and enabled for the
Ride board.

On SC7180 the PSCI integration is refactored, to allow supporting
devices with the Qualcomm firmware. BWMON is introduced, alongside the
CPUfreq-based bus voting.

A number of fixes are added for SC8180X, on the Primus and Lenovo Flex
5G devices pmic_glink is introduced and wired up, to provide support for
external display.

Missing SCM interconnect is added to SC8280XP, and the PDC is marked as
wakeup-parent of TLMM. On the CRD the gpio for vreg_misc_3p3 is
corrected and a few regulators are renamed to align with schematics. The
Lenovo Thinkpad X13s gains camera activity LED and a set of previously
reserved GPIOs are released. The SA8540P Ride platform gains RTC
support.

For SDM670 CPU and L3 frequency scaling is added, the PDC is introduced
and wired up as wakeup-parent of the TLMM.

On SDM845 the UFS controller gains interconnect path description,
power-domain information is added to GCC and minimum frequency of the
UFS ICE is corrected. On RB3 continuous splash memory region is
described, and the camera subsystem is enabled. On the Lenovo Yoga C630
a missing power supply for the display panel is added, and the debug
UART is introduced.

SDX75 RPMh power-domains and SPMI controller are introduces, the PMX75
PMIC is described and added to the IDP.

GPU description is added to SM6115, and together with display enabled on
the Lenovo Tab P11.

On SM635 BWMON is introduced for LLCC and DDR scaling. Display and GPU
is added, and the PDC is registered as wakeup-parent of TLMM.

L3 cache scaling is introduced on SM6375.

The DSI PHY compatible and an interrupt for I2C7 are corrected for
SM8150, on the Sony Xperia 1 and 5 the ramoops pmsg size is corrected.

On SM8250 BWMONs are introduced for DDR and LLCC scaling, the UFS node
gains interconnect paths, SMMU is marked as DMA coherent and dynamic
power coefficients are updated. On Sony Xperia 1 II and 5 II GPIO line
names are updated.

On SM8350 missing cluster sleep states and LMH interrupts are added,
the CPU compatibles are corrected and APR and LPASS pinctrl support is
introduced. The HDK gains uSD card support and PMK8350 is added.

For SM8450 support for RNG and RPMh stats are added, the ICE handling is
extracted from the UFS node and the display subsystem gains a missing
interconnect path. Thermal description is improved for the HDK.

On SM8550 MTP and QRD the pmic_glink is introduced, to provide
DisplayPort output. A missing regulator supply is also added.

A few platforms that happens to share the RPMH power-domain resource
identifier constants are migrated to new generic defines. ADC channel
names are generalized on various PMICs.

A variety of devices gain chassis-type, and the GIC_SPI constant is
replacing the 0 across a few different platforms.

* tag 'qcom-arm64-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (215 commits)
  arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved
  arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sdm670: Add PDC
  arm64: dts: qcom: msm8916-samsung-e5: Add touchscreen
  arm64: dts: qcom: sc7180: Split up TF-A related PSCI configuration
  arm64: dts: qcom: sc8280xp-x13s: Add camera activity LED
  arm64: dts: qcom: sc8280xp-x13s: Unreserve NC pins
  arm64: dts: qcom: msm8998: Add DPU1 nodes
  arm64: dts: qcom: msm8996: Fix dsi1 interrupts
  arm64: dts: qcom: sdx75-idp: Add regulator nodes
  arm64: dts: qcom: sdx75: Add rpmhpd node
  arm64: dts: qcom: sdx75-idp: Add pmics supported in SDX75
  arm64: dts: qcom: Add pmx75 PMIC dtsi
  arm64: dts: qcom: Add pm7550ba PMIC dtsi
  arm64: dts: qcom: Add pinctrl gpio support for pm7250b
  arm64: dts: qcom: sdx75: Add spmi node
  arm64: dts: qcom: msm8998: Add missing power domain to MMSS SMMU
  ...

Link: https://lore.kernel.org/r/20230819034551.2537866-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2023-08-21 21:38:09 -04:00
Bjorn Helgaas
47aab53331 dt-bindings: Fix typos 
Fix typos in Documentation/devicetree/bindings.  The changes are in
descriptions or comments where they shouldn't affect functionality.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20230814212822.193684-3-helgaas@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
 2023-08-18 11:32:25 -05:00
Arnd Bergmann
ba81791185 RISC-V Devicetrees for v6.6 
StarFive:
 There's only StarFive stuff this time around, starting with some
 bindings to get clock ID defines out of the binding headers. Getting
 these (and the syscon bindings) in unblocked a swathe of stuff sitting
 on the list. Added are: new clock controllers and sycons, ethernet
 support, thermal sensors, USB and PCIe PHYs, hwrng, mmc and a few more
 besides for the VisionFive v2. The original VisionFive and BeagleV
 Starlight got some the thermal sensor support too, as that is supported
 by the same driver. These changes make the board actually usable with
 something other than an initramfs.
 Overlay support by way of the -@ flag set during dtb building, is added
 also.
 
 Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZNiusAAKCRB4tDGHoIJi
 0u5JAP90hKhmPTWqxdRpnFrWi83k9RX4J6k5LHrqyt3e0sZ0HAD+JNiv4i4j8fDv
 fm7usmraq8B2zLaV/AFmj9kiqdx0JgU=
 =AH1c
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTal/YACgkQYKtH/8kJ
 Uiet0g/9HNACOcnwZi0Py4CJupn+amV5FhsJcqu5ENls0dV73PPVa76+EvNiszsr
 FqxfAd/n8RMUCAsc6XOHXDUkvVsfWlZSGlslxSC+yPoCGV/4vr7pBbfmQZ42oNX1
 YC6Wg1kXhuaKZv68nYLGpFelPBSeKkYLAgcSD8HGx6Ac5tYgblHGDmHW+HZ5ITT3
 MA9Am6DaDTN3NpiTGBc/Py2KUGLewqJU6jJutENDDmtO2ocAUR+6OGgq4Kn1w6yQ
 5Py5QfJDzds2Eq/GmrL3gxL29OXZYjTqfig/dv9yACTjAPnI0P1JzwdSW++g36i/
 CXQ/YQDQ35HK7kUtF2FuQ3Fi5sSdiyoQLtiwfY2HSjI78g3XKJjx2BTo1sGSC8E8
 7GVSDxl5ugEo+KhDJnAavTEfJ9p1E6Ik49F4Nj4nnF9HererZwuwMOtxuzy306B1
 0iSmcCquUiPkTvQ8SBZW2IC7xpRn3zgjYO8zzLJkPQ+r018mxtpud1OO9bgwGyvf
 8GvLGVle4r8mdO74+a0x32sGcbkvSFsD0uf/XZ/nW1ixc/rWuK/WWh6CYnSyR6nI
 cByzkPWbex9Jx/kIOKKC7wmuMh7rGrp7gLoq/LVCxEQamKmGGjnlTNiiambF9Jfg
 ie7vLFuNGNDrT1Qh/EWbOtKnNs48WY3Okiid9o9IMdD1ukoA76o=
 =+tgF
 -----END PGP SIGNATURE-----

Merge tag 'riscv-dt-for-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt

RISC-V Devicetrees for v6.6

StarFive:
There's only StarFive stuff this time around, starting with some
bindings to get clock ID defines out of the binding headers. Getting
these (and the syscon bindings) in unblocked a swathe of stuff sitting
on the list. Added are: new clock controllers and sycons, ethernet
support, thermal sensors, USB and PCIe PHYs, hwrng, mmc and a few more
besides for the VisionFive v2. The original VisionFive and BeagleV
Starlight got some the thermal sensor support too, as that is supported
by the same driver. These changes make the board actually usable with
something other than an initramfs.
Overlay support by way of the -@ flag set during dtb building, is added
also.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: (26 commits)
  riscv: dts: starfive: jh7110: Fix GMAC configuration
  riscv: dts: starfive - Add hwrng node for JH7110 SoC
  riscv: dts: starfive - Add crypto and DMA node for JH7110
  riscv: dts: starfive: Add mmc nodes on VisionFive 2 board
  riscv: dts: starfive: enable DCDC1&ALDO4 node in axp15060
  riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC
  riscv: dts: starfive: jh7110: add the node and pins configuration for tdm
  riscv: dts: starfive: jh7110: add dma controller node
  riscv: dts: starfive: Add spi node and pins configuration
  riscv: dts: starfive: Add USB dts node for JH7110
  riscv: dts: starfive: Add USB and PCIe PHY nodes for JH7110
  riscv: dts: starfive: jh7110: Add temperature sensor node and thermal-zones
  riscv: dts: starfive: jh7100: Add temperature sensor node and thermal-zones
  riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy
  riscv: dts: starfive: jh7110: Add ethernet device nodes
  riscv: dts: starfive: jh7110: Add PLL clocks source in SYSCRG node
  riscv: dts: starfive: jh7110: Add syscon nodes
  riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes
  riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks
  dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator
  ...

Link: https://lore.kernel.org/r/20230813-naturist-fragment-ac7d10c453ba@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2023-08-14 23:09:10 +02:00
Shengjiu Wang
a70cd8cdf7 dt-bindings: clock: fsl,imx8-acm: Add audio clock mux support 
Add the clock dt-binding file for Audio Clock Mux. which
is the IP for i.MX8QM, i.MX8QXP, i.MX8DXL.

Add the clockid for clocks in header file.

The Audio Clock Mux is binded with all the audio IP and audio clocks
in the subsystem, so need to list the power domain of related clocks
and IPs. Each clock and IP has a power domain, so there are so many
power domains.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/1690260984-25744-2-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
 2023-08-14 12:27:52 +03:00
Imran Shaik
df873243b2 dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs 
Add support for GCC_GPLL1_OUT_EVEN and GCC_DDRSS_ECPRI_GSI_CLK clock
bindings for QDU1000 and QRU1000 SoCs. While at it, update the
maintainers list.

Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230803105741.2292309-2-quic_imrashai@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-08-13 20:13:17 -07:00
Konrad Dybcio
9127b3770e dt-bindings: clock: qcom,mmcc: Add GPLL0_DIV for MSM8998 
We've not been consuming that clock for no apparent reason. Describe it.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230622-topic-8998clk-v2-2-6222fbc2916b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-08-13 19:51:03 -07:00
Bjorn Andersson
2f6be35d7c Merge branch '1690533192-22220-2-git-send-email-quic_srichara@quicinc.com' into clk-for-6.6 
Merge the IPQ5018 GCC Devicetree binding through a topic branch, in
order to the the clock defines.
 2023-08-11 10:50:07 -07:00
Sricharan Ramabadhran
f62d184ef7 dt-bindings: clock: Add IPQ5018 clock and reset 
This patch adds support for the global clock controller found on
the IPQ5018 based devices.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Link: https://lore.kernel.org/r/1690533192-22220-2-git-send-email-quic_srichara@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-08-11 10:46:59 -07:00
Neil Armstrong
74f3d8673d dt-bindings: clock: amlogic: convert amlogic,gxbb-aoclkc.txt to dt-schema 
Convert the Amlogic Always-On Clock Controller bindings to dt-schema.

[jbrunet: Fixed whitespace checkpatch warning]
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230706-b4-amlogic-bindings-convert-take2-v3-2-f63de6f12dcc@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
 2023-08-08 16:09:29 +02:00
Neil Armstrong
2ad72b1e4a dt-bindings: clock: amlogic: convert amlogic,gxbb-clkc.txt to dt-schema 
Convert the Amlogic Clock Controller bindings to dt-schema.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230706-b4-amlogic-bindings-convert-take2-v3-1-f63de6f12dcc@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
 2023-08-08 16:06:46 +02:00
Niravkumar L Rabara
d5f0942b50 dt-bindings: clock: add Intel Agilex5 clock manager 
Add clock ID definitions for Intel Agilex5 SoCFPGA.
The registers in Agilex5 handling the clock is named as clock manager.

Signed-off-by: Teh Wen Ping <wen.ping.teh@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
 2023-08-08 06:32:34 -05:00
Rohit Agarwal
014f3272af dt-bindings: qcom: Update RPMHPD entries for some SoCs 
Update the RPMHPD references with new bindings defined in rpmhpd.h
for Qualcomm SoCs SM8[2345]50.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1690461813-22564-1-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-08-03 20:53:34 -07:00
Shubhrajyoti Datta
03d4a10040 dt-bindings: clock: versal: Convert the xlnx,zynqmp-clk.txt to yaml 
Convert the xlnx,zynqmp-clk.txt to yaml.
versal-clk.yaml already exists that's why ZynqMP is converted and
merged.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Link: https://lore.kernel.org/r/20230802043557.26478-1-shubhrajyoti.datta@amd.com
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2023-08-02 12:12:09 -07:00
Krzysztof Kozlowski
172044e30b dt-bindings: clock: xlnx,versal-clk: drop select:false 
select:false makes the schema basically ignored and not effective, which
is clearly not what we want for a device binding.

Fixes: 352546805a ("dt-bindings: clock: Add bindings for versal clock driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230728165923.108589-1-krzysztof.kozlowski@linaro.org
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2023-08-02 12:12:05 -07:00
Yassine Oudjana
434cb57732 dt-bindings: clock: qcom,msm8996-cbf: Add compatible for MSM8996 Pro 
The CBF clock on MSM8996 Pro has a different divisor compared to MSM8996
and is therefore not fully compatible with it. Add a new compatible string
to differentiate between them.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230527093934.101335-2-y.oudjana@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-07-31 14:29:05 -07:00
Dmitry Baryshkov
b7fd5d19e3 dt-bindings: clock: provide separate bindings for qcom,gcc-mdm9615 
The global clock controller on MDM9615 uses external CXO and PLL7
clocks. Split the qcom,gcc-mdm9615 to the separate schema file.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230512211727.3445575-4-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-07-31 14:24:04 -07:00
Dmitry Baryshkov
83490976a7 dt-bindings: clock: qcom,lcc.yaml: describe clocks for lcc,qcom-mdm9615 
Describe parent clocks used by the LCC on the MDM9615 platform. It is
the list as the one for msm8960/apq8064, with only difference being
pxo/cxo replacement.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230512211727.3445575-2-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-07-31 14:23:19 -07:00
Konrad Dybcio
dfe488d99d dt-bindings: clock: qcom,sm8350-videocc: Add SC8280XP 
SC8280XP reuses the SM8350 video clock controller block, changing just a
couple tunables. Docuemnt it.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230703-topic-8280_videocc-v2-1-c88269806269@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-07-31 14:15:44 -07:00
Marijn Suijten
3a06fa8e51 dt-bindings: clock: qcom, dispcc-sm6125: Allow power-domains property 
On SM6125 the dispcc block is gated behind VDDCX: allow this domain to
be configured.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Patchwork: https://patchwork.freedesktop.org/patch/548970/
Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-6-a3f287dd6c07@somainline.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2023-07-27 16:33:44 +03:00
Marijn Suijten
3b3e71f07d dt-bindings: clock: qcom, dispcc-sm6125: Require GCC PLL0 DIV clock 
The "gcc_disp_gpll0_div_clk_src" clock is consumed by the driver, will
be passed from DT, and should be required by the bindings.

Fixes: 8397c9c0c2 ("dt-bindings: clock: add QCOM SM6125 display clock bindings")
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Patchwork: https://patchwork.freedesktop.org/patch/548966/
Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-5-a3f287dd6c07@somainline.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2023-07-27 16:33:44 +03:00
Thierry Reding
a640358def dt-bindings: clock: tegra: Document Tegra132 compatible 
The Tegra132 clock and reset controller is largely compatible with the
version found on Tegra124 but it does have slight differences in what
clocks it exposes, so a separate compatible string is needed.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2023-07-25 18:29:04 +02:00
Biju Das
a03d23f860 dt-bindings: clock: Add Renesas versa3 clock generator bindings 
Document Renesas versa3 clock generator(5P35023) bindings.

The 5P35023 is a VersaClock programmable clock generator and
is designed for low-power, consumer, and high-performance PCI
Express applications. The 5P35023 device is a three PLL
architecture design, and each PLL is individually programmable
and allowing for up to 6 unique frequency outputs.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230705171000.85786-2-biju.das.jz@bp.renesas.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2023-07-19 16:35:50 -07:00
Neil Armstrong
096110aa23 dt-bindings: clk: oxnas: remove obsolete bindings 
Due to lack of maintenance and stall of development for a few years now,
and since no new features will ever be added upstream, remove the
OX810 and OX820 clock bindings.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230630-topic-oxnas-upstream-remove-v2-2-fb6ab3dea87c@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2023-07-19 14:53:42 -07:00
Shubhrajyoti Datta
64446fe08c dt-bindings: clock: versal: Add versal-net compatible string 
Add dt-binding documentation for Versal NET platforms.
Versal Net is a new AMD/Xilinx  SoC.

The SoC and its architecture is based on the Versal ACAP device.
The Versal Net  device includes more security features in the
platform management controller (PMC) and increases the number of
CPUs in the application processing unit (APU) and the real-time
processing unit (RPU).

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@xilinx.com>
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Link: https://lore.kernel.org/r/20230620110137.5701-1-shubhrajyoti.datta@amd.com
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2023-07-19 13:09:54 -07:00
Rob Herring
dac7d7a8cd dt-bindings: arm: hisilicon,cpuctrl: Merge "hisilicon,hix5hd2-clock" into parent binding 
The "hisilicon,hix5hd2-clock" is simple enough to just add it into its
parent node binding, "hisilicon,cpuctrl".

This fixes a warning that "hisilicon,hix5hd2-clock" is missing a schema.

Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230707210700.869060-1-robh@kernel.org
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2023-07-19 12:46:23 -07:00
Xingyu Wu
a097a5ec14 dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator 
Add bindings for the Video-Output clock and reset generator (VOUTCRG)
on the JH7110 RISC-V SoC by StarFive Ltd.

Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 2023-07-19 18:08:00 +01:00
Xingyu Wu
9b3938c0b8 dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator 
Add bindings for the Image-Signal-Process clock and reset
generator (ISPCRG) on the JH7110 RISC-V SoC by StarFive Ltd.

Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 2023-07-19 18:08:00 +01:00
Xingyu Wu
14b14a57e6 dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator 
Add bindings for the System-Top-Group clock and reset generator (STGCRG)
on the JH7110 RISC-V SoC by StarFive Ltd.

Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 2023-07-19 18:08:00 +01:00
Xingyu Wu
2110add84b dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs 
Add PLL clock inputs from PLL clock generator.

Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 2023-07-19 18:08:00 +01:00
Xingyu Wu
bd348ca24d dt-bindings: clock: Add StarFive JH7110 PLL clock generator 
Add bindings for the PLL clock generator on the JH7110 RISC-V SoC.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 2023-07-19 18:07:48 +01:00
Taniya Das
60838878e1 dt-bindings: clock: qcom: Update my email address 
Update my email address from the defunct codeaurora.org domain to the
current quicinc.com domain.

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Link: https://lore.kernel.org/r/20230627173123.9221-1-quic_tdas@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2023-07-09 21:36:08 -07:00
Linus Torvalds
b869e9f499 Another set of clk driver updates and fixes for the merge window. The 
driver updates needed more time to bake in linux-next.
 
 Updates:
  - Support for more clk controllers in Qualcomm SoCs such as SM8350,
    SM8450, SDX75, SC8280XP, and IPQ9574
  - Runtime PM enablement of some more Qualcomm clk controllers
  - Various fixes to Qualcomm clk driver data to use correct clk_ops
    and to check halt bits properly
  - AT91 updates to modernize with clk_parent_data structures
 
 Fixes:
  - Remove "syscon" from dt binding fix for ti,j721e-system-controller
  - Fix determine rate in the Tegra driver that got wrecked by the
    refactorting of muxes this merge window
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmSkRq8RHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSUgHBAAkXU0agruD22fecxI/RliNIwyRY4F8CNW
 aKuz5XSGLTZAgaBDjFHPb2VSph9NXbFsLxxmxdrf7bDCAw6ww90vK0G9+JS/b/9D
 fGhqvl+d8oFeFAislr7eSDhKCMlKd5I+v6mUUk0WrPqKddHtIvq2Wh8j7+j9OZmh
 2lov68N95xYTKQPs4+mb0geDktCnFKJsIt2z9DnyPi5ixS5d6qJARXmOruJt7mbq
 1bd9iJLmOZPWm703hJcreLgyo9zhTxLY+BUrHM4S8J72BTFHN/OyLyKai25mSXll
 Odw4/G42VuykV03kvyAZNS2ebhw1DJ+px9jrfU5FH6TqIgfZG2tBnP0RkPbamNcA
 Y9ZBNtaJMfIk/Nqg5q8cyO72y2sfc2QUNt2qn0i02BxOSfSLLxQDuKiWPbilC7ju
 9zYDGIZUhZWLpfK3a+QWAU0VNGak+sq/ZbAQijI8q8MriilwhonQsXQerQC0Jzcw
 zKdMoVPCedK411UZh9fMmIBwEsAFEtYo/qDynpv+w0zwkpDY2t5Sh7lGlQFOiynZ
 YVFbUD7EEf3GJmftdEWTHQpEd+GlkWRoGHO3L9hfyxxUANXQGXhpI4YvpfldntmK
 UlGguQwRqqDzdCm+tBiFlt+j4Vh5A8ywTSG8HLzxy7Gsu7BRkqcafRrlxNmMK8Wv
 aCixlFKAkdA=
 =cF5c
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull more clk updates from Stephen Boyd:
 "Another set of clk driver updates and fixes for the merge window. The
  driver updates needed more time to bake in linux-next.

  Updates:
   - Support for more clk controllers in Qualcomm SoCs such as SM8350,
     SM8450, SDX75, SC8280XP, and IPQ9574
   - Runtime PM enablement of some more Qualcomm clk controllers
   - Various fixes to Qualcomm clk driver data to use correct clk_ops
     and to check halt bits properly
   - AT91 updates to modernize with clk_parent_data structures

  Fixes:
   - Remove 'syscon' from dt binding fix for ti,j721e-system-controller
   - Fix determine rate in the Tegra driver that got wrecked by the
     refactorting of muxes this merge window"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (69 commits)
  clk: tegra: Avoid calling an uninitialized function
  dt-bindings: mfd: ti,j721e-system-controller: Remove syscon from example
  clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id
  clk: at91: sama7g5: switch to parent_hw and parent_data
  clk: at91: sckc: switch to parent_data/parent_hw
  clk: at91: clk-sam9x60-pll: add support for parent_hw
  clk: at91: clk-utmi: add support for parent_hw
  clk: at91: clk-system: add support for parent_hw
  clk: at91: clk-programmable: add support for parent_hw
  clk: at91: clk-peripheral: add support for parent_hw
  clk: at91: clk-master: add support for parent_hw
  clk: at91: clk-generated: add support for parent_hw
  clk: at91: clk-main: add support for parent_data/parent_hw
  clk: qcom: gcc-sc8280xp: Add runtime PM
  clk: qcom: gpucc-sc8280xp: Add runtime PM
  clk: qcom: mmcc-msm8974: fix MDSS_GDSC power flags
  clk: qcom: gpucc-sm6375: Enable runtime pm
  dt-bindings: clock: sm6375-gpucc: Add VDD_GX
  clk: qcom: gcc-sm6115: Add missing PLL config properties
  clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi)
  ...
 2023-07-04 11:07:45 -07:00
Linus Torvalds
a9025a5f16 ARM: New SoC support for 6.5 
There are two new SoC families this time, and both appear fairly similar:
 The Nuvoton MA35D1 and the STMicroelectronics STM32MP2 are both dual-core
 Cortex-A35 based chips for the low-power industrial embedded market,
 and they mark the first 64-bit product in a widely used family of 32-bit
 Arm MCUs and SoCs.
 
 The way into the kernel is completely different here: The team at ST has
 a long history of working upstream with their STM32MP1 and other SoCs,
 and they produced a complete port to arm64 together with the initial
 announcement. Nuvoton also has multiple SoC product lines with current
 or previous upstream support, but those are maintained by third parties
 and are unrelated. The patch series from Nuvoton's Jacky Huang had to
 go through many revisisions to get to this point and is still missing
 a few drivers including the serial port for the moment.
 
 The branch contains the devicetree files as well as all the code changes,
 in order to have something that can be tested standalone.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmScqtkACgkQYKtH/8kJ
 Uifqyg//XgvZBxb/2GILYcThVgLoo1fYA9tG5M0LERY/aPiUwrCwIl5swGQXK4vK
 E3UBLsQURer4yEBRq7iB6RGbwa4Opjdy3yTkj6WSgEMPh6e6jGvmm+dJ7HuWeviS
 8oeyo3Xar6tIF+A8xlBloHA4J6690FYB40McQzh8sWG5SE+id56S71NGnNW0kQTn
 wsul9BZcGVoyMYNBi/uXtOVUPy7jF3UBC3HJF9UOT7q77bCLjVc/aHmmnZ3zmbYA
 2oX3X5hVJakFba6vnz+rjNlzuAoGXJPDdsKFxBysdsksac/TxqRIQGNe75DZZVgz
 ESTpt1QqjmCFw32HEzi8Ne22FOpzlBqUxBMznHPenpz1/om2ezs3q7ffuPqKvMaq
 PANuK++JKJaBChVMzJbn84Sr1fvO4ecGJpKZTFC6t6SqHQNQFJT6rfMHx01Xw2wW
 LjKfEBCR6zEXN0+FaaujgJ4y/9pH1VHPynrZJG9WEwPUEZb2kJ/2RMXjNpzOWKiB
 pWYV1oW2TqFKYKhFm/pjkbi6Rq76UwEi8fWWoGMkmeV3KZ/0GFauQhItu6mX3s7W
 uGnUQyrBzWzUoashYFuNtXKHYdwuWgOmG660BXHkyxwvqV96ICGEJ+97zGIBDj81
 F8zLxEjPbsEZqGGSosAyk9oYC6eh7eK2V7xx+CUYLTuKZw13zNo=
 =zaVi
 -----END PGP SIGNATURE-----

Merge tag 'soc-newsoc-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull new ARM SoC support from Arnd Bergmann:
 "There are two new SoC families this time, and both appear fairly
  similar: The Nuvoton MA35D1 and the STMicroelectronics STM32MP2 are
  both dual-core Cortex-A35 based chips for the low-power industrial
  embedded market, and they mark the first 64-bit product in a widely
  used family of 32-bit Arm MCUs and SoCs.

  The way into the kernel is completely different here: The team at ST
  has a long history of working upstream with their STM32MP1 and other
  SoCs, and they produced a complete port to arm64 together with the
  initial announcement. Nuvoton also has multiple SoC product lines with
  current or previous upstream support, but those are maintained by
  third parties and are unrelated. The patch series from Nuvoton's Jacky
  Huang had to go through many revisisions to get to this point and is
  still missing a few drivers including the serial port for the moment.

  The branch contains the devicetree files as well as all the code
  changes, in order to have something that can be tested standalone"

* tag 'soc-newsoc-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits)
  clk: nuvoton: Use clk_parent_data instead of string for parent clock
  clk: nuvoton: Update all constant hex values to lowercase
  clk: nuvoton: Add clk-ma35d1.h for driver extern functions
  remoteproc: stm32: use correct format strings on 64-bit
  MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE
  arm64: defconfig: enable ARCH_STM32 and STM32 serial driver
  arm64: dts: st: add stm32mp257f-ev1 board support
  dt-bindings: stm32: document stm32mp257f-ev1 board
  arm64: dts: st: introduce stm32mp25 pinctrl files
  arm64: dts: st: introduce stm32mp25 SoCs family
  arm64: introduce STM32 family on Armv8 architecture
  dt-bindings: stm32: add st,stm32mp25-syscfg compatible for syscon
  pinctrl: stm32: add stm32mp257 pinctrl support
  dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages
  Documentation/process: add soc maintainer handbook
  reset: RESET_NUVOTON_MA35D1 should depend on ARCH_MA35
  reset: Add Nuvoton ma35d1 reset driver support
  clk: nuvoton: Add clock driver for ma35d1 clock controller
  arm64: dts: nuvoton: Add initial ma35d1 device tree
  dt-bindings: serial: Document ma35d1 uart controller
  ...
 2023-06-29 15:11:17 -07:00
Linus Torvalds
6c1561fb90 ARM: SoC devicetree updates for 6.5 
The biggest change this time is for the 32-bit devicetree files, which
 are all moved to a new location, using separate subdirectories for each
 SoC vendor, following the same scheme that is used on arm64, mips and
 riscv. This has been discussed for many years, but so far we never did
 this as there was a plan to move the files out of the kernel entirely,
 which has never happened.
 
 The impact of this will be that all external patches no longer apply,
 and anything depending on the location of the dtb files in the build
 directory will have to change. The installed files after 'make
 dtbs_install' keep the current location.
 
 There are six added SoCs here that are largely variants of previously
 added chips. Two other chips are added in a separate branch along
 with their device drivers.
 
 * The Samsung Exynos 4212 makes its return after the Samsung Galaxy
   Express phone is addded at last. The SoC support was originally
   added in 2012 but removed again in 2017 as it was unused at the time.
 
 * Amlogic C3 is a Cortex-A35 based smart IP camera chip
 
 * Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of
   the still common MSM8916 (Snapdragon 410) phone chip that has been
   supported for a long time.
 
 * Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end
   laptop chips, used in the Lenovo Flex 5G, which is added along with
   the reference board.
 
 * Qualcomm SDX75 is the latest generation modem chip that is used
   as a peripherial in phones but can also run a standalone Linux.  Unlike
   the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55.
 
 * Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the Xuantie
   C910 core, a step up from all previously added rv64 chips.
 
 All of the above come with reference board implementations, those included
 there are 39 new board files, but only five more 32-bit this time, probably
 a new low:
 
 * Marantec Maveo board based on dhcor imx6ull module
 
 * Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip
 
 * Epson Moverio BT-200 AR glasses based on TI OMAP4
 
 * PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM
 
 * ICnova ADB4006 board based on Allwinner A20
 
 On the 64-bit side, there are also fewer addded machines than
 we had in the recent releases:
 
 * Three boards based on NXP i.MX8: Emtop SoM & Baseboard,
   NXP i.MX8MM EVKB board and i.MX8MP based Gateworks Venice
   gw7905-2x device.
 
 * NVIDIA IGX Orin and Jetson Orin Nano boards, both based on
   tegra234
 
 * Qualcomm gains support for 6 reference boards on various members
   of their IPQ networking SoC series, as well as the Sony Xperia M4
   Aqua phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board
   on top of the various reference platforms for their new chips.
 
 * Rockchips support for several newer boards: Indiedroid Nova (rk3588),
   Edgeble Neural Compute Module 6B (rk3588), FriendlyARM NanoPi R2C
   Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn Fastrhino R66S/R68S
   (rk3568)
 
 * TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex Verdin
   family with AM62 COM, carrier and dev boards
 
 Other changes to existing boards contain the usual minor improvements
 along with
 
 * continued updates to clean up dts files based on dtc warnings and
   binding checks, in particular cache properties and node names
 
 * support for devicetree overlays on at91, bcm283x
 
 * significant additions to existing SoC support on mediatek, qualcomm,
   ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST STM32MP1
 
 As usual, a lot more detail is available in the individual merge
 commits.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSdmeUACgkQYKtH/8kJ
 UieI5A//bxZXA54htEPXN5V1oIgC4JB4UYkf8fAvtyK4tdaImMn4OTwLD8/sw18X
 LQHf1VOLGsGJyNCQ+cUoaBnysr2CXqL/9dA/ARTalqnrKMN/OQjt2wg62n1Ss9Pv
 XRlxJABGxAokTO/SuPtOIakSkzwDkuAkIFKfmrNQGcT95XkJXJk3FlMRr84310UG
 sl6jP2XFSiLSYm958MMNt+DMhxRmKuyT9gos24KGsb83lZSm9DC2hYimkjd1KF5P
 CKeShWeoGoJe+YhnJx6dsDSqVgp1DFLZF1G0auSwjs9rCAKnCDMlz+T2bEzviVDh
 XONBNmnOGwPRiBI+1WdzX+pZqMMWINmhIObuODV4ANCSlX3KlSaC2rropEimlW9S
 CefvYJ+i7v/BQgMLhKlft0RHhsPU7Pfhfq4PWxaIMAOWA6ZaVczMCpgeUupHIwIQ
 lWXZZDlqmTL6SCgkOhEtdP2GGec7YSroq7sscinBaQs1f5pfoW83CNn46gZ9Jh8S
 RnXp/+vZ7+RFc15Y0VM82F6a7WN/n0BAqKmqwceDrCpf6ILrBc1lA7NhEvd80wbB
 IMg8QNqIzZ9aTOoZmB/1wAXaLClKCE3poTF+Wkd5szN7qe+hKAe1M4w5XvNUO/i/
 d0/X5KNA2ykuUxRMdd4lG54VsTJdDCVNaNeaEqasv9JCBBfvuwI=
 =X/KE
 -----END PGP SIGNATURE-----

Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC devicetree updates from Arnd Bergmann:
 "The biggest change this time is for the 32-bit devicetree files, which
  are all moved to a new location, using separate subdirectories for
  each SoC vendor, following the same scheme that is used on arm64, mips
  and riscv. This has been discussed for many years, but so far we never
  did this as there was a plan to move the files out of the kernel
  entirely, which has never happened.

  The impact of this will be that all external patches no longer apply,
  and anything depending on the location of the dtb files in the build
  directory will have to change. The installed files after 'make
  dtbs_install' keep the current location.

  There are six added SoCs here that are largely variants of previously
  added chips. Two other chips are added in a separate branch along with
  their device drivers.

   - The Samsung Exynos 4212 makes its return after the Samsung Galaxy
     Express phone is addded at last. The SoC support was originally
     added in 2012 but removed again in 2017 as it was unused at the
     time.

   - Amlogic C3 is a Cortex-A35 based smart IP camera chip

   - Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of
     the still common MSM8916 (Snapdragon 410) phone chip that has been
     supported for a long time.

   - Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end
     laptop chips, used in the Lenovo Flex 5G, which is added along with
     the reference board.

   - Qualcomm SDX75 is the latest generation modem chip that is used as
     a peripherial in phones but can also run a standalone Linux. Unlike
     the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55.

   - Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the
     Xuantie C910 core, a step up from all previously added rv64 chips.

  All of the above come with reference board implementations, those
  included there are 39 new board files, but only five more 32-bit this
  time, probably a new low:

   - Marantec Maveo board based on dhcor imx6ull module

   - Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip

   - Epson Moverio BT-200 AR glasses based on TI OMAP4

   - PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM

   - ICnova ADB4006 board based on Allwinner A20

  On the 64-bit side, there are also fewer addded machines than we had
  in the recent releases:

   - Three boards based on NXP i.MX8: Emtop SoM & Baseboard, NXP i.MX8MM
     EVKB board and i.MX8MP based Gateworks Venice gw7905-2x device.

   - NVIDIA IGX Orin and Jetson Orin Nano boards, both based on tegra234

   - Qualcomm gains support for 6 reference boards on various members of
     their IPQ networking SoC series, as well as the Sony Xperia M4 Aqua
     phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board on top
     of the various reference platforms for their new chips.

   - Rockchips support for several newer boards: Indiedroid Nova
     (rk3588), Edgeble Neural Compute Module 6B (rk3588), FriendlyARM
     NanoPi R2C Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn
     Fastrhino R66S/R68S (rk3568)

   - TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex
     Verdin family with AM62 COM, carrier and dev boards

  Other changes to existing boards contain the usual minor improvements
  along with

   - continued updates to clean up dts files based on dtc warnings and
     binding checks, in particular cache properties and node names

   - support for devicetree overlays on at91, bcm283x

   - significant additions to existing SoC support on mediatek,
     qualcomm, ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST
     STM32MP1

  As usual, a lot more detail is available in the individual merge
  commits"

* tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (926 commits)
  ARM: mvebu: fix unit address on armada-390-db flash
  ARM: dts: Move .dts files to vendor sub-directories
  kbuild: Support flat DTBs install
  ARM: dts: Add .dts files missing from the build
  ARM: dts: allwinner: Use quoted #include
  ARM: dts: lan966x: kontron-d10: add PHY interrupts
  ARM: dts: lan966x: kontron-d10: fix SPI CS
  ARM: dts: lan966x: kontron-d10: fix board reset
  ARM: dts: at91: Enable device-tree overlay support for AT91 boards
  arm: dts: Enable device-tree overlay support for AT91 boards
  arm64: dts: exynos: Remove clock from Exynos850 pmu_system_controller
  ARM: dts: at91: use generic name for shutdown controller
  ARM: dts: BCM5301X: Add cells sizes to PCIe nodes
  dt-bindings: firmware: brcm,kona-smc: convert to YAML
  riscv: dts: sort makefile entries by directory
  riscv: defconfig: enable T-HEAD SoC
  MAINTAINERS: add entry for T-HEAD RISC-V SoC
  riscv: dts: thead: add sipeed Lichee Pi 4A board device tree
  riscv: dts: add initial T-HEAD TH1520 SoC device tree
  riscv: Add the T-HEAD SoC family Kconfig option
  ...
 2023-06-29 15:07:06 -07:00
Linus Torvalds
b775d6c585 - added support for TP-Link HC220 G5 v1 
- added support for Wifi/Bluetooth on CI20
 - reworked Ralink clock and reset handling
 - cleanups and fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQJOBAABCAA4FiEEbt46xwy6kEcDOXoUeZbBVTGwZHAFAmScGhgaHHRzYm9nZW5k
 QGFscGhhLmZyYW5rZW4uZGUACgkQeZbBVTGwZHBN2g//blIjO67H6Clq8jRxHP10
 PItZQelzl9PRZq1kTQFiYyG9OxeVwze/lnrHr40MGmW++dmKRBBsBgC064JyQfWq
 vYzZ/Ea3olCajSROPsAF7bVqz8OFMtI59PzJL+HYnGq1R4+YhMSjjPCz2vEbox2p
 +Ap/s/TsGX5kVLhVWi8NgCpXXyo2Ko5Kwfp/Qlv8LzcldABTIoz7kZS3/03qvWcu
 wX6uy/zQ+F4YgHkIPzoMXr1ybh3jq1mlzmeCayomT1iW6gG64upEsQyBY0lcjPeV
 hpwtORH5A+CRJAw0cfpX4Nb5plCktiwyTUav0YSFDF3i0TLWz68I0QoJO4foJwYT
 UahnOVLzZE73ztVr1LY4Kn9wu8lPtqN1MXSwwddzmy63RBJZ5o/ELHUr8qT+CeIn
 sA3Z7E8ieFcOGtC2KEwmxMnrwvMIVoTw2gHCs0GunnflFZ2TuPXLRdqmx1fXFBt4
 aRSAM6XCtLKDHAIuQBbPB722qjR9hgDQJw899dK4btcDMnQraL+8efKJrBeP6g6k
 nMhOxhlt7KDMXMX1riR17+c/DfqSbs31JqaHnKHP+zWe740PftSlKK4LjaXgl47z
 yN/QvTONEfbqnlKr2m4UcjXr6pdbULBpMSJNFOKsTdvZmomWVVDtXFnCC1UZx4Dc
 G94F7A9rbsrFqIhQ0i1OB8g=
 =z9/q
 -----END PGP SIGNATURE-----

Merge tag 'mips_6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS updates from Thomas Bogendoerfer:

 - add support for TP-Link HC220 G5 v1

 - add support for Wifi/Bluetooth on CI20

 - rework Ralink clock and reset handling

 - cleanups and fixes

* tag 'mips_6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (58 commits)
  MIPS: Loongson64: DTS: Add RTC support to Loongson-2K1000
  MIPS: Loongson64: DTS: Add RTC support to LS7A PCH
  MIPS: OCTEON: octeon-usb: cleanup divider calculation
  MIPS: OCTEON: octeon-usb: introduce dwc3_octeon_{read,write}q
  MIPS: OCTEON: octeon-usb: move gpio config to separate function
  MIPS: OCTEON: octeon-usb: use bitfields for shim register
  MIPS: OCTEON: octeon-usb: use bitfields for host config register
  MIPS: OCTEON: octeon-usb: use bitfields for control register
  MIPS: OCTEON: octeon-usb: add all register offsets
  mips: ralink: match all supported system controller compatible strings
  MIPS: dec: prom: Address -Warray-bounds warning
  MIPS: DTS: CI20: Raise VDDCORE voltage to 1.125 volts
  clk: ralink: mtmips: Fix uninitialized use of ret in mtmips_register_{fixed,factor}_clocks()
  mips: ralink: introduce commonly used remap node function
  mips: pci-mt7620: use dev_info() to log PCIe device detection result
  mips: pci-mt7620: do not print NFTS register value as error log
  MAINTAINERS: add Mediatek MTMIPS Clock maintainer
  mips: ralink: get cpu rate from new driver code
  mips: ralink: remove reset related code
  mips: ralink: mt7620: remove clock related code
  ...
 2023-06-29 15:01:51 -07:00
Linus Torvalds
18f38fedfa Devicetree updates for v6.5: 
Bindings:
 - Add some missing type definitions to properties
 
 - Drop unneeded quotes and use absolute paths in bindings
 
 - Remove redundant "binding" or "schema" in binding titles
 
 - Add bindings for Ralink SoCs interrupt controller, QCA2066 Bluetooth,
   infineon,irps5401, new NXP i.MX GPT variants, shineworld lh133k MIPI
   SPI panel, Socionext Synquacer platforms, RK3588 PCIe, ST M95640
   EEPROM, and FSL DCP crypto variants, and Arm Cortex-R52
 
 DT core:
 - Improve the reserved-memory range allocation to maximize contiguous
   space
 
 - Use device_set_node() helper in place of open coding
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmSbNDIACgkQ+vtdtY28
 YcOz+BAAk7LBR6soTLPZKturcg26Y+//sdLquVig6DOqU19m8e12bp82VzM35qrX
 94Hl9o3a/j3SX3hh2lVyjJ6k5VP8OFj8zg9yvFF+chzWfxaxTlpARFvUyPOL6rb7
 5ejwJVug412lXW7qF5V5SDoko1cMvy9WUOAOVfGCLgIGcCXKzAdbsTOU+WXMKBuc
 xr4/d1nBeZu7DCJP1VUUhygosX2db5IOTbaDBsI+IRPbzKsZK3cNemui5eQea2Wr
 eTZiUJO0tX2snH0eTWUL3yn5TTlY911hWtLnYCjns+fpJkc3MzUOlb5FiqICF8HB
 f8XOaBZ9GtED/PM8wgb7fdLAsJG/+0OC6aurpro7dJ7wJFzx2Z3VsGoRGBTRHX1j
 r+WuCxqrPkFICL0Vt0fkMDPMBqoor1zp+lrLmcCzZ2AiSxKBRuITMiENYnOEgsLB
 M8X2p3eq3glT8pBrYWwBpWTBhTQL1xnQOTtiIn5oshdhUWj3Q9aiY85Qcl8HXOi0
 mVpR7uNlM+eTYHxi1iqcvX6+DZFxVlrRpabGApqpYlSDum3zAB2+gFlex1qvIfds
 pGZKYxpDcwONcwqKlDNLGNkGFNqAWXSnqwGgNTMQbMvzYp/8jjAX9foifdje1HFw
 LUgxykbQqP19JzUn8BKUAGwTLCY3p3mo8I06eHIv9e2jt21lQEE=
 =onek
 -----END PGP SIGNATURE-----

Merge tag 'devicetree-for-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
 "Bindings:

   - Add some missing type definitions to properties

   - Drop unneeded quotes and use absolute paths in bindings

   - Remove redundant "binding" or "schema" in binding titles

   - Add bindings for Ralink SoCs interrupt controller, QCA2066
     Bluetooth, infineon,irps5401, new NXP i.MX GPT variants, shineworld
     lh133k MIPI SPI panel, Socionext Synquacer platforms, RK3588 PCIe,
     ST M95640 EEPROM, and FSL DCP crypto variants, and Arm Cortex-R52

  DT core:

   - Improve the reserved-memory range allocation to maximize contiguous
     space

   - Use device_set_node() helper in place of open coding"

* tag 'devicetree-for-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (40 commits)
  dt-bindings: interrupt-controller: add Ralink SoCs interrupt controller
  dt-bindings: PCI: dwc: rockchip: Update for RK3588
  dt-bindings: auxdisplay: holtek: Add missing type for "linux,no-autorepeat"
  dt-bindings: input: mediatek,pmic-keys: Fix typo in "linux,keycodes" property name
  dt-bindings: pwm: drop unneeded quotes
  dt-bindings: crypto: drop unneeded quotes
  dt-bindings: arm: socionext: add Synquacer platforms
  dt-bindings: connector: usb: allow a single HS port
  dt-bindings: bus: ti-sysc: fix typo
  of: reserved_mem: Use stable allocation order
  of: reserved_mem: Try to keep range allocations contiguous
  dt-bindings: arm: drop unneeded quotes and use absolute /schemas path
  dt-bindings: firmware: arm,scmi: drop unneeded quotes and use absolute /schemas path
  dt-bindings: dvfs: drop unneeded quotes
  dt-bindings: gpu: drop unneeded quotes
  dt-bindings: i3c: silvaco,i3c-master: drop unneeded quotes
  dt-bindings: rockchip: grf: drop unneeded quotes
  dt-bindings: spmi: mtk,spmi-mtk-pmif: drop unneeded quotes
  dt-bindings: Remove last usage of "binding" or "schema" in titles
  dt-bindings: display: panel: mipi-dbi-spi: add spi-3wire property
  ...
 2023-06-29 14:58:26 -07:00
Linus Torvalds
ff7ddcf0db This batch of clk driver updates for the merge window contains almost no new 
SoC support. Instead there's a treewide patch series from Maxime that makes
 clk_ops::determine_rate mandatory for muxes. Beyond that core framework change
 we have the usual pile of clk driver updates such as migrating i2c drivers to
 use .probe() again or YAMLfication of clk DT bindings so we can validate DTBs.
 Overall the SoCs that got the most updates this time around in terms of
 diffstat are the Amlogic and Mediatek drivers because they added new SoC
 support or fixed up various drivers to have proper data.
 
 In general things look kinda quiet. I suspect the core framework change may
 still shake out some problems after the merge window, mostly because not
 everyone tests linux-next where that series has been for some number of weeks.
 I saw that there's at least one pending fix for Tegra that needs to be wrapped
 up into a proper patch. I'll try to catch those bits before the window closes
 so that -rc1 is bootable. More details below.
 
 Core:
  - Make clk_ops::determine_rate mandatory for muxes
 
 New Drivers:
  - Add amlogic a1 SoC family PLL and peripheral clock controller support
 
 Updates:
  - Handle allocation failures from kasprintf() and friends
  - Migrate platform clk drivers to .remove_new()
  - Migrate i2c clk drivers to .probe() instead of .probe_new()
  - Remove CLK_SET_PARENT from all Mediatek MSDC core clocks
  - Add infra_ao reset support for Mediatek MT8188 SoCs
  - Align driver_data to i2c_device_id tables in some i2c clk drivers
  - Use device_get_match_data() in vc5 clk driver
  - New Kconfig symbol name (SOC_MICROCHIP_POLARFIRE) for Microchip FPGA clock
    drivers
  - Use of_property_read_bool() to read "microchip,pic32mzda-sosc" boolean DT
    property in clk-pic32mzda
  - Convert AT91 clock dt-bindings to YAML
  - Remove CLK_SET_RATE_PARENT flag from LDB clocks on i.MX6SX
  - Keep i.MX UART clocks enabled during kernel boot if earlycon is set
  - Drop imx_unregister_clocks() as there are no users anymore
  - Switch to _safe iterator on imx_clk_scu_unregister() to avoid use after free
  - Add determine_rate op to the imx8m composite clock
  - Use device managed API for iomap and kzalloc for i.MXRT1050, i.MX8MN,
    i.MX8MP and i.MX93 clock controller drivers
  - Add missing interrupt DT property for the i.MX8M clock controller
  - Re-add support for Exynos4212 clock controller because we are
    re-introducing the SoC in the mainline
  - Add CONFIG_OF dependency to Samsung clk Kconfig symbols to solve some
    objtool warnings
  - Preselect PLL MIPI as TCON0 parent for Allwinner A64 SoC
  - Convert the Renesas clock drivers to readl_poll_timeout_atomic()
  - Add PWM clock on Renesas R-Car V3U
  - Fix PLL5 on Renesas RZ/G2L and RZ/V2L
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmSaakgRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSV1ShAAvvDE7CbcWQqIQvweGL/WjFEp+05OBQHs
 eqHVEZshdw2Bk7eVyaU86Yjasq317yd0PUo/Mnme7tr4Od5WauegXhM5mR85crfQ
 qdA3/A/3ZyvlSxWCefsoXEee62D/2fLGro73NFWlYWf3U7j4saAxw/Fto9AAyZQd
 kX0kAmrKzjRJPyh2xTJlz5b5os3D1SOstmPXjUGuv+2gaC5cBt/pEd+vPX+OW5mD
 IFy+N1CVx2UHJrvK5qCzuP8Aun3usFM2fvMEjfThuR0h7gaTU67sdqydl7a30PzU
 fM+vsQVnU8VxCqquZ4lGWa+pvFSID3tuBdy+B7d2EQnID0558Qom8+syKC2nN0/m
 kN/W4fgWCkoMSHj50VYpbRMUHn8N96t/61uoxAF+byGGZ4h8xxgGylSZVip7awbh
 yUJWvPmDq2UKJzjr3jILEjvigUun3PjezT2D9me64z+TUKAFMtomAt75U1pAShtO
 tWsvC2u2GLns9PS3EC3ov9zhiyVN9MjzlqYEjgGbM2C3swJgY8nnnO2izMpuaC9L
 fB8HtzMNwu+Ct6MKISabHex2Oeh3yhEtfZaldx2DdV05ejxndDzNz4sfh7XAkrFr
 G3x+yn94geaYL0/OMhDw/MqdVWIiTf4q8FYK6yv7XicIQGtLs2GHXxHJf1ltCxHb
 nCnNBgJmYXo=
 =6M8D
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This batch of clk driver updates contains almost no new SoC support.
  Instead there's a treewide patch series from Maxime that makes
  clk_ops::determine_rate mandatory for muxes.

  Beyond that core framework change we have the usual pile of clk driver
  updates such as migrating i2c drivers to use .probe() again or
  YAMLfication of clk DT bindings so we can validate DTBs.

  Overall the SoCs that got the most updates this time around in terms
  of diffstat are the Amlogic and Mediatek drivers because they added
  new SoC support or fixed up various drivers to have proper data.

  In general things look kinda quiet. I suspect the core framework
  change may still shake out some problems after the merge window,
  mostly because not everyone tests linux-next where that series has
  been for some number of weeks. I saw that there's at least one pending
  fix for Tegra that needs to be wrapped up into a proper patch. I'll
  try to catch those bits before the window closes so that -rc1 is
  bootable. More details below.

  Core:
   - Make clk_ops::determine_rate mandatory for muxes

  New Drivers:
   - Add amlogic a1 SoC family PLL and peripheral clock controller support

  Updates:
   - Handle allocation failures from kasprintf() and friends
   - Migrate platform clk drivers to .remove_new()
   - Migrate i2c clk drivers to .probe() instead of .probe_new()
   - Remove CLK_SET_PARENT from all Mediatek MSDC core clocks
   - Add infra_ao reset support for Mediatek MT8188 SoCs
   - Align driver_data to i2c_device_id tables in some i2c clk drivers
   - Use device_get_match_data() in vc5 clk driver
   - New Kconfig symbol name (SOC_MICROCHIP_POLARFIRE) for Microchip
     FPGA clock drivers
   - Use of_property_read_bool() to read "microchip,pic32mzda-sosc"
     boolean DT property in clk-pic32mzda
   - Convert AT91 clock dt-bindings to YAML
   - Remove CLK_SET_RATE_PARENT flag from LDB clocks on i.MX6SX
   - Keep i.MX UART clocks enabled during kernel boot if earlycon is set
   - Drop imx_unregister_clocks() as there are no users anymore
   - Switch to _safe iterator on imx_clk_scu_unregister() to avoid use
     after free
   - Add determine_rate op to the imx8m composite clock
   - Use device managed API for iomap and kzalloc for i.MXRT1050,
     i.MX8MN, i.MX8MP and i.MX93 clock controller drivers
   - Add missing interrupt DT property for the i.MX8M clock controller
   - Re-add support for Exynos4212 clock controller because we are
     re-introducing the SoC in the mainline
   - Add CONFIG_OF dependency to Samsung clk Kconfig symbols to solve
     some objtool warnings
   - Preselect PLL MIPI as TCON0 parent for Allwinner A64 SoC
   - Convert the Renesas clock drivers to readl_poll_timeout_atomic()
   - Add PWM clock on Renesas R-Car V3U
   - Fix PLL5 on Renesas RZ/G2L and RZ/V2L"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (149 commits)
  clk: fix typo in clk_hw_register_fixed_rate_parent_data() macro
  clk: Fix memory leak in devm_clk_notifier_register()
  clk: mvebu: Iterate over possible CPUs instead of DT CPU nodes
  clk: mvebu: Use of_get_cpu_hwid() to read CPU ID
  MAINTAINERS: Add Marvell mvebu clock drivers
  clk: clocking-wizard: check return value of devm_kasprintf()
  clk: ti: clkctrl: check return value of kasprintf()
  clk: keystone: sci-clk: check return value of kasprintf()
  clk: si5341: free unused memory on probe failure
  clk: si5341: check return value of {devm_}kasprintf()
  clk: si5341: return error if one synth clock registration fails
  clk: cdce925: check return value of kasprintf()
  clk: vc5: check memory returned by kasprintf()
  clk: mediatek: clk-mt8173-apmixedsys: Fix iomap not released issue
  clk: mediatek: clk-mt8173-apmixedsys: Fix return value for of_iomap() error
  clk: mediatek: clk-mtk: Grab iomem pointer for divider clocks
  clk: keystone: syscon-clk: Add support for audio refclk
  dt-bindings: clock: Add binding documentation for TI Audio REFCLK
  dt-bindings: clock: ehrpwm: Remove unneeded syscon compatible
  clk: keystone: syscon-clk: Allow the clock node to not be of type syscon
  ...
 2023-06-29 10:05:47 -07:00
Stephen Boyd
82e58e69d7 Merge branches 'clk-qcom' and 'clk-microchip' into clk-next 
* clk-qcom: (63 commits)
  clk: qcom: gcc-sc8280xp: Add runtime PM
  clk: qcom: gpucc-sc8280xp: Add runtime PM
  clk: qcom: mmcc-msm8974: fix MDSS_GDSC power flags
  clk: qcom: gpucc-sm6375: Enable runtime pm
  dt-bindings: clock: sm6375-gpucc: Add VDD_GX
  clk: qcom: gcc-sm6115: Add missing PLL config properties
  clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi)
  clk: qcom: gcc-ipq6018: remove duplicate initializers
  clk: qcom: gcc-ipq9574: Enable crypto clocks
  dt-bindings: clock: Add crypto clock and reset definitions
  clk: qcom: Add lpass audio clock controller driver for SC8280XP
  clk: qcom: Add lpass clock controller driver for SC8280XP
  dt-bindings: clock: Add LPASS AUDIOCC and reset controller for SC8280XP
  dt-bindings: clock: Add LPASSCC and reset controller for SC8280XP
  dt-bindings: clock: qcom,mmcc: define clocks/clock-names for MSM8226
  clk: qcom: gpucc-sm8550: Add support for graphics clock controller
  clk: qcom: Add support for SM8450 GPUCC
  clk: qcom: gcc-sm8450: Enable hw_clk_ctrl
  clk: qcom: rcg2: Make hw_clk_ctrl toggleable
  dt-bindings: clock: qcom: Add SM8550 graphics clock controller
  ...

* clk-microchip:
  clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id
  clk: at91: sama7g5: switch to parent_hw and parent_data
  clk: at91: sckc: switch to parent_data/parent_hw
  clk: at91: clk-sam9x60-pll: add support for parent_hw
  clk: at91: clk-utmi: add support for parent_hw
  clk: at91: clk-system: add support for parent_hw
  clk: at91: clk-programmable: add support for parent_hw
  clk: at91: clk-peripheral: add support for parent_hw
  clk: at91: clk-master: add support for parent_hw
  clk: at91: clk-generated: add support for parent_hw
  clk: at91: clk-main: add support for parent_data/parent_hw
 2023-06-26 16:36:14 -07:00
Bjorn Andersson
e5d10d1d1a Merge branch '20230608125315.11454-2-srinivas.kandagatla@linaro.org' into clk-for-6.5 
Merge the missing SC8280XP LPASS DeviceTree changes, which where brought
in through a topic branch in order to be shared with the DeviceTree
source files, but not merged into the clock tree until now.
 2023-06-26 09:26:48 -07:00