mirror of
https://git.proxmox.com/git/mirror_ubuntu-kernels.git
synced 2026-01-09 07:26:18 +00:00
56e62cd28a
224 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
|
|
8347356626 |
soc: qcom: apr: Add avs/audio tracking functionality
Use PDR helper functions to track the protection domains that the apr services are dependent upon on SDM845 SoC, specifically the "avs/audio" service running on ADSP Q6. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200312120842.21991-4-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> |
||
|
|
fbe639b44a |
soc: qcom: Introduce Protection Domain Restart helpers
Qualcomm SoCs (starting with MSM8998) allow for multiple protection domains to run on the same Q6 sub-system. This allows for services like ATH10K WLAN FW to have their own separate address space and crash/recover without disrupting the modem and other PDs running on the same sub-system. The PDR helpers introduces an abstraction that allows for tracking/controlling the life cycle of protection domains running on various Q6 sub-systems. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200312120842.21991-2-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> |
||
|
|
eab3540562 |
ARM: SoC-related driver updates
Various driver updates for platforms:
- Nvidia: Fuse support for Tegra194, continued memory controller pieces
for Tegra30
- NXP/FSL: Refactorings of QuickEngine drivers to support ARM/ARM64/PPC
- NXP/FSL: i.MX8MP SoC driver pieces
- TI Keystone: ring accelerator driver
- Qualcomm: SCM driver cleanup/refactoring + support for new SoCs.
- Xilinx ZynqMP: feature checking interface for firmware. Mailbox
communication for power management
- Overall support patch set for cpuidle on more complex hierarchies
(PSCI-based)
+ Misc cleanups, refactorings of Marvell, TI, other platforms.
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl4+lTYPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3nQcQAJm91+6hZbmMjlBySGS7ISjYvOcrI/hMgiOl
uhhEP0Dcylvf9A9x3wcIbLwixe+2pvie9DQh2u5F80ShYimidtFi/2xCfuTb9fKu
sxxKjrXWyVKhkpW0z+tedY08ftVhkwwcyD4m2C7uVl6AwTP7c367vFeU7XjF2APn
drfgmgbjm8U3XbSyAqv+k6z6tyqaCnFM7vbPupSKHgHJ3mfByxOa+XyBN2RdgBbs
0KrVfbXGv80zFIFrMPwaWG7G52bu7K68nVdgy44MpKdRZ6QTjhnR+kerFxHsYgV4
bM55Fya52nTCSTGdKaQakDtKwbAUdCDTSkxgOHGcQoyFi0R/VaEUJtcysnvLbI6c
+n/yFIzGyEdXcvIzfv2SoDYhogw19I6RR/M9K5Ni29eazkDVYx2z3rI+2QYeqCiF
u7cq52gW6JLP0SI/9kuUrRFiR8v19Ixap7qokAxgqQwYB3NzT8a7WsYPkzdpDZGQ
ETSDFMyBWT6UvBe/HWkQluBabbet53rG8BF0OHFrQuMK0u/ieKgSGuTB9XN2djEW
PHMOMz2vhi+8XTfpkskhF2tTxlA/k4R6QwCdIMpIkMRVnVQCh1XdPr3Fi2NrgB+S
kIXHD4vV6zLYh04zHyKewSPHAXWgraFpg2qKnvL5+KWMTnW6QH+RNjOt9xKDNXOd
+iDXpOad
=ONtb
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC-related driver updates from Olof Johansson:
"Various driver updates for platforms:
- Nvidia: Fuse support for Tegra194, continued memory controller
pieces for Tegra30
- NXP/FSL: Refactorings of QuickEngine drivers to support
ARM/ARM64/PPC
- NXP/FSL: i.MX8MP SoC driver pieces
- TI Keystone: ring accelerator driver
- Qualcomm: SCM driver cleanup/refactoring + support for new SoCs.
- Xilinx ZynqMP: feature checking interface for firmware. Mailbox
communication for power management
- Overall support patch set for cpuidle on more complex hierarchies
(PSCI-based)
and misc cleanups, refactorings of Marvell, TI, other platforms"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (166 commits)
drivers: soc: xilinx: Use mailbox IPI callback
dt-bindings: power: reset: xilinx: Add bindings for ipi mailbox
drivers: soc: ti: knav_qmss_queue: Pass lockdep expression to RCU lists
MAINTAINERS: Add brcmstb PCIe controller entry
soc/tegra: fuse: Unmap registers once they are not needed anymore
soc/tegra: fuse: Correct straps' address for older Tegra124 device trees
soc/tegra: fuse: Warn if straps are not ready
soc/tegra: fuse: Cache values of straps and Chip ID registers
memory: tegra30-emc: Correct error message for timed out auto calibration
memory: tegra30-emc: Firm up hardware programming sequence
memory: tegra30-emc: Firm up suspend/resume sequence
soc/tegra: regulators: Do nothing if voltage is unchanged
memory: tegra: Correct reset value of xusb_hostr
soc/tegra: fuse: Add APB DMA dependency for Tegra20
bus: tegra-aconnect: Remove PM_CLK dependency
dt-bindings: mediatek: add MT6765 power dt-bindings
soc: mediatek: cmdq: delete not used define
memory: tegra: Add support for the Tegra194 memory controller
memory: tegra: Only include support for enabled SoCs
memory: tegra: Support DVFS on Tegra186 and later
...
|
||
|
|
9f68e3655a |
drm pull for 5.6-rc1
uapi: - dma-buf heaps added (and fixed) - command line add support for panel oreientation - command line allow overriding penguin count drm: - mipi dsi definition updates - lockdep annotations for dma_resv - remove dma-buf kmap/kunmap support - constify fb_ops in all fbdev drivers - MST fix for daisy chained hotplug- - CTA-861-G modes with VIC >= 193 added - fix drm_panel_of_backlight export - LVDS decoder support - more device based logging support - scanline alighment for dumb buffers - MST DSC helpers scheduler: - documentation fixes - job distribution improvements panel: - Logic PD type 28 panel support - Jimax8729d MIPI-DSI - igenic JZ4770 - generic DSI devicetree bindings - sony acx424AKP panel - Leadtek LTK500HD1829 - xinpeng XPP055C272 - AUO B116XAK01 - GiantPlus GPM940B0 - BOE NV140FHM-N49 - Satoz SAT050AT40H12R2 - Sharp LS020B1DD01D panels. ttm: - use blocking WW lock i915: - hw/uapi state separation - Lock annotation improvements - selftest improvements - ICL/TGL DSI VDSC support - VBT parsing improvments - Display refactoring - DSI updates + fixes - HDCP 2.2 for CFL - CML PCI ID fixes - GLK+ fbc fix - PSR fixes - GEN/GT refactor improvments - DP MST fixes - switch context id alloc to xarray - workaround updates - LMEM debugfs support - tiled monitor fixes - ICL+ clock gating programming removed - DP MST disable sequence fixed - LMEM discontiguous object maps - prefaulting for discontiguous objects - use LMEM for dumb buffers if possible - add LMEM mmap support amdgpu: - enable sync object timelines for vulkan - MST atomic routines - enable MST DSC support - add DMCUB display microengine support - DC OEM i2c support - Renoir DC fixes - Initial HDCP 2.x support - BACO support for Arcturus - Use BACO for runtime PM power save - gfxoff on navi10 - gfx10 golden updates and fixes - DCN support on POWER - GFXOFF for raven1 refresh - MM engine idle handlers cleanup - 10bpc EDP panel fixes - renoir watermark fixes - SR-IOV fixes - Arcturus VCN fixes - GDDR6 training fixes - freesync fixes - Pollock support amdkfd: - unify more codepath with amdgpu - use KIQ to setup HIQ rather than MMIO radeon: - fix vma fault handler race - PPC DMA fix - register check fixes for r100/r200 nouveau: - mmap_sem vs dma_resv fix - rewrite the ACR secure boot code for Turing - TU10x graphics engine support (TU11x pending) - Page kind mapping for turing - 10-bit LUT support - GP10B Tegra fixes - HD audio regression fix hisilicon/hibmc: - use generic fbdev code and helpers rockchip: - dsi/px30 support virtio: - fb damage support - static some functions vc4: - use dma_resv lock wrappers msm: - use dma_resv lock wrappers - sc7180 display + DSI support - a618 support - UBWC support improvements vmwgfx: - updates + new logging uapi exynos: - enable/disable callback cleanups etnaviv: - use dma_resv lock wrappers atmel-hlcdc: - clock fixes mediatek: - cmdq support - non-smooth cursor fixes - ctm property support sun4i: - suspend support - A64 mipi dsi support rcar-du: - Color management module support - LVDS encoder dual-link support - R8A77980 support analogic: - add support for an6345 ast: - atomic modeset support - primary plane garbage fix arcgpu: - fixes for fourcc handling tegra: - minor fixes and improvments mcde: - vblank support meson: - OSD1 plane AFBC commit gma500: - add pageflip support - reomve global drm_dev komeda: - tweak debugfs output - d32 support - runtime PM suppotr udl: - use generic shmem helpers - cleanup and fixes -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJeMm6RAAoJEAx081l5xIa+vN8P/0j4jEOv+KIinAhoH+LG3EpD m2TUuu5OQIoBrcCoWOgFBk3wqYpw6PdMBdkXh+5sE5lfeBynp8oC3Bin+QsHJE05 eGBpZtHe+70MQb0Eha+Aic0hchvBKzRnq6i0MYSIHn6afs76dLmF8knTjycxrvV5 Xu1Z3WDmjzqgWF9ja5JCD6fby11seP5RrwObYKVikO35QQyJJwGSGKgu5rq/pByK /n0PCnCOINuL0Lz6J9qexdh/0/XYFQilRC31GJNlKbDSFuECF0GOEzEE/xUBW/pI dLh2YwIIygm18Gar9PgvMwXJn3BfzQ0qEJsf+HlQeNw9iLgbHpp2AsTxHTE87OGe R/y85taW3jGjPsNOKZOeLpvg/Ro8l8ZipLApvDCG2O22DThg/cd6NDjZxl1FJfRH acDG/JdgPo5MbdRAH/cM1WuFS9gEM+0BeSQ5gCjtPakF+X4Vz+ABFDLMRJoaejkJ q8DG32TQXELQx0RMghsqK7YCWGfl+2alA1u9w6TgJh9Rq4iVckvpDeqAZnK1Adkc 87g957Tl0n6FA4wJj/t5jrceiLRMJAm/rBK+R3GZNfWrgx4bHbCmb4fZDZsrFzph nbAjNJ5kOchrFCaRR47ULby6+Q14MAFbkWq4Crfu4YDdzUkTPpep6pi2GIe8w0rV P0hdYOYJf6LUda0utuQX =oFrI -----END PGP SIGNATURE----- Merge tag 'drm-next-2020-01-30' of git://anongit.freedesktop.org/drm/drm Pull drm updates from Davbe Airlie: "This is the main pull request for graphics for 5.6. Usual selection of changes all over. I've got one outstanding vmwgfx pull that touches mm so kept it separate until after all of this lands. I'll try and get it to you soon after this, but it might be early next week (nothing wrong with code, just my schedule is messy) This also hits a lot of fbdev drivers with some cleanups. Other notables: - vulkan timeline semaphore support added to syncobjs - nouveau turing secureboot/graphics support - Displayport MST display stream compression support Detailed summary: uapi: - dma-buf heaps added (and fixed) - command line add support for panel oreientation - command line allow overriding penguin count drm: - mipi dsi definition updates - lockdep annotations for dma_resv - remove dma-buf kmap/kunmap support - constify fb_ops in all fbdev drivers - MST fix for daisy chained hotplug- - CTA-861-G modes with VIC >= 193 added - fix drm_panel_of_backlight export - LVDS decoder support - more device based logging support - scanline alighment for dumb buffers - MST DSC helpers scheduler: - documentation fixes - job distribution improvements panel: - Logic PD type 28 panel support - Jimax8729d MIPI-DSI - igenic JZ4770 - generic DSI devicetree bindings - sony acx424AKP panel - Leadtek LTK500HD1829 - xinpeng XPP055C272 - AUO B116XAK01 - GiantPlus GPM940B0 - BOE NV140FHM-N49 - Satoz SAT050AT40H12R2 - Sharp LS020B1DD01D panels. ttm: - use blocking WW lock i915: - hw/uapi state separation - Lock annotation improvements - selftest improvements - ICL/TGL DSI VDSC support - VBT parsing improvments - Display refactoring - DSI updates + fixes - HDCP 2.2 for CFL - CML PCI ID fixes - GLK+ fbc fix - PSR fixes - GEN/GT refactor improvments - DP MST fixes - switch context id alloc to xarray - workaround updates - LMEM debugfs support - tiled monitor fixes - ICL+ clock gating programming removed - DP MST disable sequence fixed - LMEM discontiguous object maps - prefaulting for discontiguous objects - use LMEM for dumb buffers if possible - add LMEM mmap support amdgpu: - enable sync object timelines for vulkan - MST atomic routines - enable MST DSC support - add DMCUB display microengine support - DC OEM i2c support - Renoir DC fixes - Initial HDCP 2.x support - BACO support for Arcturus - Use BACO for runtime PM power save - gfxoff on navi10 - gfx10 golden updates and fixes - DCN support on POWER - GFXOFF for raven1 refresh - MM engine idle handlers cleanup - 10bpc EDP panel fixes - renoir watermark fixes - SR-IOV fixes - Arcturus VCN fixes - GDDR6 training fixes - freesync fixes - Pollock support amdkfd: - unify more codepath with amdgpu - use KIQ to setup HIQ rather than MMIO radeon: - fix vma fault handler race - PPC DMA fix - register check fixes for r100/r200 nouveau: - mmap_sem vs dma_resv fix - rewrite the ACR secure boot code for Turing - TU10x graphics engine support (TU11x pending) - Page kind mapping for turing - 10-bit LUT support - GP10B Tegra fixes - HD audio regression fix hisilicon/hibmc: - use generic fbdev code and helpers rockchip: - dsi/px30 support virtio: - fb damage support - static some functions vc4: - use dma_resv lock wrappers msm: - use dma_resv lock wrappers - sc7180 display + DSI support - a618 support - UBWC support improvements vmwgfx: - updates + new logging uapi exynos: - enable/disable callback cleanups etnaviv: - use dma_resv lock wrappers atmel-hlcdc: - clock fixes mediatek: - cmdq support - non-smooth cursor fixes - ctm property support sun4i: - suspend support - A64 mipi dsi support rcar-du: - Color management module support - LVDS encoder dual-link support - R8A77980 support analogic: - add support for an6345 ast: - atomic modeset support - primary plane garbage fix arcgpu: - fixes for fourcc handling tegra: - minor fixes and improvments mcde: - vblank support meson: - OSD1 plane AFBC commit gma500: - add pageflip support - reomve global drm_dev komeda: - tweak debugfs output - d32 support - runtime PM suppotr udl: - use generic shmem helpers - cleanup and fixes" * tag 'drm-next-2020-01-30' of git://anongit.freedesktop.org/drm/drm: (1998 commits) drm/nouveau/fb/gp102-: allow module to load even when scrubber binary is missing drm/nouveau/acr: return error when registering LSF if ACR not supported drm/nouveau/disp/gv100-: not all channel types support reporting error codes drm/nouveau/disp/nv50-: prevent oops when no channel method map provided drm/nouveau: support synchronous pushbuf submission drm/nouveau: signal pending fences when channel has been killed drm/nouveau: reject attempts to submit to dead channels drm/nouveau: zero vma pointer even if we only unreference it rather than free drm/nouveau: Add HD-audio component notifier support drm/nouveau: fix build error without CONFIG_IOMMU_API drm/nouveau/kms/nv04: remove set but not used variable 'width' drm/nouveau/kms/nv50: remove set but not unused variable 'nv_connector' drm/nouveau/mmu: fix comptag memory leak drm/nouveau/gr/gp10b: Use gp100_grctx and gp100_gr_zbc drm/nouveau/pmu/gm20b,gp10b: Fix Falcon bootstrapping drm/exynos: Rename Exynos to lowercase drm/exynos: change callback names drm/mst: Don't do atomic checks over disabled managers drm/amdgpu: add the lost mutex_init back drm/amd/display: skip opp blank or unblank if test pattern enabled ... |
||
|
|
33c84e89ab |
SCSI misc on 20200129
This series is slightly unusual because it includes Arnd's compat ioctl tree here: |
||
|
|
684415d0de |
cmdq:
- clean ups of unused code and debuggability - add cmdq_instruction to make the function call interface more readable - add functions for polling and providing info for the user of cmdq scpsys: - add bindings for MT6765 -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl4cPekXHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH6YDA/+MRYiMb26fu+Ac3pF1SW6ao0A fCI0JH2L8Zj4nklg3Y/hoi2PG7DJL2vaG71Ng3iQxQqKLWJdS1WbF/DBl8JdozQx mJXXZ0JM5cc/gIvrG8PLAauWRTDUIPDC2ZZ66mO4CiR6T7Kp/LpnmZF5ZR4qxu/W KNAYxSeyPJ36WQ3HCmubBWOn4JaetOeBFID6z3roKhsGyFXLmCo0Djw4c0Lpk79t 3qVpo7TcC3hintZSC8ufIjQZA/KU3kwy3pS2O+HKMDb4EwORl14Grd6/cN9rAf0p twprn4Y9Jx4cBy0jGyZShKMbIn6wT6zF8GqpoV71vvXTgknyr8XoaiepnjMd2Enm BXw7R8kUt3w4mHnMwX9aUPAP48S1DVMm0OsbwOOqRcSXyJWnQBFB85LnkKeSfzRW iWfeXQBaESCQziYkJSkXz2D4epV/Rzq/L1y5IrddQuwIlpQ3eeqYUWBDYhuV3VlY K4r/AawG0NKPWTvH0bgLZAiWybnzXPZUvVJzwkdwRBjpiyhsl0FX1oZb1H8Vf6mK yrCUgaTIVp6z0pMd8kaxPTyi2AXryKODOXp+XJ2JFmdLFuBPQMSLCiG+B6sDa2Sw eYMcZpFtL5B/p/NpNuSUlGZ2HXTxknS3RnIDTUJ583BZLeItShHnBW3P/8qjx7Wm 8oGsLh0ZLF0G5iqdeuM= =Q9/6 -----END PGP SIGNATURE----- Merge tag 'v5.5-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers cmdq: - clean ups of unused code and debuggability - add cmdq_instruction to make the function call interface more readable - add functions for polling and providing info for the user of cmdq scpsys: - add bindings for MT6765 * tag 'v5.5-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: dt-bindings: mediatek: add MT6765 power dt-bindings soc: mediatek: cmdq: delete not used define soc: mediatek: cmdq: add cmdq_dev_get_client_reg function soc: mediatek: cmdq: add polling function soc: mediatek: cmdq: define the instruction struct soc: mediatek: cmdq: remove OR opertaion from err return Link: https://lore.kernel.org/r/9b365e76-e346-f813-d750-d7cfd0d16e4e@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net> |
||
|
|
2ced5a3449 |
SOC: TI Keystone Ring Accelerator driver
The Ring Accelerator (RINGACC or RA) provides hardware acceleration to enable straightforward passing of work between a producer and a consumer. There is one RINGACC module per NAVSS on TI AM65x SoCs. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJeH1VYAAoJEHJsHOdBp5c/k4cP/RHrk67mB8L6JC7G9H1XWedM w4aG80q7u8dAydk9k3wJM1Y4ChXfflR3JYc5KBghrsQiRPF8myh4JEwi3+8jpTT5 LUOJifaEtR79VuNCHyG9Wgni3LWYnp7HmG4jM1bzcDwLgpf4I8cBwXkCfW0kmyPq HAaFLWo1net3TkhSnUkbFUn54vESl569/D6FIfFFK2DPJH/gLUKQ6W8Xnd1uKBaI 9RpnN6eGA0ZWZkZG+Xu7XA/VfC/AR+wxbCr0l1jHB9+4CrngOEwsTnP1SFxFsD1v L7zAT5JguNg13jbELVgTpUX8X5/XBfbOzIrNZpeXnl0fl8p2SU25n8hw8KdYjKCP 5puO6wye5NnliQs5hLlMTydF77VazAqdBhLz5i1OMa+cuA1zVzm7dyIZBAWbI8IC TY86h9eGyGKELjljrYhW8ijARbzu/J3SpO3cSklvL/BfXtlVYen5d0mZxsKBDWOi bni1yV37b65IWjkimwzkaVq/sN9jWTAF2a192SkKeEBqnms5jxKDeCRq9qSxpCWv ONFROd6WXImDTk/MLgo4EdAq+ProoBFR+YDLModSAv3fZaBFUgi5mU5Xnx1+cAFq SL9TguzvXhUv6o6ywNZSsSM/7I2iB5uOMRKjCeGg2x1JN9lyOMzrVlJ8JzzUyKV3 iiKDJjNdZD0/Rn2fl5a1 =m1rI -----END PGP SIGNATURE----- Merge tag 'drivers_soc_for_5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers SOC: TI Keystone Ring Accelerator driver The Ring Accelerator (RINGACC or RA) provides hardware acceleration to enable straightforward passing of work between a producer and a consumer. There is one RINGACC module per NAVSS on TI AM65x SoCs. * tag 'drivers_soc_for_5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: soc: ti: k3: add navss ringacc driver bindings: soc: ti: add documentation for k3 ringacc Link: https://lore.kernel.org/r/1579205259-4845-1-git-send-email-santosh.shilimkar@oracle.com Signed-off-by: Olof Johansson <olof@lixom.net> |
||
|
|
3277e8aa25 |
soc: ti: k3: add navss ringacc driver
The Ring Accelerator (RINGACC or RA) provides hardware acceleration to enable straightforward passing of work between a producer and a consumer. There is one RINGACC module per NAVSS on TI AM65x SoCs. The RINGACC converts constant-address read and write accesses to equivalent read or write accesses to a circular data structure in memory. The RINGACC eliminates the need for each DMA controller which needs to access ring elements from having to know the current state of the ring (base address, current offset). The DMA controller performs a read or write access to a specific address range (which maps to the source interface on the RINGACC) and the RINGACC replaces the address for the transaction with a new address which corresponds to the head or tail element of the ring (head for reads, tail for writes). Since the RINGACC maintains the state, multiple DMA controllers or channels are allowed to coherently share the same rings as applicable. The RINGACC is able to place data which is destined towards software into cached memory directly. Supported ring modes: - Ring Mode - Messaging Mode - Credentials Mode - Queue Manager Mode TI-SCI integration: Texas Instrument's System Control Interface (TI-SCI) Message Protocol now has control over Ringacc module resources management (RM) and Rings configuration. The corresponding support of TI-SCI Ringacc module RM protocol introduced as option through DT parameters: - ti,sci: phandle on TI-SCI firmware controller DT node - ti,sci-dev-id: TI-SCI device identifier as per TI-SCI firmware spec if both parameters present - Ringacc driver will configure/free/reset Rings using TI-SCI Message Ringacc RM Protocol. The Ringacc driver manages Rings allocation by itself now and requests TI-SCI firmware to allocate and configure specific Rings only. It's done this way because, Linux driver implements two stage Rings allocation and configuration (allocate ring and configure ring) while TI-SCI Message Protocol supports only one combined operation (allocate+configure). Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Tero Kristo <t-kristo@ti.com> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com> |
||
|
|
d412f18c9b |
soc: mediatek: cmdq: add cmdq_dev_get_client_reg function
GCE cannot know the register base address, this function can help cmdq client to get the cmdq_client_reg structure. Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: Houlong Wei <houlong.wei@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
||
|
|
b2ff2356bf |
soc: mediatek: cmdq: add polling function
add polling function in cmdq helper functions Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
||
|
|
945005409b |
soc: samsung: Rename Samsung and Exynos to lowercase
Fix up inconsistent usage of upper and lowercase letters in "Samsung" and "Exynos" names. "SAMSUNG" and "EXYNOS" are not abbreviations but regular trademarked names. Therefore they should be written with lowercase letters starting with capital letter. The lowercase "Exynos" name is promoted by its manufacturer Samsung Electronics Co., Ltd., in advertisement materials and on website. Although advertisement materials usually use uppercase "SAMSUNG", the lowercase version is used in all legal aspects (e.g. on Wikipedia and in privacy/legal statements on https://www.samsung.com/semiconductor/privacy-global/). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> |
||
|
|
fef093ff7e |
scsi: soc: mediatek: add header for SiP service interface
Add a common header for the SiP service interface in MediaTek Chipsets. Cc: Alim Akhtar <alim.akhtar@samsung.com> Cc: Avri Altman <avri.altman@wdc.com> Cc: Bart Van Assche <bvanassche@acm.org> Cc: Bean Huo <beanhuo@micron.com> Cc: Can Guo <cang@codeaurora.org> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/1577683950-1702-2-git-send-email-stanley.chu@mediatek.com Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> |
||
|
|
ec939e4c94 |
ARM: SoC-related driver updates
Various driver updates for platforms:
- A larger set of work on Tegra 2/3 around memory controller and
regulator features, some fuse cleanups, etc..
- MMP platform drivers, in particular for USB PHY, and other smaller
additions.
- Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
and ASV (adaptive voltage), allowing the platform to run at more
optimal operating points.
- Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas
- Clock/reset control driver for TI/OMAP
- Meson-A1 reset controller support
- Qualcomm sdm845 and sda845 SoC IDs for socinfo
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl3pORkPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3FK0P/0EG4lK+il7nE3pd9yIGUjlcYuumIjoxvyC9
9ef202POJLIO3yMlsNyGFR+aOknFO/GtGvDkDFhTtlsGCL40tVzVsyo7ZQo+8mXD
abr+H74NmRXImc+SISYR8X1CD6vEi3oi/no1y5dRzknlBikfsdSLKXJSMYBJ2A6t
DNLwu0h1IZhPk7XQQsxaElG/a9HN8eueMdP20J1IlhOh0GiOwm+rbsLSZNbA/W9m
53XhFs3Ag39SDE0BfXsS+XOWTE7FheZsZk2XQrOwYm9PnxjpIWH7FE2sYsk6uUIc
Pa1b6wB5zlRnxvVHP0m3GXhbTUJDYDK3oybHffI4Mzd0cyZQHC92LhUXFrlTxkaf
6kyhJOTdd5KMlZ2LS7jkwLqb30ieXBPKAREjdbRt6hpvu5P6G+bZQphTEeNAZC61
XnX8mQ/XeoHdoGY5MvS8ht6a1qDF29ebA0/02seicThGK6tS9Qsju6Zo0sg9H1NH
weK6jDuzLq5jpv/LB1apigrDSx+zddRzrwkwy85hR5aWOQhG0xjOoFBProbTS0to
wR46zCEkbGZv4uc0gRuIdp0NR/lguqgDWPeoLluoTqmcpKS6N3RyxD0bWzlvgDFA
fpYxVNKavHneWjfZ7U5RbYXD6jycJcuLaCOs16nrtUbMgJ9pqclLIaZXn7ZTRIuT
RW6NgfZV
=dk7w
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Olof Johansson:
"Various driver updates for platforms:
- A larger set of work on Tegra 2/3 around memory controller and
regulator features, some fuse cleanups, etc..
- MMP platform drivers, in particular for USB PHY, and other smaller
additions.
- Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
and ASV (adaptive voltage), allowing the platform to run at more
optimal operating points.
- Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas
- Clock/reset control driver for TI/OMAP
- Meson-A1 reset controller support
- Qualcomm sdm845 and sda845 SoC IDs for socinfo"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (150 commits)
firmware: arm_scmi: Fix doorbell ring logic for !CONFIG_64BIT
soc: fsl: add RCPM driver
dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition
memory: tegra: Consolidate registers definition into common header
memory: tegra: Ensure timing control debug features are disabled
memory: tegra: Introduce Tegra30 EMC driver
memory: tegra: Do not handle error from wait_for_completion_timeout()
memory: tegra: Increase handshake timeout on Tegra20
memory: tegra: Print a brief info message about EMC timings
memory: tegra: Pre-configure debug register on Tegra20
memory: tegra: Include io.h instead of iopoll.h
memory: tegra: Adapt for Tegra20 clock driver changes
memory: tegra: Don't set EMC rate to maximum on probe for Tegra20
memory: tegra: Add gr2d and gr3d to DRM IOMMU group
memory: tegra: Set DMA mask based on supported address bits
soc: at91: Add Atmel SFR SN (Serial Number) support
memory: atmel-ebi: switch to SPDX license identifiers
memory: atmel-ebi: move NUM_CS definition inside EBI driver
soc: mediatek: Refactor bus protection control
soc: mediatek: Refactor sram control
...
|
||
|
|
38206c24ab |
ARM: SoC platform updates
Most of these are for MMP (seeing a bunch of cleanups and refactorings
for the first time in a while), and for OMAP (a bunch of cleanups and
added support for voltage controller on OMAP4430).
-----BEGIN PGP SIGNATURE-----
iQJCBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl3ohBEPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3NVAP917d1YAyrRPZWo28DVRuy8fg41yD6m8zq+P1
/Nki4QRVssWYR515zf1fJ8dyVmrvnb4iTxVoeRkneVmQKdcrJh/oMn8F0P7k/mXU
HwYiFxwTCZt5nIjz0NxUInznJcIeYUvBGDKS7a6Tqw3J+KcZSIpU3rr3Y8PaZRqZ
aKKUwNxXHJkD2J1MXsempPvZ+IYtx59ptFz99kLxBeTT+XfFz1sgAD32IoqwMhw2
prNCE9/QD8M5e5UrFhgrKLXGg1GgG5jvQelfctTdmF1Y5HUavmeWfp+1sT8QJSmw
arMjzYoX8efXDDhIyL6ECxxOkqG34BDcKoGMsq4pIiUaWJ1jrwfsrH1utH0jHU/H
vcsiGxzGKPCyVFMn6y8ppY8IO4HvLQxFZk1gStJ2Hezt4ay4g+LhUCK1hpNJuT82
ToxyMmPeNwVeZp+NKuxDuGfIpPqvGEsKNlPFQRP3IQIRf6BIYNbq4T2aHPjsTomK
nJ8xk3uL6R2FPKmx+wkWEqKiJvDhSbuZipHBHHhYiTPznAFL+i1kIwhK3Zdez42w
gR3yNMY3KTQFgZGcvjOYAj+90pmlR09DAJK/6+DTNUKbsyxUBIxIoMSYOuhkmb8P
YjZNeztjv545gLVJ7z2vPefTrbd+RqQxv6HiNzdIrrhA6OHzMQBf+V6JzAtY0ZD9
rxPsRJo=
=Tga8
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC platform updates from Olof Johansson:
"Most of these are for MMP (seeing a bunch of cleanups and refactorings
for the first time in a while), and for OMAP (a bunch of cleanups and
added support for voltage controller on OMAP4430)"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (51 commits)
ARM: OMAP2+: Add missing put_device() call in omapdss_init_of()
OMAP2: fixup doc comments in omap_device
ARM: OMAP1: drop duplicated dependency on ARCH_OMAP1
ARM: ASPEED: update default ARCH_NR_GPIO for ARCH_ASPEED
ARM: imx: use generic function to exit coherency
ARM: tegra: Use WFE for power-gating on Tegra30
ARM: tegra: Fix FLOW_CTLR_HALT register clobbering by tegra_resume()
ARM: exynos: Enable exynos-asv driver for ARCH_EXYNOS
ARM: s3c: Rename s5p_usb_phy functions
ARM: s3c: Rename s3c64xx_spi_setname() function
ARM: imx: Add serial number support for i.MX6/7 SoCs
ARM: imx: Drop imx_anatop_usb_chrg_detect_disable()
arm64: Introduce config for S32
ARM: hisi: drop useless depend on ARCH_MULTI_V7
arm64: realtek: Select reset controller
ARM: shmobile: rcar-gen2: Drop legacy DT clock support
ARM: OMAP2+: Remove duplicated include from pmic-cpcap.c
ARM: OMAP1: ams-delta FIQ: Fix a typo ("Initiaize")
MAINTAINERS: Add logicpd-som-lv and logicpd-torpedo to OMAP TREE
ARM: OMAP2+: pdata-quirks: drop TI_ST/KIM support
...
|
||
|
|
e35a6ae0eb |
pinctrl/msm: Setup GPIO chip in hierarchy
Some GPIOs are marked as wakeup capable and are routed to another interrupt controller that is an always-domain and can detect interrupts even when most of the SoC is powered off. The wakeup interrupt controller wakes up the GIC and replays the interrupt at the GIC. Setup the TLMM irqchip in hierarchy with the wakeup interrupt controller and ensure the wakeup GPIOs are handled correctly. Co-developed-by: Maulik Shah <mkshah@codeaurora.org> Signed-off-by: Lina Iyer <ilina@codeaurora.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1573855915-9841-9-git-send-email-ilina@codeaurora.org ---- Changes in v2: - Address review comments - Fix Co-developed-by tag Changes in v1: - Address minor review comments - Remove redundant call to set irq handler - Move irq_domain_qcom_handle_wakeup() to this patch Changes in RFC v2: - Rebase on top of GPIO hierarchy support in linux-next - Set the chained irq handler for summary line |
||
|
|
81ef8bf880 |
irqchip/qcom-pdc: Add irqdomain for wakeup capable GPIOs
Introduce a new domain for wakeup capable GPIOs. The domain can be requested using the bus token DOMAIN_BUS_WAKEUP. In the following patches, we will specify PDC as the wakeup-parent for the TLMM GPIO irqchip. Requesting a wakeup GPIO will setup the GPIO and the corresponding PDC interrupt as its parent. Co-developed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Lina Iyer <ilina@codeaurora.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1573855915-9841-5-git-send-email-ilina@codeaurora.org |
||
|
|
d4b0c97a80 |
Qualcomm ARM Based Driver Updates for v5.5
* Add Bjorn as QCOM co-maintainer * Add LLLC yaml bindings and SC7180 support * Fixups/Cleanup for LLLC * Add SMD-RPM MSM8976 compatible and interconnect device * Add missing RPMD SMD perf level -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJdwP5rAAoJEFKiBbHx2RXVpigQALkNC+SntAom44+EtGe8fZEm Zdd4piMEi2Yr1m07wfSDG0GvOi0W0JP1xJ84BpzNBqqe/oJpmWJlpqfMf9W3ZgM1 /e3QPa5/TvjNznwxUVTIwo4VPMy31pk9ZsRep6vXkGL1zU+vGcXs8/IzaRKHMx/A eE1I1O6dxXQFia0fwSioQpsD6MvhAp447Z2CUQu6JMrEHRIiI+AJ9LgRWynYekv2 elmYvuFKJT+6BWB52hG+ck8Q6efvyhFJTB+Af4emjNmFIRaI26ZvTEDp6XXlb+Pq 0btTKLeEPxveVK8PxPmdNhPHjXvh7582piKXz3LyelPu50LIsElRZv45ACgRgsIF iGawfjgY/eoWqT45dibg2N4Aq2q2p/4JxVZGPOs1inxPOeBfKeOEc1xieHtijMdP BJjzzqj+keDOklfSeKNbFpfIYlZn7QVYCp+3w+mwOYiCf+2qI9Vx1cNaWqL5dzAL t4X0axfjpKTkacL9HgVOibGVLpdaISEqUdtG3UoxhrVOHom01waKRlMQHoEZMICT wG3fipAu8mv/RGz645Lj49FqK4+7DNbS+M3anyfRNypThyt/CI7FnbR6GGLh7jcr jRdt2XO72xNJWV5lZu0Jll0PhstykeLoqPiEB/HlvH6Gl9HF6x5tdMt0ZKwTw2i7 20q3xSE4GCYWVUb51CTk =K+qQ -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm ARM Based Driver Updates for v5.5 * Add Bjorn as QCOM co-maintainer * Add LLLC yaml bindings and SC7180 support * Fixups/Cleanup for LLLC * Add SMD-RPM MSM8976 compatible and interconnect device * Add missing RPMD SMD perf level * tag 'qcom-drivers-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: MAINTAINERS: Add myself as co-maintainer for QCOM dt-bindings: msm: Add LLCC for SC7180 dt-bindings: msm: Convert LLCC bindings to YAML soc: qcom: llcc: Add configuration data for SC7180 soc: qcom: llcc: Move regmap config to local variable soc: qcom: llcc: Name regmaps to avoid collisions soc: qcom: Fix llcc-qcom definitions to include soc: qcom: rpmpd: Add rpm power domains for msm8976 dt-bindings: power: Add missing rpmpd smd performance level soc: qcom: smd-rpm: Add MSM8976 compatible soc: qcom: socinfo: add sdm845 and sda845 soc ids soc: qcom: smd-rpm: Create RPM interconnect proxy child device soc: qcom: Make llcc-qcom a generic driver soc: qcom: Rename llcc-slice to llcc-qcom soc: qcom: llcc cleanup to get rid of sdm845 specific driver file Link: https://lore.kernel.org/r/1573068840-13098-4-git-send-email-agross@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net> |
||
|
|
a362687404 |
soc: mmp: guard include of asm/cputype.h with CONFIG_ARM{,64}
Since this driver is enabled for COMPILE_TEST, it avoids build error on x86 allmodconfig: In file included from /build/drivers/phy/marvell/phy-mmp3-usb.c:12: /build/include/linux/soc/mmp/cputype.h:5:10: fatal error: asm/cputype.h: No such file or directory Link: https://lore.kernel.org/r/20191022015658.14624-1-olof@lixom.net Signed-off-by: Olof Johansson <olof@lixom.net> |
||
|
|
32adcaa010 |
ARM: mmp: move cputype.h to include/linux/soc/
Let's move cputype.h away from mach-mmp/ so that the drivers outside that directory are able to tell the precise silicon revision. The MMP3 USB OTG PHY driver needs this. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> |
||
|
|
89da2ba947 |
soc: qcom: Fix llcc-qcom definitions to include
commit |
||
|
|
99356b03b4 |
soc: qcom: Make llcc-qcom a generic driver
This makes way for adding future llcc versions. Also pull out the llcc-qcom specific definitions from includes. Includes path now contains the only definitions that are to be exposed to other subsystems. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> |
||
|
|
a14b820316 |
soc: qcom: llcc cleanup to get rid of sdm845 specific driver file
A single file should suffice the need to program the llcc for various platforms. Get rid of sdm845 specific driver file to make way for a more generic driver. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> |
||
|
|
574cc45397 |
drm main pull for 5.4-rc1
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJdgfi4AAoJEAx081l5xIa+uYQP/3lbB75F60oSb0Y17uOtAwrS
/ZMKZ3/EXcCw42JuYTbz17EiQSajkJcOC+tNRo22nlg4d9R0x3/kXwA7O/eu5RWI
8Qi1rfrMZ6LotQXBfc4nVlHvyocsYc/GVNfsCboUCLwU/aNwnrufS9jeEsvWd2Vt
iIn/okeQ7mTyB/3Dm4RFIAexE21+d5is6YTs45xUnDLhWzXYLU7VnHt5S5kXurEI
cmVA7C1EAqV+GAwkeFWFx/jBpBRKqvTPa8EpOu7cQL01x7KwU2cQeNdOyBF6Uf8a
cNKFI7jZZmu/mFp+YqU33ZIZxbLELm5PN1sz4ZvoIT8BJAQf1VmZg+GG87AvQCUz
zbWKrbHGVy/c+sohUmvCOQvmzca/7rZutFyaCOx2mEdrheRZMWQI/w2C03VfkNFS
vPpXrKXaWbVezHwF6x9PemRxvOPvLkeKAgSVuAfK0DhT5kEldqdzFzI7UO9MYfyX
j+HOUIRP/pseshUV6YbnAe9MS3T4zb5P+Qd1zRTGgo8R9/l1AmVHyrkbH1hGNjY0
mECHucCOh/VsyPAdg1XADJHqMg9081prySK8hNV6oazwSHdC38GdajuOmdyO3azQ
OpJZDQd0eP4fHPMU6F5HSzLOO/wYuAie8gWVSZ3ylDxDPIKfqcjVo+4bxJ8sbmpI
akj6BoMX7we0fjhlbdit
=5CRH
-----END PGP SIGNATURE-----
Merge tag 'drm-next-2019-09-18' of git://anongit.freedesktop.org/drm/drm
Pull drm updates from Dave Airlie:
"This is the main pull request for 5.4-rc1 merge window. I don't think
there is anything outstanding so next week should just be fixes, but
we'll see if I missed anything. I landed some fixes earlier in the
week but got delayed writing summary and sending it out, due to a mix
of sick kid and jetlag!
There are some fixes pending, but I'd rather get the main merge out of
the way instead of delaying it longer.
It's also pretty large in commit count and new amd header file size.
The largest thing is four new amdgpu products (navi12/14, arcturus and
renoir APU support).
Otherwise it's pretty much lots of work across the board, i915 has
started landing tigerlake support, lots of icelake fixes and lots of
locking reworking for future gpu support, lots of header file rework
(drmP.h is nearly gone), some old legacy hacks (DRM_WAIT_ON) have been
put into the places they are needed.
uapi:
- content protection type property for HDCP
core:
- rework include dependencies
- lots of drmP.h removals
- link rate calculation robustness fix
- make fb helper map only when required
- add connector->DDC adapter link
- DRM_WAIT_ON removed
- drop DRM_AUTH usage from drivers
dma-buf:
- reservation object fence helper
dma-fence:
- shrink dma_fence struct
- merge signal functions
- store timestamps in dma_fence
- selftests
ttm:
- embed drm_get_object struct into ttm_buffer_object
- release_notify callback
bridges:
- sii902x - audio graph card support
- tc358767 - aux data handling rework
- ti-snd64dsi86 - debugfs support, DSI mode flags support
panels:
- Support for GiantPlus GPM940B0, Sharp LQ070Y3DG3B, Ortustech
COM37H3M, Novatek NT39016, Sharp LS020B1DD01D, Raydium RM67191, Boe
Himax8279d, Sharp LD-D5116Z01B
- TI nspire, NEC NL8048HL11, LG Philips LB035Q02, Sharp LS037V7DW01,
Sony ACX565AKM, Toppoly TD028TTEC1 Toppoly TD043MTEA1
i915:
- Initial tigerlake platform support
- Locking simplification work, general all over refactoring.
- Selftests
- HDCP debug info improvements
- DSI properties
- Icelake display PLL fixes, colorspace fixes, bandwidth fixes, DSI
suspend/resume
- GuC fixes
- Perf fixes
- ElkhartLake enablement
- DP MST fixes
- GVT - command parser enhancements
amdgpu:
- add wipe memory on release flag for buffer creation
- Navi12/14 support (may be marked experimental)
- Arcturus support
- Renoir APU support
- mclk DPM for Navi
- DC display fixes
- Raven scatter/gather support
- RAS support for GFX
- Navi12 + Arcturus power features
- GPU reset for Picasso
- smu11 i2c controller support
amdkfd:
- navi12/14 support
- Arcturus support
radeon:
- kexec fix
nouveau:
- improved display color management
- detect lack of GPU power cables
vmwgfx:
- evicition priority support
- remove unused security feature
msm:
- msm8998 display support
- better async commit support for cursor updates
etnaviv:
- per-process address space support
- performance counter fixes
- softpin support
mcde:
- DCS transfers fix
exynos:
- drmP.h cleanup
lima:
- reduce logging
kirin:
- misc clenaups
komeda:
- dual-link support
- DT memory regions
hisilicon:
- misc fixes
imx:
- IPUv3 image converter fixes
- 32-bit RGB V4L2 pixel format support
ingenic:
- more support for panel related cases
mgag200:
- cursor support fix
panfrost:
- export GPU features register to userspace
- gpu heap allocations
- per-fd address space support
pl111:
- CLD pads wiring support removed from DT
rockchip:
- rework to use DRM PSR helpers
- fix bug in VOP_WIN_GET macro
- DSI DT binding rework
sun4i:
- improve support for color encoding and range
- DDC enabled GPIO
tinydrm:
- rework SPI support
- improve MIPI-DBI support
- moved to drm/tiny
vkms:
- rework CRC tracking
dw-hdmi:
- get_eld and i2s improvements
gm12u320:
- misc fixes
meson:
- global code cleanup
- vpu feature detect
omap:
- alpha/pixel blend mode properties
rcar-du:
- misc fixes"
* tag 'drm-next-2019-09-18' of git://anongit.freedesktop.org/drm/drm: (2112 commits)
drm/nouveau/bar/gm20b: Avoid BAR1 teardown during init
drm/nouveau: Fix ordering between TTM and GEM release
drm/nouveau/prime: Extend DMA reservation object lock
drm/nouveau: Fix fallout from reservation object rework
drm/nouveau/kms/nv50-: Don't create MSTMs for eDP connectors
drm/i915: Use NOEVICT for first pass on attemping to pin a GGTT mmap
drm/i915: to make vgpu ppgtt notificaiton as atomic operation
drm/i915: Flush the existing fence before GGTT read/write
drm/i915: Hold irq-off for the entire fake lock period
drm/i915/gvt: update RING_START reg of vGPU when the context is submitted to i915
drm/i915/gvt: update vgpu workload head pointer correctly
drm/mcde: Fix DSI transfers
drm/msm: Use the correct dma_sync calls harder
drm/msm: remove unlikely() from WARN_ON() conditions
drm/msm/dsi: Fix return value check for clk_get_parent
drm/msm: add atomic traces
drm/msm/dpu: async commit support
drm/msm: async commit support
drm/msm: split power control from prepare/complete_commit
drm/msm: add kms->flush_commit()
...
|
||
|
|
b682242f60 |
- qcom : enable support for ipq8074, sm1850 and sm7180.
add child device node for qcs404.
misc fixes.
- mediatek : enable support for mt8183.
misc rejig of cmdq driver.
new client-reg dt property.
- armada: use device-managed registration api
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAl2CUw8ACgkQf9lkf8eY
P5XWdQ/+JMGoG8nbTkFdvgnRXvxdtZLylOTotnEpYtIOQ6qAckkOc0rGih3qXXRq
5FUCynImnx0Pqjso8ny8xSqfGy2B1f87tg+GD2r38XjLPo+5gJMkd5aCZ4JtEKZQ
ms+23pPXCLhh6bej6WW3fmuwk8T3USWfGGhRFQOHN9e152dThXt3vvLo40vy/GD5
xT2qChONXmyPrG1F3qJhGcHuiubBzZ2mxfEC294PyVwWKdaJ5StlBmSQpomJsJP3
v04SNI8P/gMtNhFfIVks9Hj1eu2PlO7p+4DpyhBDQii5Dzv+bSnJHIJch6DOYdou
h1aezWGHdJ5IcJTZcKVq0a8wyCoOGFU6znQQKRDtIdpgoDfGVmIe2bheFB4ePXOQ
XI9gsNGBrgS4uA5lJKJyJrAokXpTCiwA69c7UULRPKa0jbmVwbrJxxbLYL4k5euC
Qi6r3qPxvJ+3kYzegqtzHRYx9s+3Bt0CkHG8hv/XtETzM2Jg7TXy9yEF6d53jFAx
f0eU7PWdfM8TbQYGQ67BRYtSITaL8TgVafby5S1T9jLA5QnCAf4/TMCtJjxvCOVp
hMBm9JCnQ2U9c8geGkcU51Oz78sdTByE+q0Rzw6C9jFQxECRiSC/a7tvI7Pkui4y
w9UpCJNfypGHi+WT/UuCePi2JlnPRVCquKR2TEb8BZQKTEV4owk=
=V6QY
-----END PGP SIGNATURE-----
Merge tag 'mailbox-v5.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration
Pull mailbox updates from Jassi Brar:
- qcom:
- enable support for ipq8074, sm1850 and sm7180
- add child device node for qcs404
- misc fixes
- mediatek:
- enable support for mt8183
- misc rejig of cmdq driver
- new client-reg dt property
- armada:
- use device-managed registration api
* tag 'mailbox-v5.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
mailbox: qcom-apcs: fix max_register value
mailbox: qcom: Add support for IPQ8074 APCS
dt-bindings: mailbox: qom: Add ipq8074 APPS compatible
mailbox: qcom: Add support for Qualcomm SM8150 and SC7180 SoCs
dt-bindings: mailbox: Add APSS shared for SM8150 and SC7180 SoCs
mbox: qcom: replace integer with valid macro
mbox: qcom: add APCS child device for QCS404
mailbox: mediatek: cmdq: clear the event in cmdq initial flow
mailbox: mediatek: cmdq: support mt8183 gce function
mailbox: mediatek: cmdq: move the CMDQ_IRQ_MASK into cmdq driver data
dt-binding: gce: add binding for gce client reg property
dt-binding: gce: add gce header file for mt8183
dt-binding: gce: remove thread-num property
mailbox: armada-37xx-rwtm: Use device-managed registration API
|
||
|
|
6058f11870 |
mailbox: mediatek: cmdq: clear the event in cmdq initial flow
GCE hardware stored event information in own internal sysram,
if the initial value in those sysram is not zero value
it will cause a situation that gce can wait the event immediately
after client ask gce to wait event but not really trigger the
corresponding hardware.
In order to make sure that the wait event function is
exactly correct, we need to clear the sysram value in
cmdq initial flow.
Fixes:
|
||
|
|
399eb9b6cb |
ARM: SoC driver updates for v5.4
The branch contains driver changes that are tightly
connected to SoC specific code. Aside from smaller
cleanups and bug fixes, here is a list of the notable
changes.
New device drivers:
- The Turris Mox router has a new "moxtet" bus driver
for its on-board pluggable extension bus. The
same platform also gains a firmware driver.
- The Samsung Exynos family gains a new Chipid driver
exporting using the soc device sysfs interface
- A similar socinfo driver for Qualcomm Snapdragon
chips.
- A firmware driver for the NXP i.MX DSP IPC protocol
using shared memory and a mailbox
Other changes:
- The i.MX reset controller driver now supports the
NXP i.MX8MM chip
- Amlogic SoC specific drivers gain support for
the S905X3 and A311D chips
- A rework of the TI Davinci framebuffer driver to
allow important cleanups in the platform code
- A couple of device drivers for removed ARM SoC
platforms are removed. Most of the removals were
picked up by other maintainers, this contains
whatever was left.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJdf6SUAAoJEJpsee/mABjZAfwP/01bXBOlGVusNH2zuh8IUSHb
//5sTdWpwa2ugRekLOJUOjo2p9Fu70yH6xr4RUHI0rcRjZA0xR3bZPx45gI8LRHQ
tfb25LaKqfgZjWMCJ8due1Lh7B6ffOQukryMtM/LoiCtqsy7b6aThEKaLpM9/Owl
t53o4wKaVQJK5He9JQom9NOZidkl7tYLHmDQTOXhX2UEA/i45vtfjdsEBvoFPbTx
+bYvlqs+SWlpDJk29j+oBOeKadPF+TFboLDiUCxH44MC3OsH51zjtKVBRTtbNMkb
ek/ci5x9hCeHcYSEigNq2EMzEln09Yxyvjk8U/jLiJ1h1kz3p5MjqJbVMF1rYXpe
ALuAwinM8Zv2o5/UOCkiQTWq79PtpOKHZKpNBXkaJ8kyqBLMSy8Fs3hCvXrDnjnQ
TC8jX7UBqHRV2rbQIYehAQAxTvcRgTbqusQGLkUJInlux6go57LoMYHPABpHftJV
kRdVeT0KzdCz1pvQwyekIog5hPLNTBi4jw6eQcOgeENvAea1MJa8lMMfKcVbIdS0
ZVvxLl+K6noEKAv5lSeHAzjXq+cQFr3zDCsWy351mJETDHmE8zjsaHN1SgbRYLEk
ZqzNwUYaPYBis38g85qaY/TSsJrWJ+jP8u7s9HTw3Oywg8SRy5vtW177s00/9VOd
PYZ2UpqUeX8cdvggqUUU
=lxFi
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"This contains driver changes that are tightly connected to SoC
specific code. Aside from smaller cleanups and bug fixes, here is a
list of the notable changes.
New device drivers:
- The Turris Mox router has a new "moxtet" bus driver for its
on-board pluggable extension bus. The same platform also gains a
firmware driver.
- The Samsung Exynos family gains a new Chipid driver exporting using
the soc device sysfs interface
- A similar socinfo driver for Qualcomm Snapdragon chips.
- A firmware driver for the NXP i.MX DSP IPC protocol using shared
memory and a mailbox
Other changes:
- The i.MX reset controller driver now supports the NXP i.MX8MM chip
- Amlogic SoC specific drivers gain support for the S905X3 and A311D
chips
- A rework of the TI Davinci framebuffer driver to allow important
cleanups in the platform code
- A couple of device drivers for removed ARM SoC platforms are
removed. Most of the removals were picked up by other maintainers,
this contains whatever was left"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (123 commits)
bus: uniphier-system-bus: use devm_platform_ioremap_resource()
soc: ti: ti_sci_pm_domains: Add support for exclusive and shared access
dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access
firmware: ti_sci: Allow for device shared and exclusive requests
bus: imx-weim: remove incorrect __init annotations
fbdev: remove w90x900/nuc900 platform drivers
spi: remove w90x900 driver
net: remove w90p910-ether driver
net: remove ks8695 driver
firmware: turris-mox-rwtm: Add sysfs documentation
firmware: Add Turris Mox rWTM firmware driver
dt-bindings: firmware: Document cznic,turris-mox-rwtm binding
bus: moxtet: fix unsigned comparison to less than zero
bus: moxtet: remove set but not used variable 'dummy'
ARM: scoop: Use the right include
dt-bindings: power: add Amlogic Everything-Else power domains bindings
soc: amlogic: Add support for Everything-Else power domains controller
fbdev: da8xx: use resource management for dma
fbdev: da8xx-fb: drop a redundant if
fbdev: da8xx-fb: use devm_platform_ioremap_resource()
...
|
||
|
|
45b659ee75 |
firmware: ti_sci: Allow for device shared and exclusive requests
Sysfw provides an option for requesting exclusive access for a device using the flags MSG_FLAG_DEVICE_EXCLUSIVE. If this flag is not used, the device is meant to be shared across hosts. Once a device is requested from a host with this flag set, any request to this device from a different host will be nacked by sysfw. Current tisci driver enables this flag for every device requests. But this may not be true for all the devices. So provide a separate commands in driver for exclusive and shared device requests. Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
|
957af18f05 |
cmdq helper:
reoder function parameter and change size of the parameters -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAl1gFdEXHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00NTzg/9EfnagKDnyXEBe0EgoembiKKC O1gOLNeMIRFeGo0N3oGz1Mwxyzf4QOHWsB8omrB2Ss/gt09/Zoyxq7WHxnBEuhMq AHZmdfVDTG4JxTHcClPg4O5PLY9zmk8wZBWwkyn1NOv5EKe1mGjai/0dyyh3WoHR VI6BUq+sTA2nliIaTll6BAX3IABY1tqclmmcndF6U0Os9OT6yb1T9Qka96z2j3L+ uWMlE417LNAbK4t14h+Pem6Kik2qn5T0o+U1S6oqMmqVlYzTFUxiRGX+wb8P5nmU uEMsh1esczgTo5JBPjzRe3OLN4em7DZwOXbfp1baHxOyDINtt/FyuQmdPorVHGXi vOixSCigh7Dx61myI4bQS0booHN/KxJDjs02G01XYUzqBH6pyH+uKJBaR3zWzQqo Ea5HxWf7VHvPX+ZZJm/vusVqzQO1OomY3DNBJ9FGrPaHpptWgyfdVykfNtTPLcuL GaHa6HMXsX92SaFU/uovJ7lCI4XkfzbFhhiPopEeTRL2J6QeewqI2FfYvnQsJigE Ok9GXDaiy5nylQiBITFioGQ4P3ILzbK4RmozBmBGlwVILqet4IhkgB0DoouNH9iS RkV4mAxqKvOcwogLUKYNMlzW/5fvMxcq/BGNBzmJFQAJvLSLQc+j7hJ3qFkZe0CJ 8m+qKI1T2Au/hrzzkIw= =WH2P -----END PGP SIGNATURE----- Merge tag 'v5.3-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers cmdq helper: reoder function parameter and change size of the parameters * tag 'v5.3-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: soc: mediatek: cmdq: change the type of input parameter soc: mediatek: cmdq: reorder the parameter Link: https://lore.kernel.org/r/8c860e37-3816-d75f-fc37-ce496905ba73@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
|
556030f060 |
soc: mediatek: cmdq: change the type of input parameter
According to the cmdq hardware design, the subsys is u8, the offset is u16 and the event id is u16. This patch changes the type of subsys, offset and event id to the correct type. Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
||
|
|
1a92f98912 |
soc: mediatek: cmdq: reorder the parameter
The order of gce instructions is [subsys offset value] so reorder the parameter of cmdq_pkt_write_mask and cmdq_pkt_write function. Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
||
|
|
ffba29c9eb |
serial: lpc32xx: allow compile testing
The lpc32xx_loopback_set() function in hte lpc32xx_hs driver is the one thing that relies on platform header files. Move that into the core platform code so we only need a variable declaration for it, and enable COMPILE_TEST building. Link: https://lore.kernel.org/r/20190809144043.476786-12-arnd@arndb.de Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
|
ecca1a6277 |
net: lpc-enet: move phy setup into platform code
Setting the phy mode requires touching a platform specific register, which prevents us from building the driver without its header files. Move it into a separate function in arch/arm/mach/lpc32xx to hide the core registers from the network driver. Link: https://lore.kernel.org/r/20190809144043.476786-8-arnd@arndb.de Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
|
9dc03ffd99 |
net: lpc-enet: factor out iram access
The lpc_eth driver uses a platform specific method to find the internal sram. This prevents building it on other machines. Rework to only use one function call and keep the other platform internals where they belong. Ideally this would look up the sram location from DT, but as this is a rarely used driver, I want to keep the modifications to a minimum. Link: https://lore.kernel.org/r/20190809144043.476786-7-arnd@arndb.de Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
|
40d8aff614 |
soc: samsung: chipid: Convert exynos-chipid driver to use the regmap API
Convert the driver to use regmap API in order to allow other drivers, like ASV, to access the CHIPID registers. Add definition of selected CHIPID register offsets and register bit fields for Exynos5422 SoC. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> |
||
|
|
03b0f2ce73 |
Linus 5.3-rc1
-----BEGIN PGP SIGNATURE----- iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAl0006weHHRvcnZhbGRz QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGaDUIAJ4oTyVWpMRZkfG6 vVY8qVMU3zlzEqRiyLYjkXoe/mGpuU/UVTyyStllxZ+Gg9da0mGwlugScKriPJof 4KRUDDTGX5DrfEOo+0brKvM+PYh9uGViPgKXzyv7i6BrnX2z3JdBR4bKNuEYlAJ9 N93Qg7v05SBHIq2Gfp3klrdWbsTTW2EaDTLbcgifXLnfKyFr47kwsmXAHPlTFP0p dYsZHHmf14Y9n1+ToZeVINgjQFr6mFn6ygY/PqTnd6vCgEEfP9eENJ4BZCtN1ZL/ V0BO9MyJ5iZV0AfwSEKydk+kDEvO16TG/nyDrECVuur7AXsBx18ZplVc787f6GK+ dyCQJ3U= =XLAF -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXTYRHQAKCRDj7w1vZxhR xY5IAQC0H/r62rlFq+JpbmksutMqvIferowP7HUk6yOaAKdVawD/c1qsTk/xxI0x StrxRCDqeGA7D2R/ZNb/4sobnn7+oAM= =k9CF -----END PGP SIGNATURE----- Merge v5.3-rc1 into drm-misc-next Noralf needs some SPI patches in 5.3 to merge some work on tinydrm. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> |
||
|
|
8362fd64f0 |
ARM: SoC-related driver updates
Various driver updates for platforms and a couple of the small driver
subsystems we merge through our tree:
- A driver for SCU (system control) on NXP i.MX8QXP
- Qualcomm Always-on Subsystem messaging driver (AOSS QMP)
- Qualcomm PM support for MSM8998
- Support for a newer version of DRAM PHY driver for Broadcom (DPFE)
- Reset controller support for Bitmain BM1880
- TI SCI (System Control Interface) support for CPU control on AM654
processors
- More TI sysc refactoring and rework
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl0yK3YPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3WdUQAJEFRzY4+8VfsUspKmGwzHsrk7t1038JUEDE
VL3yYlvSGeHg5a58AI5PCR5ZCsyPK7Yw9cAcYexd0frFR7BCwKWrjqem0Lb5ovdK
CYM517DRtYPSBMF08Xw4pbZlT0yg65F1e9cf6BlUpkUZ6lJn4gUy8Y4BE6Aw/zuF
QKtQNs6Q8BUZqS3uoOpJ/PY4JiUmLPQPO4Lry7Lud8Z7qgArCC326paC3wwqjLoC
TpoMqb6izt7Vzo4BtTo5TUCyiEFZDlb/thhDySVlYRE7DQJusHBvRO9qgjI2ahOo
1/935q1fJO7S6+Yvc8DIzrD/DrIUOvOshi31F/J6iWKkQkTUxtQwsVReZKaiOfSD
fYxNVCgTcMS6ailKQSMQ0SYgXDa2gWdV3tS9XU8qML3tnDthi1nDmZks0QAAnFPS
bXRcWGtgqeQJ+QJ7yyKrsD9POeaq3Hc5/f1DN34H//Cyn0ip/fD6fkLCMIfUDwmu
TmO2Mnj6/fG/iBK+ToF+DaJ0/u3RiV2MC2vCE+0m3cVI9jtq9iA1y3UlmoaKUhhC
t9znA+u8/Jc5S2zNQriI2Ja5q8nKfihL7Jf68ENvGzLc7YuAqP6yx1LMg1g6Wshc
nLT+kHOF6DCUC3W7a8VuNyaxCwVtTbNTti+nvQVOmV6eaGiD5vzpXkHBWMbOJ7Lh
YOBwGyb4
=ek+j
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC-related driver updates from Olof Johansson:
"Various driver updates for platforms and a couple of the small driver
subsystems we merge through our tree:
- A driver for SCU (system control) on NXP i.MX8QXP
- Qualcomm Always-on Subsystem messaging driver (AOSS QMP)
- Qualcomm PM support for MSM8998
- Support for a newer version of DRAM PHY driver for Broadcom (DPFE)
- Reset controller support for Bitmain BM1880
- TI SCI (System Control Interface) support for CPU control on AM654
processors
- More TI sysc refactoring and rework"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (84 commits)
reset: remove redundant null check on pointer dev
soc: rockchip: work around clang warning
dt-bindings: reset: imx7: Fix the spelling of 'indices'
soc: imx: Add i.MX8MN SoC driver support
soc: aspeed: lpc-ctrl: Fix probe error handling
soc: qcom: geni: Add support for ACPI
firmware: ti_sci: Fix gcc unused-but-set-variable warning
firmware: ti_sci: Use the correct style for SPDX License Identifier
soc: imx8: Use existing of_root directly
soc: imx8: Fix potential kernel dump in error path
firmware/psci: psci_checker: Park kthreads before stopping them
memory: move jedec_ddr.h from include/memory to drivers/memory/
memory: move jedec_ddr_data.c from lib/ to drivers/memory/
MAINTAINERS: Remove myself as qcom maintainer
soc: aspeed: lpc-ctrl: make parameter optional
soc: qcom: apr: Don't use reg for domain id
soc: qcom: fix QCOM_AOSS_QMP dependency and build errors
memory: tegra: Fix -Wunused-const-variable
firmware: tegra: Early resume BPMP
soc/tegra: Select pinctrl for Tegra194
...
|
||
|
|
fdcec00405 |
remoteproc updates for v5.3
This adds support for the STM32 remoteproc, additional i.MX platforms with Cortex M4 remoteprocs and Qualcomm's QCS404 Compute DSP. Initial support for vendor specific resource table entries and support for unprocessed Qualcomm firmware files. -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl0uGwsbHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FVhcQALBcuPOo2nBQEiOvgS79 0kVBSdUxw6+mI4EFLfQPeSTtGGrSK5/oZBmYhdv+HEDu6CLG1DS+6PZyCjhqdDsU xjeTIkfe4RDAwnqlGxqK7OyeslAUe91kr0FDaS0XyajhQ+urI8N9Ou/JQDEZKArl lpuxGmjWASeIbO3TC/p4OhyOU6yqqlyxlv9x/kJnF+PhDfdK1tezvgmLvCDtnD9y gtYMzSz9txQCXMJmUaDFeUrMph6/Eo2Zn9rYyen5fDzqAXBys7nfH2fbDcbNK1fy qgjWDjUxENeoZEuohIFn2Dg3egr6rF9TQQvM4uoAoKlS6+yEvTiE8g122BJxVGd3 BOmWK44hTpV1qAGfTivGOH3g/Q9pxI22a17t1BTxcHIYcmMBxERHAVRQ/wbwXRDp qEv4HUuvciMSjonf8pW3GuuOny9jeTird5q8e3gTNA/s6aESm/YoynwWF3LmNZBo XePc5sP4oz9HGJKS/SUu0/H6d1/YqOXOwVBmlTl4L0ErWOpaeGMinJQvSRHb0rL2 BgL8bADxFJGM0ITeIA5CpzZzbbbZSmPqxOBhcU+a/PnRL8zVWJOpSCMLe04vrQNT 9lVXAxmcRZjq80fbfyjqomyaT5N5Yvvv6dIz2AtCnAOEynHLnJq/dd5eX840l3RC 1wXvNF4l0rzYm0yYHr0+oQXQ =iqXq -----END PGP SIGNATURE----- Merge tag 'rproc-v5.3' of git://github.com/andersson/remoteproc Pull remoteproc updates from Bjorn Andersson: "This adds support for the STM32 remoteproc, additional i.MX platforms with Cortex M4 remoteprocs and Qualcomm's QCS404 Compute DSP. Also initial support for vendor specific resource table entries and support for unprocessed Qualcomm firmware files" * tag 'rproc-v5.3' of git://github.com/andersson/remoteproc: remoteproc: stm32: fix building without ARM SMCC remoteproc: qcom: q6v5-mss: Fix build error without QCOM_MDT_LOADER remoteproc: copy parent dma_pfn_offset for vdev remoteproc: qcom: q6v5-mss: Support loading non-split images soc: qcom: mdt_loader: Support loading non-split images remoteproc: stm32: add an ST stm32_rproc driver dt-bindings: remoteproc: add bindings for stm32 remote processor driver dt-bindings: stm32: add bindings for ML-AHB interconnect remoteproc: Use struct_size() helper remoteproc: add vendor resources handling remoteproc: imx: Fix typo in "failed" remoteproc: imx: Broaden the Kconfig selection logic remoteproc,rpmsg: add missing MAINTAINERS file entries remoteproc: qcom: qdsp6-adsp: Add support for QCS404 CDSP dt-bindings: remoteproc: Rename and amend Hexagon v56 binding |
||
|
|
916f562fb2 |
This round of clk driver and framework updates is heavy on the driver update
side. The two main highlights in the core framework are the addition of an bulk clk_get API that handles optional clks and an extra debugfs file that tells the developer about the current parent of a clk. The driver updates are dominated by i.MX in the diffstat, but that is mostly because that SoC has started converting to the clk_hw style of clk registration. The next big update is in the Amlogic meson clk driver that gained some support for audio, cpu, and temperature clks while fixing some PLL issues. Finally, the biggest thing that stands out is the conversion of a large part of the Allwinner sunxi-ng driver to the new clk parent scheme that uses less strings and more pointer comparisons to match clk parents and children up. In general, it looks like we have a lot of little fixes and tweaks here and there to clk data along with the normal addition of a handful of new drivers and a couple new core framework features. Core: - Add a 'clk_parent' file in clk debugfs - Add a clk_bulk_get_optional() API (with devm too) New Drivers: - Support gated clk controller on MIPS based BCM63XX SoCs - Support SiLabs Si5341 and Si5340 chips - Support for CPU clks on Raspberry Pi devices - Audsys clock driver for MediaTek MT8516 SoCs Updates: - Convert a large portion of the Allwinner sunxi-ng driver to new clk parent scheme - Small frequency support for SiLabs Si544 chips - Slow clk support for AT91 SAM9X60 SoCs - Remove dead code in various clk drivers (-Wunused) - Support for Marvell 98DX1135 SoCs - Get duty cycle of generic pwm clks - Improvement in mmc phase calculation and cleanup of some rate defintions - Switch i.MX6 and i.MX7 clock drivers to clk_hw based APIs - Add GPIO, SNVS and GIC clocks for i.MX8 drivers - Mark imx6sx/ul/ull/sll MMDC_P1_IPG and imx8mm DRAM_APB as critical clock - Correct imx7ulp nic1_bus_clk and imx8mm audio_pll2_clk clock setting - Add clks for new Exynos5422 Dynamic Memory Controller driver - Clock definition for Exynos4412 Mali - Add CMM (Color Management Module) clocks on Renesas R-Car H3, M3-N, E3, and D3 - Add TPU (Timer Pulse Unit / PWM) clocks on Renesas RZ/G2M - Support for 32 bit clock IDs in TI's sci-clks for J721e SoCs - TI clock probing done from DT by default instead of firmware - Fix Amlogic Meson mpll fractional part and spread sprectrum issues - Add Amlogic meson8 audio clocks - Add Amlogic g12a temperature sensors clocks - Add Amlogic g12a and g12b cpu clocks - Add TPU (Timer Pulse Unit / PWM) clocks on Renesas R-Car H3, M3-W, and M3-N - Add CMM (Color Management Module) clocks on Renesas R-Car M3-W - Add Clock Domain support on Renesas RZ/N1 -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAl0uBEERHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSWucw/9ELKlfvdxrc8mdIuzt+CpKdNiSG88shXY hF+vnuE6Jhv5hmlbA/DbplPTAnHT/FQF65/GPQMAYy2wYO6CjleNxQyepiVv4h8/ tWoXu5vYZXubtQyMnYTffREzjYFPBNAscLUhXNwJKRno7nT0qKCk62WgOMfaW/KN lP5dKmrL7rdJDUvxHEStrwP515Lg5Wkhj3+XzgbgFUKGuGlvHfwUOEZucT++kqhu Z1vMjPv2ksHQf3r15BsbX/6jMIONEt2Xd6jA3Lm7ebDXJl2hjX4Gq0Kkl5pmkj2w F0V7Tw4XYk6DkSl7HQaOBgQ8KV0Mw2L8Vj6eEDhUwx6wPGlQ5YTKkUCJkjs0mUyb UpO3TuPFN2W0hsTNDzwYpjqcfodDn159XJcduv1/ZpIanUvHgx0uVzQ7iwwYwW+l VR4SipY5AEn9hpief30X7TAUSKsE4do58imYeoGBrq78zdsJaEcDAMX7AcYdXVQ9 ahBS8ME/d1JEBNdRsSW7eTAfu8dZdI08uR8/T37GRG59XyZSjsyVmZ6kHCYrBygF AyLNMsXMCbW1rOoIpWkuGMD86XZy40laLg8T7WWTaq28t1VQ0BaBTGM4/eEexs3p FhZ1M7aH+PsDLrI2IGTBt/4xAMv+dhDS7HnxRlOONbWnLWVqmR+tYzF0aCkqJCmd O2zWCGffeYs= =mK0C -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "This round of clk driver and framework updates is heavy on the driver update side. The two main highlights in the core framework are the addition of an bulk clk_get API that handles optional clks and an extra debugfs file that tells the developer about the current parent of a clk. The driver updates are dominated by i.MX in the diffstat, but that is mostly because that SoC has started converting to the clk_hw style of clk registration. The next big update is in the Amlogic meson clk driver that gained some support for audio, cpu, and temperature clks while fixing some PLL issues. Finally, the biggest thing that stands out is the conversion of a large part of the Allwinner sunxi-ng driver to the new clk parent scheme that uses less strings and more pointer comparisons to match clk parents and children up. In general, it looks like we have a lot of little fixes and tweaks here and there to clk data along with the normal addition of a handful of new drivers and a couple new core framework features. Core: - Add a 'clk_parent' file in clk debugfs - Add a clk_bulk_get_optional() API (with devm too) New Drivers: - Support gated clk controller on MIPS based BCM63XX SoCs - Support SiLabs Si5341 and Si5340 chips - Support for CPU clks on Raspberry Pi devices - Audsys clock driver for MediaTek MT8516 SoCs Updates: - Convert a large portion of the Allwinner sunxi-ng driver to new clk parent scheme - Small frequency support for SiLabs Si544 chips - Slow clk support for AT91 SAM9X60 SoCs - Remove dead code in various clk drivers (-Wunused) - Support for Marvell 98DX1135 SoCs - Get duty cycle of generic pwm clks - Improvement in mmc phase calculation and cleanup of some rate defintions - Switch i.MX6 and i.MX7 clock drivers to clk_hw based APIs - Add GPIO, SNVS and GIC clocks for i.MX8 drivers - Mark imx6sx/ul/ull/sll MMDC_P1_IPG and imx8mm DRAM_APB as critical clock - Correct imx7ulp nic1_bus_clk and imx8mm audio_pll2_clk clock setting - Add clks for new Exynos5422 Dynamic Memory Controller driver - Clock definition for Exynos4412 Mali - Add CMM (Color Management Module) clocks on Renesas R-Car H3, M3-N, E3, and D3 - Add TPU (Timer Pulse Unit / PWM) clocks on Renesas RZ/G2M - Support for 32 bit clock IDs in TI's sci-clks for J721e SoCs - TI clock probing done from DT by default instead of firmware - Fix Amlogic Meson mpll fractional part and spread sprectrum issues - Add Amlogic meson8 audio clocks - Add Amlogic g12a temperature sensors clocks - Add Amlogic g12a and g12b cpu clocks - Add TPU (Timer Pulse Unit / PWM) clocks on Renesas R-Car H3, M3-W, and M3-N - Add CMM (Color Management Module) clocks on Renesas R-Car M3-W - Add Clock Domain support on Renesas RZ/N1" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (190 commits) clk: consoldiate the __clk_get_hw() declarations clk: sprd: Add check for return value of sprd_clk_regmap_init() clk: lochnagar: Update DT binding doc to include the primary SPDIF MCLK clk: Add Si5341/Si5340 driver dt-bindings: clock: Add silabs,si5341 clk: clk-si544: Implement small frequency change support clk: add BCM63XX gated clock controller driver devicetree: document the BCM63XX gated clock bindings clk: at91: sckc: use dedicated functions to unregister clock clk: at91: sckc: improve error path for sama5d4 sck registration clk: at91: sckc: remove unnecessary line clk: at91: sckc: improve error path for sam9x5 sck register clk: at91: sckc: add support to free slow clock osclillator clk: at91: sckc: add support to free slow rc oscillator clk: at91: sckc: add support to free slow oscillator clk: rockchip: export HDMIPHY clock on rk3228 clk: rockchip: add watchdog pclk on rk3328 clk: rockchip: add clock id for hdmi_phy special clock on rk3228 clk: rockchip: add clock id for watchdog pclk on rk3328 clk: at91: sckc: add support for SAM9X60 ... |
||
|
|
66620f48cb |
drm/meson: drop use of drmP.h
Drop use of the deprecated drmP.h header. While doing so used the opportunity to clean up a little so includes are now sorted and removed unused include files. In a few cases added some forwards to allow header files to built in different include order. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Emil Velikov <emil.velikov@collabora.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Maxime Jourdan <mjourdan@baylibre.com> Cc: Jerome Brunet <jbrunet@baylibre.com> Cc: linux-amlogic@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Link: https://patchwork.freedesktop.org/patch/msgid/20190716064220.18157-2-sam@ravnborg.org |
||
|
|
498b98e939 |
soc: qcom: mdt_loader: Support loading non-split images
In some software releases the firmware images are not split up with each loadable segment in it's own file. Check the size of the loaded firmware to see if it still contains each segment to be loaded, before falling back to the split-out segments. Acked-by: Andy Gross <agross@kernel.org> Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> |
||
|
|
6c249cc7a7 |
SOC: TI SCI updates for v5.3
- Couple of fixes to handle resource ranges and requesting response always from firmware; - Add processor control - Add support APIs for DMA - Fix the SPDX license plate - Unused varible warning fix -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJdCbr2AAoJEHJsHOdBp5c/WSsQAJ+QuiyzelsR9ubiVR/zOTC9 yNIl6pNIX5fPtvOu4y4iMurtBiEhO5F9Gxm88ROKd+5nelAwdXRgaFNNPdD6i0QU ugeXgcDeIK7qEIB2b2NyqVM9QHKteKYYyBw4YOKv9stG9kwY83AAIJJv6DalZ4eg rAftljxKMhNcdEGdWPVK17rCZbXIhfgYiOhR6zStwYOwTOedS+GnOrvRRd3NACxD Jip907pSkl2JBkcpZFKg/cwIAxdUX8jRxewys8qLRLEK4vk4C+dVGRdR+17YBLYx 36maCMzJdkFMPGZ+rrUPBn/osOuDpReZB+driwLBpUjDYah2PnUAgzulsfqeRaIw ld8wECo6DihG2I3sRDe6F7vM7KCMCtAx8Wk4AqBcbJEzedD4IkqU769m1/alPmg3 gSEXF34XTiMncb+g1e4oEGreaoFbEc6vY/+2EDCm7KS0T6/+TwalJfSRr/HFmSZl deSigH7+mnMgXXIaOGi7/1skwVKcPjPP89fulTuwtDwb+QMvkahoQxQzuPUPJPNL 8m+1LyYLjAoxNamy1/GksQrwAksChSoO4F9QmGxcJImifGS/fjOkxS45+6JycKMZ 5GofKjqXmJeV8XVt55AV4kdWavxH8oA+IBBiS+/uLEZLeRcgmUcV9cUVJnrAAogQ 2VknBlpMQyz5iH/hQ6GN =LAdf -----END PGP SIGNATURE----- Merge tag 'drivers_soc_for_5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers SOC: TI SCI updates for v5.3 - Couple of fixes to handle resource ranges and requesting response always from firmware; - Add processor control - Add support APIs for DMA - Fix the SPDX license plate - Unused varible warning fix * tag 'drivers_soc_for_5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: firmware: ti_sci: Fix gcc unused-but-set-variable warning firmware: ti_sci: Use the correct style for SPDX License Identifier firmware: ti_sci: Parse all resource ranges even if some is not available firmware: ti_sci: Add support for processor control firmware: ti_sci: Add resource management APIs for ringacc, psi-l and udma firmware: ti_sci: Always request response from firmware Signed-off-by: Olof Johansson <olof@lixom.net> |
||
|
|
1e407f337f |
firmware: ti_sci: Add support for processor control
Texas Instrument's System Control Interface (TI-SCI) Message Protocol is used in Texas Instrument's System on Chip (SoC) such as those in K3 family AM654 SoC to communicate between various compute processors with a central system controller entity. The system controller provides various services including the control of other compute processors within the SoC. Extend the TI-SCI protocol support to add various TI-SCI commands to invoke services associated with power and reset control, and boot vector management of the various compute processors from the Linux kernel. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com> |
||
|
|
68608b5e50 |
firmware: ti_sci: Add resource management APIs for ringacc, psi-l and udma
Configuration of NAVSS resource, like rings, UDMAP channels, flows and PSI-L thread management need to be done via TISCI. Add the needed structures and functions for NAVSS resource configuration of the following: Rings from Ring Accelerator PSI-L thread management UDMAP tchan, rchan and rflow configuration. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com> |
||
|
|
81f4458c9c |
firmware: ti_sci: extend clock identifiers from u8 to u32
Future SoCs are going to have more than 255 device clocks in certain cases, and thus the API must be extended to support this. The support is done in backwards compatible extension, in which the new u32 clock identifier fields are only used if the existing u8 size clock identifier is set as 255. In all the other cases, the existing u8 clock identifier is used. As the size of the messages sent / received is not verified for existing devices / old firmware, increasing the size of the messages from the end is also fine. Due to this reason, depending on ABI version isn't necessary either. Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Tero Kristo <t-kristo@ti.com> |
||
|
|
25763b3c86 |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 206
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of version 2 of the gnu general public license as published by the free software foundation extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 107 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528171438.615055994@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
||
|
|
d9351ea14d |
Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull IRQ chip updates from Ingo Molnar:
"A late irqchips update:
- New TI INTR/INTA set of drivers
- Rewrite of the stm32mp1-exti driver as a platform driver
- Update the IOMMU MSI mapping API to be RT friendly
- A number of cleanups and other low impact fixes"
* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (34 commits)
iommu/dma-iommu: Remove iommu_dma_map_msi_msg()
irqchip/gic-v3-mbi: Don't map the MSI page in mbi_compose_m{b, s}i_msg()
irqchip/ls-scfg-msi: Don't map the MSI page in ls_scfg_msi_compose_msg()
irqchip/gic-v3-its: Don't map the MSI page in its_irq_compose_msi_msg()
irqchip/gicv2m: Don't map the MSI page in gicv2m_compose_msi_msg()
iommu/dma-iommu: Split iommu_dma_map_msi_msg() in two parts
genirq/msi: Add a new field in msi_desc to store an IOMMU cookie
arm64: arch_k3: Enable interrupt controller drivers
irqchip/ti-sci-inta: Add msi domain support
soc: ti: Add MSI domain bus support for Interrupt Aggregator
irqchip/ti-sci-inta: Add support for Interrupt Aggregator driver
dt-bindings: irqchip: Introduce TISCI Interrupt Aggregator bindings
irqchip/ti-sci-intr: Add support for Interrupt Router driver
dt-bindings: irqchip: Introduce TISCI Interrupt router bindings
gpio: thunderx: Use the default parent apis for {request,release}_resources
genirq: Introduce irq_chip_{request,release}_resource_parent() apis
firmware: ti_sci: Add helper apis to manage resources
firmware: ti_sci: Add RM mapping table for am654
firmware: ti_sci: Add support for IRQ management
firmware: ti_sci: Add support for RM core ops
...
|
||
|
|
49b323157b |
soc: ti: Add MSI domain bus support for Interrupt Aggregator
With the system coprocessor managing the range allocation of the inputs to Interrupt Aggregator, it is difficult to represent the device IRQs from DT. The suggestion is to use MSI in such cases where devices wants to allocate and group interrupts dynamically. Create a MSI domain bus layer that allocates and frees MSIs for a device. APIs that are implemented: - ti_sci_inta_msi_create_irq_domain() that creates a MSI domain - ti_sci_inta_msi_domain_alloc_irqs() that creates MSIs for the specified device and resource. - ti_sci_inta_msi_domain_free_irqs() frees the irqs attached to the device. - ti_sci_inta_msi_get_virq() for getting the virq attached to a specific event. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
||
|
|
032a1ec549 |
firmware: ti_sci: Add helper apis to manage resources
Each resource with in the device can be uniquely identified as defined by TISCI. Since this is generic across the devices, resource allocation also can be made generic instead of each client driver handling the resource. So add helper apis to manage the resource. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
||
|
|
997b001f6b |
firmware: ti_sci: Add support for IRQ management
TISCI abstracts the handling of IRQ routes where interrupt sources are not directly connected to host interrupt controller. Add support for the set of TISCI commands for requesting and releasing IRQs. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
||
|
|
9c19fb6895 |
firmware: ti_sci: Add support for RM core ops
TISCI provides support for getting the resources(IRQ, RING etc..) assigned to a specific device. These resources can be handled by the client and in turn sends TISCI cmd to configure the resources. It is very important that client should keep track on usage of these resources. Add support for TISCI commands to get resource ranges. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
||
|
|
905c30477f |
firmware: ti_sci: Add support to get TISCI handle using of_phandle
TISCI has been updated to have support for Resource management(like interrupts etc..). And there can be multiple device instances of a resource type in a SoC. So every driver corresponding to a resource type should get a TISCI handle so that it can make TISCI calls. And each DT node corresponding to a device should exist under its corresponding bus node as per the SoC architecture. But existing apis in TISCI library assumes that all TISCI users are child nodes of TISCI. Which is not true in the above case. So introduce (devm_)ti_sci_get_by_phandle() apis that can be used by TISCI users to get TISCI handle using of phandle property. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
||
|
|
1895ef4ef2 |
This modernizes the IXP4xx platform and adds initial Device Tree
Support. We migrate to MULTI_IRQ_HANDLER, bumps the IRQs to offset 16, converts to SPARSE_IRQ, then we add proper subsystem drivers in each subsystem for irqchip, GPIO and clocksource and switch over to using these new drivers. Next we modernize the NPE and QMGR drivers and push them down into drivers/soc. This has been tested on the IXP4xx NSLU2 and the Gateworks GW2358-4. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJcvxsRAAoJEEEQszewGV1zZE8QAIrpxZGGKUv7o/NrtR2J8CLR jl7cm8Rx+TVlowEz4Un2erhMEFEIp91DeKsN76fBaAszmogbuck1u+ZiArpL7u12 sJzYwQUqyCuGFQbiOIu1PyYCCGebVvZYvYjoEDzt5GOp5rCNh6xsP9eDQe7F8ZgE 60iKiLEp+U3VQXB7+/KdvIpVVM2V7wJyKHtKkZVsTEH0iKsTy6yormBZc3r/a1Ka 7fZDLC6KLtaQ95YpqL+L/ZZNickj/J2wqnVuh4GrzsJ5m9GphoUfD2X3jtuQyjo/ VlHy7mEmWAvS68lQXNibXLi9h8tNr9XApRDH/snoLRq4KKM8P30OgZMc28IWBqwZ CqbxfN9++ffZBt5udY3Jfdsj3lgDOMjBzvfIJpQxLbFCfTaQWtBZ5KaILGdcCuFH TdCUT5tS/G7XUlsAkFQc1ubseYl3PmGgBrTh6N150hNH45xsuniaBUv/RgltA7ZY Q437ctUs5IySPOm3dPzgHQwqC1TN/LuHX3fbQwcgj792iZhn5hExazmgLYGwzy/l vLM9izG7NerZQgpspaUq1jeCPVVCsZ2q/n8vWD7beBLWTo7bZhg0uLXQOwR/9ITc B5vC0h9Fe9O732ZZY5FgJXYgUkQ9fRjN/lMv6RWgPlc6/r8eQZ+OimAprpmB96Gu 2IfYAFI4lZDS/nJL9FmF =0U95 -----END PGP SIGNATURE----- Merge tag 'ixp4xx-for-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/soc This modernizes the IXP4xx platform and adds initial Device Tree Support. We migrate to MULTI_IRQ_HANDLER, bumps the IRQs to offset 16, converts to SPARSE_IRQ, then we add proper subsystem drivers in each subsystem for irqchip, GPIO and clocksource and switch over to using these new drivers. Next we modernize the NPE and QMGR drivers and push them down into drivers/soc. This has been tested on the IXP4xx NSLU2 and the Gateworks GW2358-4. * tag 'ixp4xx-for-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: (31 commits) ARM: dts: Add queue manager and NPE to the IXP4xx DTSI soc: ixp4xx: qmgr: Add DT probe code soc: ixp4xx: qmgr: Add DT bindings for IXP4xx qmgr soc: ixp4xx: npe: Add DT probe code soc: ixp4xx: Add DT bindings for IXP4xx NPE soc: ixp4xx: qmgr: Pass resources soc: ixp4xx: Remove unused functions soc: ixp4xx: Uninline several functions soc: ixp4xx: npe: Pass addresses as resources ARM: ixp4xx: Turn the QMGR into a platform device ARM: ixp4xx: Turn the NPE into a platform device ARM: ixp4xx: Move IXP4xx QMGR and NPE headers ARM: ixp4xx: Move NPE and QMGR to drivers/soc ARM: dts: Add some initial IXP4xx device trees ARM: ixp4xx: Add device tree boot support ARM: ixp4xx: Add DT bindings gpio: ixp4xx: Add OF probing support gpio: ixp4xx: Add DT bindings clocksource/drivers/ixp4xx: Add OF initialization support clocksource/drivers/ixp4xx: Add DT bindings ... Signed-off-by: Olof Johansson <olof@lixom.net> |
||
|
|
67e38f578a |
ARM: ep93xx: move pinctrl interfaces into include/linux/soc
ep93xx does not have a proper pinctrl driver, but does things ad-hoc through mach/platform.h, which is also used for setting up the boards. To avoid using mach/*.h headers completely, let's move the interfaces into include/linux/soc/. This is far from great, but gets the job done here, without the need for a proper pinctrl driver. Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Olof Johansson <olof@lixom.net> |
||
|
|
d08502f245 |
soc: ixp4xx: Uninline several functions
These inline functions immediately exploit the static ioremaps for the queue manager memory region. This does not work with multiplatform where everything need to be dynamically remapped, so get rid of these inlines and create new exports for those used by other drivers. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
||
|
|
0b458d7b10 |
soc: ixp4xx: npe: Pass addresses as resources
Instead of using hardcoded base addresses implicitly obtained through <linux/io.h>, pass the physical base for the three NPE blocks as memory resources and remap these in the driver. Drop the memory request region business, this will anyways be done by devm_* remapping functions. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
||
|
|
4af20dc583 |
ARM: ixp4xx: Move IXP4xx QMGR and NPE headers
This moves the IXP4xx Queue Manager and Network Processing Engine headers out of the <mack/*> include path as that is incompatible with multiplatform. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
||
|
|
72d1cd0331 |
qcom: soc: llcc-slice: Clear the global drv_data pointer on error
Currently the data structure for llc-slice is devm allocated and stored as a global but never cleared if the probe function fails. This is a problem because devm managed memory gets freed on probe failure the API functions could access the pointer after it has been freed. Initialize the drv_data pointer to an error and reset it to an error on probe failure or device destroy and add protection to the API functions to make sure the memory doesn't get accessed. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org> |
||
|
|
8986f4c217 |
add helper functions to create and send commands to
the global command engine (GCE) device using the command queue driver (cmdq). -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAlwNjZQXHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00Ps4hAApGe/nRj5kZgmnLpMqXlWtH82 Qr1+hP8UKPtLxM5YuoY4iF75QzwzMtxMbPLyhIt5ySnorLQu2E/Lya2drsTzS+Xr /3mHd3V5OVGwTk4KzN+tL5SSIB3MdMzWtVxfZ9iXKhJU8T0hgZKo+PTR6bjLMyj0 Fx3arobOhSuG0GnwdQhDZzECJsmblCSTYiDJeO/5o+4RWee4UI4j4uC4aFZ5X0/w hng05kutwV+g6DCDrXJXq/jL572G0hJt4Vs3PIfXuWfpMGbAwhvGQ9KrYNAskopA 9lOrM45ZsGslpB23+zUYzEc1x9vC3BJcnKH2SXVez2fSmNtR4z/9Zpmc+/nzUKz4 Jd6bqQBHKf6mr9H5V4Y3DF3wqXva36hfFfhCM0fcy9UKy2WmCjT3R4FxmEdC/pPd wSjOFUNrPS4m859DNn6DRJM0cOOQPUTy//d62/P7CcLg0dESaRBPdBlIW/cCdGz/ 3NsGwvOIbhhTKRPRtZtvDOTjcRxq11Q68TblNnLaixr7V3Ut4tMRY6Y+UNwhbeZG ySJbAyiV0CvvMEYAYoCkxG3FRPN4cZm9kfITgeX+uMd34PP5oDMQLVdZITwmLlkg FxIBCVE+6qJ6v9ttu9YNOU+ryhGjLohZoHiDDuTD1rBKPU1xgX6Awtay7DH6PDs2 iDfalau2MUA4X6Gx8mM= =FlvC -----END PGP SIGNATURE----- Merge tag 'v4.20-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/drivers add helper functions to create and send commands to the global command engine (GCE) device using the command queue driver (cmdq). * tag 'v4.20-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: soc: mediatek: Add Mediatek CMDQ helper Signed-off-by: Olof Johansson <olof@lixom.net> |
||
|
|
576f1b4bc8 |
soc: mediatek: Add Mediatek CMDQ helper
Add Mediatek CMDQ helper to create CMDQ packet and assemble GCE op code. Signed-off-by: Houlong Wei <houlong.wei@mediatek.com> Signed-off-by: HS Liao <hs.liao@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
||
|
|
c4fe17e0e3 |
soc: qcom: qmi_interface: Limit txn ids to U16_MAX
Txn IDs created up to INT_MAX cause overflow while storing the IDs in u16 type supported by QMI header. Limit the txn IDs max value to U16_MAX to avoid overflow. Signed-off-by: Arun Kumar Neelakantam <aneela@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org> |
||
|
|
64d20b774f |
Qualcomm ARM Based Driver Updates for v4.20
* Refactor of SCM compatibles and clock requirements * SMEM cleanup * Add LLCC EDAC driver * Fixes for GENI clocks and macros * Fix includes for llcc-slice and smem * String overflow fixes for APR and wcnss_ctrl * Fixup for COMPILE_TEST of qcom driver Kconfigs * Cleanup of Kconfig depends of rpmh, smd_rpm, smsm, and smp2p * Add SCM dependencies to SPM and rmtfs-mem -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJbsQupAAoJEFKiBbHx2RXVQBYQAKWr3RsQlWJ09M0vm8qGeCCA 8FXxX9wqcU34KvYR16IIXzQ/25L4h1uLjvjBfQurn7zOFIrCoqn2PGOchGOyJEA0 hPw+RomT17BV1hRSJkl8lIXMqGCAvoc44VrAQyipCTpEJO82emh6qJ1ki5XpIvfI EOad6S2IGNXU39F0B6rtl4+LL/Vfh+MOJcz0E23SVujtDT0pvxuP5aVGM+Faqif/ rQ4dKcYZokRHmuTlfg2azo4OmkLyrwsMjirna3NN3MX14wK5Ox53ESplGZXndt3V Gy48IbXdTTjbmHT07aqPVSkFgulkaE9Z3MTw+vyn/r10ww6R55XtoSJIbS/v4+Y0 mzjTYTSHmxzpGHR4Rs+E1q9/7y8tbxO0uzFMHlmD8fNNbkK3FlXymGfVJFjSJGSN hTN97zEYUKco4M6RXAly8XUrOetSglZwul1+gQnHYYCx7Y8BhgpyZtyjVeKzg1Mw wqgAi+1+cOLG2JjI+h0Xo0xqvuWwl3e2jrmBZNs9BWoXaaWA2L7oqPL3bxq2TeWs kF56I7YH5eD5sUGvShjrJ9WfKeN4hWpYSif/qg58kqz/zbCSjmmfiqQ7HmjJUetm JnAZaik38YhsDvR8K1gECQiN2myjojjdyg3ONBk2y0Yho+ClVSMPo/qCceRy21/q LVTRThQ0tZExH8zEJrJt =rx3Z -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers Qualcomm ARM Based Driver Updates for v4.20 * Refactor of SCM compatibles and clock requirements * SMEM cleanup * Add LLCC EDAC driver * Fixes for GENI clocks and macros * Fix includes for llcc-slice and smem * String overflow fixes for APR and wcnss_ctrl * Fixup for COMPILE_TEST of qcom driver Kconfigs * Cleanup of Kconfig depends of rpmh, smd_rpm, smsm, and smp2p * Add SCM dependencies to SPM and rmtfs-mem * tag 'qcom-drivers-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (38 commits) soc: qcom: geni: geni_se_clk_freq_match() should always accept multiples soc: qcom: geni: Don't ignore clk_round_rate() errors in geni_se_clk_tbl_get() soc: qcom: geni: Make version macros simpler dt-bindings: firmware: scm: Add MSM8998 and SDM845 firmware: qcom: scm: Refactor clock handling dt-bindings: firmware: scm: Refactor compatibles and clocks soc: qcom: smem: a few last cleanups soc: qcom: smem: verify partition host ids match soc: qcom: smem: small change in global entry loop soc: qcom: smem: verify partition offset_free_uncached soc: qcom: smem: verify partition header size soc: qcom: smem: introduce qcom_smem_partition_header() soc: qcom: smem: require order of host ids to match soc: qcom: smem: verify both host ids in partition header soc: qcom: smem: small refactor in qcom_smem_enumerate_partitions() soc: qcom: smem: always ignore partitions with 0 offset or size soc: qcom: smem: initialize region struct only when successful soc: qcom: smem: rename variable in qcom_smem_get_global() drivers: qcom: rpmh-rsc: clear wait_for_compl after use soc: qcom: rmtfs-mem: Validate that scm is available ... Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
|
27450653f1 |
drivers: edac: Add EDAC driver support for QCOM SoCs
Add error reporting driver for Single Bit Errors (SBEs) and Double Bit Errors (DBEs). As of now, this driver supports error reporting for Last Level Cache Controller (LLCC) of Tag RAM and Data RAM. Interrupts are triggered when the errors happen in the cache, the driver handles those interrupts and dumps the syndrome registers. Signed-off-by: Channagoud Kadabi <ckadabi@codeaurora.org> Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Co-developed-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Acked-by: Borislav Petkov <bp@suse.de> Signed-off-by: Andy Gross <andy.gross@linaro.org> |
||
|
|
c081f3060f |
soc: qcom: Add support to register LLCC EDAC driver
Cache error reporting controller detects and reports single and double bit errors on Last Level Cache Controller (LLCC) cache. Add required support to register LLCC EDAC driver as platform driver, from LLCC driver. Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org> |
||
|
|
7f9c136216 |
soc: qcom: Add broadcast base for Last Level Cache Controller (LLCC)
Currently, broadcast base is set to end of the LLCC banks, which may not be correct always. As the number of banks may vary for each chipset and the broadcast base could be at a different address as well. This info depends on the chipset, so get the broadcast base info from the device tree (DT). Add broadcast base in LLCC driver and use this for broadcast writes. Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org> |
||
|
|
d4983983d9 |
soc: amlogic: add meson-canvas driver
Amlogic SoCs have a repository of 256 canvas which they use to describe pixel buffers. They contain metadata like width, height, block mode, endianness [..] Many IPs within those SoCs like vdec/vpu rely on those canvas to read/write pixels. Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> |
||
|
|
9e259f9352 |
ARM: 32-bit SoC platform updates
Most of the SoC updates in this cycle are cleanups and moves to more
modern infrastructure:
- Davinci was moved to common clock framework
- OMAP1-based Amstrad E3 "Superphone" saw a bunch of cleanups to the
keyboard interface (bitbanged AT keyboard via GPIO).
- Removal of some stale code for Renesas platforms
- Power management improvements for i.MX6LL
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlt+Lh0PHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3Y+YP/2QVT1T1/Fz3WsuLg7BYa6r51BDxvr/pSQKh
eqLhZCcI5RpOlW4noWgJXWqnX2AlR1vX6xe0W0ebj177ttUHmidUQUJCpwP39AGE
LrVC2+mlFb3uPx0HlpHsx3zFZdNFfrhl5mN3JbZfnLv0fUibVEhR+K8ii7MV1/Fk
Lbo9sVPT8GIJuU6uyTTUnsCufwCkARMhrYbO6cbtS0FCO77a5aHp7btvHZ2ykxwh
hG9CI3FhfAP3Tkpm+IbHkC5jYQNRewQoqthzJ4WJbRrcdA/vaArBTOUoZG4NFMOM
M3B4jd1x26llmQhUqH4kGeOZiQ714GPrKcGS+8w7Twj5sIRGDxpif2Ac0kKL2B8X
Ps6UTM0cb63W9I+TphjLysKSarNjR2lVVhNVoJ8P47MSyDGIRpSR7+IWvlJ7U8vz
1yMWCguwrwZH3DnQb8UINTfI1Y1RstmtO5v8paSqfJyFX5r64x6VfYso1fRzxyFE
4r2TS0HRv117aKkHwY8smjielZ0CpGnyEDQgq9Z72V4FueIqsJQrA3oGYXgTArFl
mLL+fJUdwPv00nWuAZ8q0wIj1NvJvksJy+cObZXL6HK9m3cSdYwOHipdG86k20S5
6/KMPmgrMbV9YO3lVtfJZjdu2QTBiYVBPGfsiSo5lVL5Q5rDYV9QBijnE+9W9/yT
tJ038MhK
=ACVk
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 32-bit SoC platform updates from Olof Johansson:
"Most of the SoC updates in this cycle are cleanups and moves to more
modern infrastructure:
- Davinci was moved to common clock framework
- OMAP1-based Amstrad E3 "Superphone" saw a bunch of cleanups to the
keyboard interface (bitbanged AT keyboard via GPIO).
- Removal of some stale code for Renesas platforms
- Power management improvements for i.MX6LL"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (112 commits)
ARM: uniphier: select RESET_CONTROLLER
arm64: uniphier: select RESET_CONTROLLER
ARM: uniphier: remove empty Makefile
ARM: exynos: Clear global variable on init error path
ARM: exynos: Remove outdated maintainer information
ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15
ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_kill
soc: r9a06g032: don't build SMP files for non-SMP config
ARM: shmobile: Add the R9A06G032 SMP enabler driver
ARM: at91: pm: configure wakeup sources for ULP1 mode
ARM: at91: pm: add PMC fast startup registers defines
ARM: at91: pm: Add ULP1 mode support
ARM: at91: pm: Use ULP0 naming instead of slow clock
ARM: hisi: handle of_iomap and fix missing of_node_put
ARM: hisi: check of_iomap and fix missing of_node_put
ARM: hisi: fix error handling and missing of_node_put
ARM: mx5: Set the DBGEN bit in ARM_GPC register
ARM: imx51: Configure M4IF to avoid visual artifacts
ARM: imx: call imx6sx_cpuidle_init() conditionally for 6sll
ARM: imx: fix i.MX6SLL build
...
|
||
|
|
c54fc8658b |
remoteproc updates for v4.19
This adds support for pre-start and post-shutdown hooks for remoteproc subdevices, refactors the Qualcomm Hexagon support to allow reuse between several drivers, makes authentication in the MDT file loader optional, migrates a few format strings to use %pK and migrates the Davinci driver to use the reset framework. -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAlt3Pq8bHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F7WQP+wT8r4ZAZ5MBSaoQTwCi Ce9+Ixxsn64tcyYMeTnUABC3EsHA4ysilbIGtqiYzpmaJhMr87+MUWKa84SyMILA lomrfzDIWvuAX9Y2NWwOuYH8FI+syq8NuES+O5S7bMfIK7zqOho+lpiI4Q8jHOAD 6y5Ta5FyoZZsy0SmtAwoFDPHKHW2pPb0RU/Fd7UOo4oXkeusuLpeZjDLTOgwoc9/ uSNM8UG+I3mslR4GdJOAwh+C8mRyVJ16YmVrvMrKjxY+MG53D1ODIO4L39j5Vf1Y 5HdIBazXrw4InPMeijOj8OI/NNJS2Ia7TJM6UdKqRTfwQfAXg9ondlxxvXm5ghju sVwx/X/duZm8QJVWaes9iAJ7seN4gooywChqrq5I5GM09jFk2qZ8DqjfesyLjOjm V3+6JCisfUm+UZsToeM1yTjOpCKPtIFrxRRllK7gMxkLvIZ8DQRV7oRT2AD8dKfX wl7apbWXKEBjtfnqV0RrR2M2znIPPC6aGjFFdWCOYo3NTiIKDnF1qeSwVGroCKUM ey+A8dBHN39qA4qfidp/QghwHg216XbyQlUlCEnJ9bqaWGYhsZRQl31W5y3fEPWL UfXkPHjuW8Ulc3yVK8pcHP5xjgg2TF5UbODHDBp1bgUQm/vmeclx+Aa2x7GBqTaF EE2uyhQjro0EJKYFGzjklJi6 =QpCe -----END PGP SIGNATURE----- Merge tag 'rproc-v4.19' of git://github.com/andersson/remoteproc Pull remoteproc updates from Bjorn Andersson: "This adds support for pre-start and post-shutdown hooks for remoteproc subdevices, refactors the Qualcomm Hexagon support to allow reuse between several drivers, makes authentication in the MDT file loader optional, migrates a few format strings to use %pK and migrates the Davinci driver to use the reset framework" * tag 'rproc-v4.19' of git://github.com/andersson/remoteproc: remoteproc/davinci: use the reset framework remoteproc/davinci: Mark error recovery as disabled remoteproc: st_slim: replace "%p" with "%pK" remoteproc: replace "%p" with "%pK" remoteproc: qcom: fix Q6V5_WCSS dependencies remoteproc: Reset table_ptr in rproc_start() failure paths remoteproc: qcom: q6v5-pil: fix modem hang on SDM845 after axis2 clk unvote remoteproc: qcom q6v5: fix modular build remoteproc: Introduce prepare and unprepare for subdevices remoteproc: rename subdev probe and remove functions remoteproc: Make client initialize ops in rproc_subdev remoteproc: Make start and stop in subdev optional remoteproc: Rename subdev functions to start/stop remoteproc: qcom: Introduce Hexagon V5 based WCSS driver remoteproc: qcom: q6v5-pil: Use common q6v5 helpers remoteproc: qcom: adsp: Use common q6v5 helpers remoteproc: q6v5: Extract common resource handling remoteproc: qcom: mdt_loader: Make the firmware authentication optional |
||
|
|
c6ed444fd6 |
This is the bulk of pin control changes for v4.19:
Core changes:
- Augment pinctrl_generic_add_group() and pinmux_generic_add_function()
to return the selector for the added group/function to the caller
and augment (hopefully) all drivers to handle this.
New subdrivers:
- Qualcomm PM8998 and PM8005 are supported in the SPMI pin
control and GPIO driver.
- Intel Ice Lake PCH (platform controller hub) support.
- NXP (ex Freescale) i.MX8MQ support.
- Berlin AS370 support.
Improvements to drivers:
- Support interrupts on the Ocelot pin controller.
- Add SPI pins to the Uniphier driver.
- Define a GPIO compatible per SoC in the Tegra driver.
- Push Tegra initialization down in the initlevels.
- Support external wakeup interrupts on the Exynos.
- Add generic clocks pins to the meson driver.
- Add USB and HSCIF pins for some Renesas PFC chips.
- Suspend/resume support in the armada-37xx.
- Interrupt support for the Actions Semiconductor S900 also
known as "owl".
- Correct the pin ordering in Cedarfork.
- Debugfs output for INTF in the mcp23s08 driver
- Avoid divisions in context save/restore in pinctrl-single.
The rest is minor bug fixes or cleanups.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJbcYUCAAoJEEEQszewGV1zHyQP/2sbSF5fDiOs+CdAqHI+LzIU
KHfXeamJlufZzIY5Cit6L9BRowVLnWewK3lkmQ3NJmUtF4KTbDkbMMEyzNh15WEu
47xOVeHpa1Mrp3kTRiatVW7BibnC97wXFg48omG6KAABLt/eRNZ69NTdq6VZUdWD
7PhCLhLtZSry4nZ/dDp2esc+yGeeQkMNMeNZEAiG+MF5+OYUtNdr7NUYCxMpQuTC
7KxyCia8S0NNND3RtUANUP+M8XeyWRWYEQnqPXuWo1+Fwpk2CoYdraw7m44X7YIw
voBqap5ThOFfhmR7LiqAaMcQEgm5n5ABy+qE0+fcJs4TYcdV8MYSQjCU/lIpO81b
EfdcbU4lDkbDtTLO7aFSjXI01qB/J+bRmxcyTkYbUxENdNW7ZD1izHambhJNxDEt
LO75fOlGJBx348zsypGL13WLc5j/IL4raa8Bj5+BOLuUbQOEpCnFovcktx42QJOK
NHnNK6RknlpXjeNO3w33YO/oxNAkdhLlNU7IHXTN6T9rcBJJjtS7MFn7Sro+QGlC
6EwyGfb0Y08wcUIkMpKHL+9L6So5r08GESzb7PLpgOZIvIi291wA454r1ntK1zoW
JBDX+2vrFjmLSSKWqhKN5nCq85V6M2A2PJSfYG6A0CJZLEPDRC7Lx3roV2W2vss4
EoxKjpMskqRuSbmy/WJZ
=EUMW
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v4.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for v4.19:
Core changes:
- Augment pinctrl_generic_add_group() and pinmux_generic_add_function()
to return the selector for the added group/function to the caller
and augment (hopefully) all drivers to handle this
New subdrivers:
- Qualcomm PM8998 and PM8005 are supported in the SPMI pin control
and GPIO driver
- Intel Ice Lake PCH (platform controller hub) support
- NXP (ex Freescale) i.MX8MQ support
- Berlin AS370 support
Improvements to drivers:
- Support interrupts on the Ocelot pin controller
- Add SPI pins to the Uniphier driver
- Define a GPIO compatible per SoC in the Tegra driver
- Push Tegra initialization down in the initlevels
- Support external wakeup interrupts on the Exynos
- Add generic clocks pins to the meson driver
- Add USB and HSCIF pins for some Renesas PFC chips
- Suspend/resume support in the armada-37xx
- Interrupt support for the Actions Semiconductor S900 also known as
"owl"
- Correct the pin ordering in Cedarfork
- Debugfs output for INTF in the mcp23s08 driver
- Avoid divisions in context save/restore in pinctrl-single
The rest is minor bug fixes or cleanups"
* tag 'pinctrl-v4.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (69 commits)
pinctrl: nomadik: silence uninitialized variable warning
pinctrl: axp209: Fix NULL pointer dereference after allocation
pinctrl: samsung: Remove duplicated "wakeup" in printk
pinctrl: ocelot: add support for interrupt controller
pinctrl: intel: Don't shadow error code of gpiochip_lock_as_irq()
pinctrl: berlin: fix 'pctrl->functions' allocation in berlin_pinctrl_build_state
gpio: tegra: Move driver registration to subsys_init level
pinctrl: tegra: Move drivers registration to arch_init level
pinctrl: baytrail: actually print the apparently misconfigured pin
MAINTAINERS: Replace Heikki as maintainer of Intel pinctrl
pinctrl: freescale: off by one in imx1_pinconf_group_dbg_show()
pinctrl: uniphier: add spi pin-mux settings
pinctrl: cannonlake: Fix community ordering for H variant
pinctrl: tegra: define GPIO compatible node per SoC
pinctrl: intel: Do pin translation when lock IRQ
pinctrl: imx: off by one in imx_pinconf_group_dbg_show()
pinctrl: mediatek: include chained_irq.h header
pinctrl/amd: only handle irq if it is pending and unmasked
pinctrl/amd: fix gpio irq level in debugfs
pinctrl: stm32: add syscfg mask parameter
...
|
||
|
|
a8be2af021 |
pinctrl: samsung: Write external wakeup interrupt mask
The pinctrl driver defines an IRQ chip which handles external wakeup interrupts, therefore from logical point of view, it is the owner of external interrupt mask. The register controlling the mask belongs to Power Management Unit address space so it has to be accessed with PMU syscon regmap handle. This mask should be written to hardware during system suspend. Till now ARMv7 machine code was responsible for this which created a dependency between pin controller driver and arch/arm/mach code. Try to rework this dependency so the pinctrl driver will write external wakeup interrupt mask during late suspend. Impact on ARMv7 designs (S5Pv210 and Exynos) ============================================ This duplicates setting mask with existing machine code arch/arm/mach-exynos/suspend.c and arch/arm/mach-s5pv210/pm.c but it is not a problem - the wakeup mask register will be written twice. The machine code will be cleaned up later. The difference between implementation here and ARMv7 machine code (arch/arm/mach-*) is the time of writing the mask: 1. The machine code is writing the mask quite late during system suspend path, after offlining secondary CPUs and just before doing actual suspend. 2. The implementation in pinctrl driver uses late suspend ops, therefore it will write the mask much earlier. Hopefully late enough, after all drivers will enable or disable their interrupt wakeups (enable_irq_wake() etc). Impact on ARMv8 designs (Exynos5433 and Exynos7) ================================================ The Suspend to RAM was not supported and external wakeup interrupt mask was not written to HW. This change brings us one step closer to supporting Suspend to RAM. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Sylwester Nawrocki <snawrocki@kernel.org> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> |
||
|
|
e5cda42c16 |
ARM: exynos: Define EINT_WAKEUP_MASK registers for S5Pv210 and Exynos5433
S5Pv210 and Exynos5433/Exynos7 have different address of EINT_WAKEUP_MASK register. Rename existing S5P_EINT_WAKEUP_MASK to avoid confusion and add new ones. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Sylwester Nawrocki <snawrocki@kernel.org> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> |
||
|
|
a3134fb09e |
drivers: soc: Add LLCC driver
LLCC (Last Level Cache Controller) provides additional cache memory in the system. LLCC is partitioned into multiple slices and each slice gets its own priority, size, ID and other config parameters. LLCC driver programs these parameters for each slice. Clients that are assigned to use LLCC need to get information such size & ID of the slice they get and activate or deactivate the slice as needed. LLCC driver provides API for the clients to perform these operations. Signed-off-by: Channagoud Kadabi <ckadabi@codeaurora.org> Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org> |
||
|
|
0e622e8019 |
remoteproc: qcom: mdt_loader: Make the firmware authentication optional
qcom_mdt_load function loads the mdt type firmware and initialises the secure memory as well. Make the initialisation only when requested by the caller, so that the function can be used by self-authenticating remoteproc as well. Acked-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> |
||
|
|
7e8a50df26 |
soc: renesas: rcar-sysc: Drop legacy handling
Now the R-Car platform code no longer supports DTBs lacking a SYSC
device node in DT, all legacy handling can be dropped from the R-Car
SYSC driver:
- Make rcar_sysc_ch private to the driver,
- Make rcar_sysc_power_{down,up}() static (they have been replaced by
rcar_sysc_power_{down,up}_cpu()),
- Remove the legacy wrapper rcar_sysc_init(), and the check for double
initialization (only the early_initcall is left).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
||
|
|
f2b1d2f94a |
soc: renesas: rcar-sysc: Provide helpers to power up/down CPUs
Provide helpers to control CPU power areas from platform code, taking just a CPU index. This will avoid having to pass full CPU power area parameter blocks, and thus duplicating information already provided by SoC-specific SYSC drivers. This will be used on R-Car H1 only. Later R-Car generations rely on APMU/RST for CPU power area control. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
||
|
|
8efcf34a26 |
ARM: SoC: late updates
This is a branch with a few merge requests that either came in late, or took a while longer for us to review and merge than usual and thus cut it a bit close to the merge window. We stage them in a separate branch and if things look good, we still send them up -- and that's the case here. This is mostly DT additions for Renesas platforms, adding IP block descriptions for existing and new SoCs. There are also some driver updates for Qualcomm platforms for SMEM/QMI and GENI, which is their generalized serial protocol interface. -----BEGIN PGP SIGNATURE----- iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlsfCVIPHG9sb2ZAbGl4 b20ubmV0AAoJEIwa5zzehBx3KOcP/3O2+igstXt5rhemITdyi8rHkrIHPgetf25e ISBQzYrQOHV21SqT4le/Gk2CCQ6iX5Nv2DYoIrCzFWi/4DoDxXvryczQLla02Nru i8fcuxae7aFGW7/97G1+cATGPwuBLPiKXs6Wj01sKHeLBja5Det7eoXuHag7Y/Lo 4ls9wNZybMdlCcGm6+ULdj+XUdRyYUhOQQYvnPm2Q8hEkM+AiwLOBJTFwef9P5ad mX37kPDfwCxYwQXgZB1RkK/oJu0G2mTZXmGH5o+s+9yAyAupCQhmHGOrt3mlOf7j tLRlSgarJlO/QGIpJmDuCcxt3msD3OMd2dPbdgwojdpvycOU8EVWYLmCRpyIWQXv DCv9A9Gp4KlJnwxheVegBtilRA1aKsGuarWq6yeyOFt8N23Bgg/IjYKI9JF5+hPD M4q1oVAbUlfWb79rEc+TB0d7euREBkNn4TzzKMSOyP3eGUrXR0WUlq2A2VLxgIJo cx/ufY7CwvRgV+VxfhRbca+FmwDnu7uqzwLe73Ys2hnsuv8hXEtc+vSybqKqxVeU nHpWAqwaWhijlJiGq722vPo8avrLwjsxRwimogvijtesz9ZlTqrGtjkg61+eN2h8 eeuyRAsMUfVRiKuL3W+q4s0rzIauormnKsvRScKVyNFuiJfrfYb1odLoDGaOV/9G dQ7hA7TW =RUL0 -----END PGP SIGNATURE----- Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late updates from Olof Johansson: "This is a branch with a few merge requests that either came in late, or took a while longer for us to review and merge than usual and thus cut it a bit close to the merge window. We stage them in a separate branch and if things look good, we still send them up -- and that's the case here. This is mostly DT additions for Renesas platforms, adding IP block descriptions for existing and new SoCs. There are also some driver updates for Qualcomm platforms for SMEM/QMI and GENI, which is their generalized serial protocol interface" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (186 commits) soc: qcom: smem: introduce qcom_smem_virt_to_phys() soc: qcom: qmi: fix a buffer sizing bug MAINTAINERS: Update pattern for qcom_scm soc: Unconditionally include qcom Makefile soc: qcom: smem: check sooner in qcom_smem_set_global_partition() soc: qcom: smem: fix qcom_smem_set_global_partition() soc: qcom: smem: fix off-by-one error in qcom_smem_alloc_private() soc: qcom: smem: byte swap values properly soc: qcom: smem: return proper type for cached entry functions soc: qcom: smem: fix first cache entry calculation soc: qcom: cmd-db: Make endian-agnostic drivers: qcom: add command DB driver arm64: dts: renesas: salvator-common: Add ADV7482 support ARM: dts: r8a7740: Add CEU1 ARM: dts: r8a7740: Add CEU0 arm64: dts: renesas: salvator-common: enable VIN arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes arm64: dts: renesas: r8a7795-es1: add CSI-2 node ... |
||
|
|
32bcbf8b6d |
ARM: SoC driver updates
This branch contains platform-related driver updates for ARM and ARM64.
Highlights:
- ARM SCMI (System Control & Management Interface) driver cleanups
- Hisilicon support for LPC bus w/ ACPI
- Reset driver updates for several platforms: Uniphier,
- Rockchip power domain bindings and hardware descriptions for several SoCs.
- Tegra memory controller reset improvements
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlsfB94PHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3k2IP/i9T71QoanZ3k6o/d+YUqmTuUiA+EJWFANry
8KSjBKmYDON/GLgRCiNZR8P0NZ3d1LgFk5gZDdhMrOtoGtd8k8q0KyqLxjKAWHt6
opSrGucmE1gy9FvJdUkK+y148vM+Ea4SXRVOZxbLV5qm3inPwnopJjgKAfnhIn4X
QmkSca90CyEc3kPdBdfMeAKL+7SRb4mbFHAXXVE7QiWvjrEjUkvtNVTazf5Nroc4
PbI97zSFrmSFO4ZK0jZHCd4R2xhsJwzDQ/UKHC9C9/IdFMLfnJ7dxIf97QYn41Kl
H46FneMZZZ1FibN+Mj5hC/tByE8FrMtWh636z031s6kkamSqLiBAZFlGpHABxQJs
3tN1vBP40R7hzm76yQAC4Uopr5xOtmLr6KBMBBRr+Axf9jHMS4m/WP1chwZFpFjI
Awxc0VCjBUm+haHvK85J4eHrzbWPjG+8aV5Ar5DHVo8et3MzCdX0ycoDeUT787qc
qzEcCjGPbXHBR1aXUX8stRW5x8zoGH/4IUYMo5IGadiFuXSna6ERG9IHq3fAU5Fp
ZzNNKedtodn9NoMr3NJJk1ndyrUr0lpXwlVqFeksRTa+INk2FHKd0cQfxwV33kS9
wHXw+v323uxa3Tz2TXKS7PavY5yr6fZ0dLC2+xEDqHq6bsLxo1DnBEnaola+Jg+u
9hKEuSff
=xs+f
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"This contains platform-related driver updates for ARM and ARM64.
Highlights:
- ARM SCMI (System Control & Management Interface) driver cleanups
- Hisilicon support for LPC bus w/ ACPI
- Reset driver updates for several platforms: Uniphier,
- Rockchip power domain bindings and hardware descriptions for
several SoCs.
- Tegra memory controller reset improvements"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (59 commits)
ARM: tegra: fix compile-testing PCI host driver
soc: rockchip: power-domain: add power domain support for px30
dt-bindings: power: add binding for px30 power domains
dt-bindings: power: add PX30 SoCs header for power-domain
soc: rockchip: power-domain: add power domain support for rk3228
dt-bindings: power: add binding for rk3228 power domains
dt-bindings: power: add RK3228 SoCs header for power-domain
soc: rockchip: power-domain: add power domain support for rk3128
dt-bindings: power: add binding for rk3128 power domains
dt-bindings: power: add RK3128 SoCs header for power-domain
soc: rockchip: power-domain: add power domain support for rk3036
dt-bindings: power: add binding for rk3036 power domains
dt-bindings: power: add RK3036 SoCs header for power-domain
dt-bindings: memory: tegra: Remove Tegra114 SATA and AFI reset definitions
memory: tegra: Remove Tegra114 SATA and AFI reset definitions
memory: tegra: Register SMMU after MC driver became ready
soc: mediatek: remove unneeded semicolon
soc: mediatek: add a fixed wait for SRAM stable
soc: mediatek: introduce a CAPS flag for scp_domain_data
soc: mediatek: reuse regmap_read_poll_timeout helpers
...
|
||
|
|
1c8c5a9d38 |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
Pull networking updates from David Miller:
1) Add Maglev hashing scheduler to IPVS, from Inju Song.
2) Lots of new TC subsystem tests from Roman Mashak.
3) Add TCP zero copy receive and fix delayed acks and autotuning with
SO_RCVLOWAT, from Eric Dumazet.
4) Add XDP_REDIRECT support to mlx5 driver, from Jesper Dangaard
Brouer.
5) Add ttl inherit support to vxlan, from Hangbin Liu.
6) Properly separate ipv6 routes into their logically independant
components. fib6_info for the routing table, and fib6_nh for sets of
nexthops, which thus can be shared. From David Ahern.
7) Add bpf_xdp_adjust_tail helper, which can be used to generate ICMP
messages from XDP programs. From Nikita V. Shirokov.
8) Lots of long overdue cleanups to the r8169 driver, from Heiner
Kallweit.
9) Add BTF ("BPF Type Format"), from Martin KaFai Lau.
10) Add traffic condition monitoring to iwlwifi, from Luca Coelho.
11) Plumb extack down into fib_rules, from Roopa Prabhu.
12) Add Flower classifier offload support to igb, from Vinicius Costa
Gomes.
13) Add UDP GSO support, from Willem de Bruijn.
14) Add documentation for eBPF helpers, from Quentin Monnet.
15) Add TLS tx offload to mlx5, from Ilya Lesokhin.
16) Allow applications to be given the number of bytes available to read
on a socket via a control message returned from recvmsg(), from
Soheil Hassas Yeganeh.
17) Add x86_32 eBPF JIT compiler, from Wang YanQing.
18) Add AF_XDP sockets, with zerocopy support infrastructure as well.
From Björn Töpel.
19) Remove indirect load support from all of the BPF JITs and handle
these operations in the verifier by translating them into native BPF
instead. From Daniel Borkmann.
20) Add GRO support to ipv6 gre tunnels, from Eran Ben Elisha.
21) Allow XDP programs to do lookups in the main kernel routing tables
for forwarding. From David Ahern.
22) Allow drivers to store hardware state into an ELF section of kernel
dump vmcore files, and use it in cxgb4. From Rahul Lakkireddy.
23) Various RACK and loss detection improvements in TCP, from Yuchung
Cheng.
24) Add TCP SACK compression, from Eric Dumazet.
25) Add User Mode Helper support and basic bpfilter infrastructure, from
Alexei Starovoitov.
26) Support ports and protocol values in RTM_GETROUTE, from Roopa
Prabhu.
27) Support bulking in ->ndo_xdp_xmit() API, from Jesper Dangaard
Brouer.
28) Add lots of forwarding selftests, from Petr Machata.
29) Add generic network device failover driver, from Sridhar Samudrala.
* ra.kernel.org:/pub/scm/linux/kernel/git/davem/net-next: (1959 commits)
strparser: Add __strp_unpause and use it in ktls.
rxrpc: Fix terminal retransmission connection ID to include the channel
net: hns3: Optimize PF CMDQ interrupt switching process
net: hns3: Fix for VF mailbox receiving unknown message
net: hns3: Fix for VF mailbox cannot receiving PF response
bnx2x: use the right constant
Revert "net: sched: cls: Fix offloading when ingress dev is vxlan"
net: dsa: b53: Fix for brcm tag issue in Cygnus SoC
enic: fix UDP rss bits
netdev-FAQ: clarify DaveM's position for stable backports
rtnetlink: validate attributes in do_setlink()
mlxsw: Add extack messages for port_{un, }split failures
netdevsim: Add extack error message for devlink reload
devlink: Add extack to reload and port_{un, }split operations
net: metrics: add proper netlink validation
ipmr: fix error path when ipmr_new_table fails
ip6mr: only set ip6mr_table from setsockopt when ip6mr_new_table succeeds
net: hns3: remove unused hclgevf_cfg_func_mta_filter
netfilter: provide udp*_lib_lookup for nf_tproxy
qed*: Utilize FW 8.37.2.0
...
|
||
|
|
6d361c1db7 |
soc: qcom: smem: introduce qcom_smem_virt_to_phys()
Create function qcom_smem_virt_to_phys(), which returns the physical address corresponding to a given SMEM item's virtual address. This feature is required for a driver that will soon be out for review. Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org> |
||
|
|
6adba21eb4
|
soc: qcom: Add APR bus driver
This patch adds support to APR bus (Asynchronous Packet Router) driver. APR driver is made as a bus driver so that the apr devices can added removed more dynamically depending on the state of the services on the dsp. APR is used for communication between application processor and QDSP to use services on QDSP like Audio and others. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-and-tested-by: Rohit kumar <rohitkr@codeaurora.org> Acked-by: Andy Gross <andy.gross@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org> |
||
|
|
1e0a601437 |
firmware: ti_sci: Switch to SPDX Licensing
Switch to SPDX licensing and drop the GPL text which comes redundant. Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com> |
||
|
|
a2dd6877b4 |
soc: ti: K2G: provide APIs to support driver probe deferral
This patch provide APIs to allow client drivers to support probe deferral. On K2G SoC, devices can be probed only after the ti_sci_pm_domains driver is probed and ready. As drivers may get probed at different order, any driver that depends on knav dma and qmss drivers, for example netcp network driver, needs to defer probe until knav devices are probed and ready to service. To do this, add an API to query the device ready status from the knav dma and qmss devices. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
||
|
|
92589cbdda |
remoteproc updates for v4.17
This adds support for generating coredumps for remoteprocs using devcoredump, adds the Qualcomm sysmon driver for intra-remoteproc crash handling and a number of fixes in Qualcomm and IMX drivers. -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAlrL5dgbHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FufUP/ifQ+QbDzYzBI4CHfbef hls8bplN9GlW4acJuhVRe8ikGz6vHZdyH88KJJX+IHekDXFqk10rWEgcyfV0h5mU qOrhiW7hjfm2Mhs0MvNg9rKxbFrD5wAeJBJn8ukTB4z4jc9iFPazVu37V3ul/wVR yMM4zI6kA54UwsLunqLEapb1thgLO4P99tvA+vdR8ekz/j0AVHB7HiHVLY1JX5Gu D679icQSWOSsSQaRR7G0E97ZKZF6XaM6+aJV3eZol1HQw8k3I/Vbudi2wIKj0Ia8 jLO5JyCpgeSAAjPCZLrB5XyUXl/vU7PSPKTPyOnv2lK1wQgKsmHX80HfeAt1ISNn 4nY/Oy651/rjBN3FR9HQvQoqCDF08GG5YRDmUZCg0kS/OStrbJT4eCm+hklvanmK O98LEWm5+FLqk+9Wau1DXGa0raXon2REIJxQSDnBUODZSqTQBS1iQmdtdYtrZxRp 17LtCABCSBMbAI8VE6eb/5jj/z07aI0pBwKEYEWOOG2xsF6q1GGZAXRxnmMUOWAv bwSgiNqNbbYUdYMjVYDxDtWIp3/Dy8VQ3N3Fz61SieS0GjJxDy/SyNByzVL4eEjk yYj+N74Dxgms1V/xknQmJn4ktwqaVxapnj52WF1WaEtIcm5WvPFZUVNSFvWMlbcD rAiTKkpFC0CkINlM+dk3Ti/a =cxV7 -----END PGP SIGNATURE----- Merge tag 'rproc-v4.17' of git://github.com/andersson/remoteproc Pull remoteproc updates from Bjorn Andersson: - add support for generating coredumps for remoteprocs using devcoredump - add the Qualcomm sysmon driver for intra-remoteproc crash handling - a number of fixes in Qualcomm and IMX drivers * tag 'rproc-v4.17' of git://github.com/andersson/remoteproc: remoteproc: fix null pointer dereference on glink only platforms soc: qcom: qmi: add CONFIG_NET dependency remoteproc: imx_rproc: Slightly simplify code in 'imx_rproc_probe()' remoteproc: imx_rproc: Re-use existing error handling path in 'imx_rproc_probe()' remoteproc: imx_rproc: Fix an error handling path in 'imx_rproc_probe()' samples: Introduce Qualcomm QMI sample client remoteproc: qcom: Introduce sysmon remoteproc: Pass type of shutdown to subdev remove remoteproc: qcom: Register segments for core dump soc: qcom: mdt-loader: Return relocation base remoteproc: Rename "load_rsc_table" to "parse_fw" remoteproc: Add remote processor coredump support remoteproc: Remove null character write of shared mem |
||
|
|
38c23685b2 |
ARM: SoC driver updates for 4.17
The main addition this time around is the new ARM "SCMI" framework,
which is the latest in a series of standards coming from ARM to do power
management in a platform independent way. This has been through many
review cycles, and it relies on a rather interesting way of using the
mailbox subsystem, but in the end I agreed that Sudeep's version was
the best we could do after all.
Other changes include:
- the ARM CCN driver is moved out of drivers/bus into drivers/perf,
which makes more sense. Similarly, the performance monitoring
portion of the CCI driver are moved the same way and cleaned up
a little more.
- a series of updates to the SCPI framework
- support for the Mediatek mt7623a SoC in drivers/soc
- support for additional NVIDIA Tegra hardware in drivers/soc
- a new reset driver for Socionext Uniphier
- lesser bug fixes in drivers/soc, drivers/tee, drivers/memory, and
drivers/firmware and drivers/reset across platforms
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJaxiNzAAoJEGCrR//JCVInYhYP/2kPhc5t/kszA1bcklcbO9dY
eX37Ra/RR4yQ5yeQZVIZ4UkUovxk9PmG2tM4K5oJaTDsz5pPEgavVOOr3sbfj6vb
4O9auTeysEQlHcbVdNFum0YS2gUY2YD7D12DTRorotLxCqod184ccWXq0XGfIWaY
l3YRrcL/lPlqmyS3z/GNx9oNygOMUzEfXfIQYICyzHuYiLBUGnkKC1vIb+Hx1TDq
Cxk++AUqH13Mss24O2A2QQh+oBHj2BybDLLqwcC5PSpsUbFrVCfzG54l43mig32T
NOxV0Qnml2wAtU4H0QcgtSgwRimHD0YOiX8ssquvDDiqTqM5G+llSTGkEbYe+AUW
4GIZYoBOwGkfEXS+tyymHe9yfc5h1OLYAeFU1jRm723c7phanuu67rPn35YC8UMK
zSql10JpkAGNzMikrxxb6wnis951w2UFlzhgZQ6ItA/nRq3l+oEQA0Qiljv965nz
DVLsD5+gdhK6GBctkzlsD5HFn6GjM8JilnsOVPHD765nKnVBSxKiXRLV228XVug2
rChF1FhQqLnM54jCMqHZX5fS9SbSgtYswHqIXpVw6GmJkqq/Ly10yGR0vuWD+uyn
BV7q5AKpGrwm6wZkMM2uZ1VdUtWzn856AbkqrvX/QhmJcX4McuqaLUrC8bSOj1ty
KeVil0akq3nU+xHl5Ojs
=Pmsx
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"The main addition this time around is the new ARM "SCMI" framework,
which is the latest in a series of standards coming from ARM to do
power management in a platform independent way.
This has been through many review cycles, and it relies on a rather
interesting way of using the mailbox subsystem, but in the end I
agreed that Sudeep's version was the best we could do after all.
Other changes include:
- the ARM CCN driver is moved out of drivers/bus into drivers/perf,
which makes more sense. Similarly, the performance monitoring
portion of the CCI driver are moved the same way and cleaned up a
little more.
- a series of updates to the SCPI framework
- support for the Mediatek mt7623a SoC in drivers/soc
- support for additional NVIDIA Tegra hardware in drivers/soc
- a new reset driver for Socionext Uniphier
- lesser bug fixes in drivers/soc, drivers/tee, drivers/memory, and
drivers/firmware and drivers/reset across platforms"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (87 commits)
reset: uniphier: add ethernet reset control support for PXs3
reset: stm32mp1: Enable stm32mp1 reset driver
dt-bindings: reset: add STM32MP1 resets
reset: uniphier: add Pro4/Pro5/PXs2 audio systems reset control
reset: imx7: add 'depends on HAS_IOMEM' to fix unmet dependency
reset: modify the way reset lookup works for board files
reset: add support for non-DT systems
clk: scmi: use devm_of_clk_add_hw_provider() API and drop scmi_clocks_remove
firmware: arm_scmi: prevent accessing rate_discrete uninitialized
hwmon: (scmi) return -EINVAL when sensor information is unavailable
amlogic: meson-gx-socinfo: Update soc ids
soc/tegra: pmc: Use the new reset APIs to manage reset controllers
soc: mediatek: update power domain data of MT2712
dt-bindings: soc: update MT2712 power dt-bindings
cpufreq: scmi: add thermal dependency
soc: mediatek: fix the mistaken pointer accessed when subdomains are added
soc: mediatek: add SCPSYS power domain driver for MediaTek MT7623A SoC
soc: mediatek: avoid hardcoded value with bus_prot_mask
dt-bindings: soc: add header files required for MT7623A SCPSYS dt-binding
dt-bindings: soc: add SCPSYS binding for MT7623 and MT7623A SoC
...
|
||
|
|
3cdb741efa
|
regulator: qcom: smd: Add pm8998 and pmi8998 regulators
Add the pm8998 and pmi8998 regulators as used in the MSM8998 platform. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org> |
||
|
|
03836dd07f |
scpsy:
- mt2712: update power domains to reflect design changes in the SoC - fix initialisation of power subdomains - add support for mt7623a SoC - use defines for mt2701 bus protection mask -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAlqvjTgXHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00Nx+RAAh+SbaVBj6YPtcB5JtcEMNv8/ a52WvEDXDNSOKakUphsjxNY/n0WOq/IyntFyNQqBlQBDziWubj49ZH6BZ7UBxHXK Xi1IXek7tD8iu0BOyMC1fKF5Y0HUvlRW/bHNXvtFMDzaTA5zN2ZrpAiKvBkXMcW2 kgb2grv+YXphNo+v9YeYupP8pjyHYCqJ8tY7w44qMp3FigSaMMvtAVQRF36JIsk9 c606gv3laYdS2EMQDTUMV5sEbYK7V4YwC4a32f/vPe/Rur32NrfG8WkM3abU9KQa 3HxomsjUkdoW9ddE0JXH5xlh+XlYW02PYYmQH+fBsfj94so8vBVonrKnuIgVf98L V159Bt6S8g1IO/Cr80ZGwKyai9Lj7keLSwbkZFJ6qryrFqSVqXSfX2IAZkwjoiTY UxGoBEjDC06ExHlxv1dJK0xj6aCfqlCvfgfpsrOTVe/BBg8CTQMdFGHW31CsRPuc TrtAuAXzV5EI1GW+Wrv71VW+UXB6RzoZ+4R30KqSp5e7PJ0gRgf9ujBCqfVYsPka 7rd85JfLzTOICNyA+MSFK6q2FAR7pA3FK4bOhcKVen3bZz0bmsfjXcMjPFTF57jZ 3qm5NkX2xyW/kSd6WGRKyNRhGR5jx5EYjW7eIEmzwLt1S9SdAMv/TAggt+yfKSmg uasH0EPCGoVTX1rApSg= =BL8y -----END PGP SIGNATURE----- Merge tag 'v4.16-next-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/drivers Pull "ARM: mediatek: updates for soc drivers for v4.16-next" from Matthias Brugger: scpsy: - mt2712: update power domains to reflect design changes in the SoC - fix initialisation of power subdomains - add support for mt7623a SoC - use defines for mt2701 bus protection mask * tag 'v4.16-next-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: soc: mediatek: update power domain data of MT2712 dt-bindings: soc: update MT2712 power dt-bindings soc: mediatek: fix the mistaken pointer accessed when subdomains are added soc: mediatek: add SCPSYS power domain driver for MediaTek MT7623A SoC soc: mediatek: avoid hardcoded value with bus_prot_mask dt-bindings: soc: add header files required for MT7623A SCPSYS dt-binding dt-bindings: soc: add SCPSYS binding for MT7623 and MT7623A SoC |
||
|
|
c59c9c85e3 |
soc: mediatek: avoid hardcoded value with bus_prot_mask
use a meaningful definition for bus_prot_mask instead of just hardcoded for it. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
||
|
|
4dd27f544c |
soc: qcom: mdt-loader: Return relocation base
In order to implement support for grabbing core dumps in remoteproc it's necessary to know the relocated base of the image, as the offsets from the virtual memory base might not be based on the physical address. Return the adjusted physical base address to the caller. Acked-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> |
||
|
|
bcb41a53b0 |
soc: samsung: Add SPDX license identifiers to headers
Replace GPL license statements with SPDX GPL-2.0 license identifiers. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> |
||
|
|
fe53d1443a |
ARM: SoC driver updates for 4.16
A number of new drivers get added this time, along with many low-priority
bugfixes. The most interesting changes by subsystem are:
bus drivers:
- Updates to the Broadcom bus interface driver to support newer SoC types
- The TI OMAP sysc driver now supports updated DT bindings
memory controllers:
- A new driver for Tegra186 gets added
- A new driver for the ti-emif sram, to allow relocating
suspend/resume handlers there
SoC specific:
- A new driver for Qualcomm QMI, the interface to the modem on MSM SoCs
- A new driver for power domains on the actions S700 SoC
- A driver for the Xilinx Zynq VCU logicoreIP
reset controllers:
- A new driver for Amlogic Meson-AGX
- various bug fixes
tee subsystem:
- A new user interface got added to enable asynchronous communication
with the TEE supplicant.
- A new method of using user space memory for communication with
the TEE is added
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJac0fQAAoJEGCrR//JCVIntjEQALc6kflEGJc/FPundbx9V3F/
b+3+EX/uMnBnKsgZprz9ACPhx5eBH9QWja3A1zmIarb5c+q7zbBZDwhzUb8J8Yg8
xEb0im7Wx/GcKjUYZVKYBxtz9KjkXDzhrq8IAvPg6ShNcIy/8hq7ZO3iOkGsTDcy
/PyioWKC5g0dhJgtp91X1kgog5tuTaWOg39uUOqyEzwVu1vYVa4w+eeCzjEd6I//
68R/zDQ52+hWw6WZGoYOsNYzuriOflnJRnNpwuGhMhLNULBJfWnd4hkqGm4E+hFa
5dzW6vVAdIqjemFqPzCBT2WB4UG871aZX8DJ9HgnfX+g970nlsm1JY8Ck9MJNJum
aDkqZG41ArUYzDFWu8vJ2SKsue5lEZp6TEO2mLEVYrdOjOgedj0Zxqmq2DYeigxd
+ccOVgKJ9SsYw9ft1LkQ5BHCgOh3C7y9Kcg7oBnaEI5OTVvtf5PwEkT2cwbvgxYl
EVKLhlJ0Af+QXOW8E5JbNQETpYw52DMm6UKHiYn/JCGxB/8J0bgJzImDJI4Dtu2h
zqJITKJeTepqbfA5pmNfKa+20RhmsktdRCw2NN/QynY7EEtGjHAUVnlpZT2mrDco
0m62b7Erek/776vJN5ECzE5e6XCs2N0MDE6Anp121C5zEmig/SMBrUosMzP7Jnis
IDVC/QWkb3u85wK20Vc1
=yz0k
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"A number of new drivers get added this time, along with many
low-priority bugfixes. The most interesting changes by subsystem are:
bus drivers:
- Updates to the Broadcom bus interface driver to support newer SoC
types
- The TI OMAP sysc driver now supports updated DT bindings
memory controllers:
- A new driver for Tegra186 gets added
- A new driver for the ti-emif sram, to allow relocating
suspend/resume handlers there
SoC specific:
- A new driver for Qualcomm QMI, the interface to the modem on MSM
SoCs
- A new driver for power domains on the actions S700 SoC
- A driver for the Xilinx Zynq VCU logicoreIP
reset controllers:
- A new driver for Amlogic Meson-AGX
- various bug fixes
tee subsystem:
- A new user interface got added to enable asynchronous communication
with the TEE supplicant.
- A new method of using user space memory for communication with the
TEE is added"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (84 commits)
of: platform: fix OF node refcount leak
soc: fsl: guts: Add a NULL check for devm_kasprintf()
bus: ti-sysc: Fix smartreflex sysc mask
psci: add CPU_IDLE dependency
soc: xilinx: Fix Kconfig alignment
soc: xilinx: xlnx_vcu: Use bitwise & rather than logical && on clkoutdiv
soc: xilinx: xlnx_vcu: Depends on HAS_IOMEM for xlnx_vcu
soc: bcm: brcmstb: Be multi-platform compatible
soc: brcmstb: biuctrl: exit without warning on non brcmstb platforms
Revert "soc: brcmstb: Only register SoC device on STB platforms"
bus: omap: add MODULE_LICENSE tags
soc: brcmstb: Only register SoC device on STB platforms
tee: shm: Potential NULL dereference calling tee_shm_register()
soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver
dt-bindings: soc: xilinx: Add DT bindings to xlnx_vcu driver
soc: xilinx: Create folder structure for soc specific drivers
of: platform: populate /firmware/ node from of_platform_default_populate_init()
soc: samsung: Add SPDX license identifiers
soc: qcom: smp2p: Use common error handling code in qcom_smp2p_probe()
tee: shm: don't put_page on null shm->pages
...
|
||
|
|
830ebd37c5 |
Qualcomm ARM Based Driver Updates for v4.16 - Redo
* Fix error handling code in SMP2P probe * Update SMP2P to use ACPS as mailbox client * Add QMI support * Fixups for Qualcomm SCM * Fix licensing on rmtfs_mem * Correct SMSM child node lookup * Populate firmware nodes during platform init -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJaToihAAoJEFKiBbHx2RXVvj8P/1ZfQNQpN0b2mDJFZxGIislM JEZPOrdlIi3n9JMCNbp3BHc9kI8YM5XQPW08WfsbRZ+o+2vtGnHs4hF/a4Gw102f XHTAVjnT9HmoCrjFMCHF/1qZdFFIzCJgQnb/+cJ3hK2rnoJO2CCHMA8K1KhDlQ69 NFNwjWhx3lF5KrOm4xdStN+rjITpNZbSiMt6jMSHK1Up/RLz4SK3U2eY1AeqsP1p drMZVEg2N90C3C+fvBE80Iaq0Ncu3wg5MLoK3kCBGB/XidVZ+sgNJh4rfnWUfdnq JkT9kqiipYmBm2ONc2NiGqzrIwZCj0rx2Z4m7huSZlwRp7w92n9N0SYxUht2Ejpb AjenPJyqrRcuR7pF9mOpDPapZER7+11gXSGBVT8hPDPWkQvrjpHRArvTDJ0dckTQ iPEfAva7z/Z6Agxjzbus0N/TL3Hl59WkN8+2QZVT+ZBz4+5FVhxS3FQ7b71OCc4q 11QAbJk8bklpwQCiBFgz922vFa5XdnWq/1aWXFeIrkNhuhfAmM+pB99PrIib+GZM ZpU/1l9oynjlmgbuMuQDnoTjEMvtcM4so1Z/qXc56HIhTQfRo8gWIyCw50YGTO33 oFS1b7O9ilgTGcMpLlC9Vv7WHo0sXHpZ1wG6pLNQ7c1RSsBHHmx4gYYezf08cOeN 1Axa8G4s3dCx5kFyke5a =vdvo -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers Pull "Qualcomm ARM Based Driver Updates for v4.16 - Redo" from Andy Gross: * Fix error handling code in SMP2P probe * Update SMP2P to use ACPS as mailbox client * Add QMI support * Fixups for Qualcomm SCM * Fix licensing on rmtfs_mem * Correct SMSM child node lookup * Populate firmware nodes during platform init * tag 'qcom-drivers-for-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux: of: platform: populate /firmware/ node from of_platform_default_populate_init() soc: qcom: smp2p: Use common error handling code in qcom_smp2p_probe() soc: qcom: Introduce QMI helpers soc: qcom: Introduce QMI encoder/decoder firmware: qcom_scm: Add dependent headers to qcom_scm.h soc: qcom: smp2p: Access APCS as mailbox client soc: qcom: rmtfs_mem: add missing MODULE_DESCRIPTION/AUTHOR/LICENSE soc: qcom: smsm: fix child-node lookup firmware: qcom_scm: drop redandant of_platform_populate |
||
|
|
fa7e843a90 |
soc: mediatek: extend bus protection API
MT2712 add "set/clear" bus control register to each control register set instead of providing only one "enable" control register, we could avoid the read-modify-write racing by declaring "bus_prot_reg_update" as "false" in scp_soc_data or declaring as "true" to use the legacy update method. By improving the mtk-infracfg bus protection implementation to support set/clear bus protection control method by IC configuration. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
||
|
|
f780429adf |
soc: brcmstb: biuctrl: Move to early_initcall
Being called during early_initcall() is early enough that it occurs before SMP initialization, which is all we care about for the Bus Interface Unit configuration. This solves lack of BIU initialization on ARM64 platforms where we do not have an anchor where to put the BIU initialization (since there are no machine descriptors). Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> |
||
|
|
3830d0771e |
soc: qcom: Introduce QMI helpers
Drivers that needs to communicate with a remote QMI service all has to perform the operations of discovering the service, encoding and decoding the messages and operate the socket. This introduces an abstraction for these common operations, reducing most of the duplication in such cases. Acked-by: Chris Lew <clew@codeaurora.org> Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org> |
||
|
|
9b8a11e826 |
soc: qcom: Introduce QMI encoder/decoder
Add the helper library for encoding and decoding QMI encoded messages. The implementation is taken from lib/qmi_encdec.c of the Qualcomm kernel (msm-3.18). Modifications has been made to the public API, source buffers has been made const and the debug-logging part was omitted, for now. Acked-by: Chris Lew <clew@codeaurora.org> Tested-by: Chris Lew <clew@codeaurora.org> Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org> |
||
|
|
fc35c1966e |
We have two changes to the core framework this time around. The first being a
large change that introduces runtime PM support to the clk framework. Now we properly call runtime PM operations on the device providing a clk when the clk is in use. This helps on SoCs where the clks provided by a device need something to be powered on before using the clks, like power domains or regulators. It also helps power those things down when clks aren't in use. The other core change is a devm API addition for clk providers so we can get rid of a bunch of clk driver remove functions that are just doing of_clk_del_provider(). Outside of the core, we have the usual addition of clk drivers and smattering of non-critical fixes to existing drivers. The biggest diff is support for Mediatek MT2712 and MT7622 SoCs, but those patches really just add a bunch of data. By the way, we're trying something new here where we build the tree up with topic branches. We plan to work this into our workflow so that we don't step on each other's toes, and so the fixes branch can be merged on an as-needed basis. Core: - Runtime PM support for clk providers - devm API for of_clk_add_hw_provider() New Drivers: - Mediatek MT2712 and MT7622 - Renesas R-Car V3M SoC Updates: - Runtime PM support for Samsung exynos5433/exynos4412 providers - Removal of clkdev aliases on Samsung SoCs - Convert clk-gpio to use gpio descriptors - Various driver cleanups to match kernel coding style - Amlogic Video Processing Unit VPU and VAPB clks - Sigma-delta modulation for Allwinner audio PLLs - Allwinner A83t Display clks - Support for the second display unit clock on Renesas RZ/G1E - Suspend/resume support for Renesas R-Car Gen3 CPG/MSSR - New clock ids for Rockchip rk3188 and rk3368 SoCs - Various 'const' markings on clk_ops structures - RPM clk support on Qualcomm MSM8996/MSM8660 SoCs -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABCAAGBQJaD3qRAAoJEK0CiJfG5JUlOLgQAKWekgG/IYgcPzPWDYfg8Hwr sVVUK7+q7TVfbHsbYVikJuUaxutKZ0onnrYmOalTTyyxqL2E1/rYScnxdYHfcwX8 cyfHebRHsbh/Xg45ktwjzBkO49nwuppkpXd/V80GSBUZ+lsIVl5DUrrFAZdRUEdr CEsAsF9tEWIl+0gqXYNuiKBV7QAYv5BUPrbJQf0PwL6jX0OAhLv+ukfN8BdmYsOb rdoqhdgmyHkTuIMqsC/H2yP59aAKBse7wxIYebDiTdbPWfTkC9q927fTs4A02F6L sHfLvCpfuB4rOjXy6LSd1gMGWIcjotZai+idHBqtNLLVz6exF1QpUCp+pZjEULbA /Sx9lk8A3cYoa8pTu1NrrZbZX17iHkFswqMF3T20nhUN9+Ti597ZEbRcWDcoEZtw v2NznOTJ7Mm2SrNHOvDklstggNIGcwiAEePGMo7rJNEQZChpDjQj/gJWKzn0UwL4 zfk+0EzoejPdvZ5FJUfmlr8Tqk53uw+y7/0xQ6gf8lDviTrzzoeXtJUyumGBiuGx RxFywf8n02oLYRJm5hu+0NkC+/bX0Lxg/kwiR6FLBFbBFgkWyp7FGcxhlm6ZiBfe 0KkPciWslNavn5KhljIkZDbXymbvhhSr9uBEFsyeJueA5q7sSghWloL8Ag1cac3W e6swD1ngXtM/t5gjOLhR =hC7z -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "We have two changes to the core framework this time around. The first being a large change that introduces runtime PM support to the clk framework. Now we properly call runtime PM operations on the device providing a clk when the clk is in use. This helps on SoCs where the clks provided by a device need something to be powered on before using the clks, like power domains or regulators. It also helps power those things down when clks aren't in use. The other core change is a devm API addition for clk providers so we can get rid of a bunch of clk driver remove functions that are just doing of_clk_del_provider(). Outside of the core, we have the usual addition of clk drivers and smattering of non-critical fixes to existing drivers. The biggest diff is support for Mediatek MT2712 and MT7622 SoCs, but those patches really just add a bunch of data. By the way, we're trying something new here where we build the tree up with topic branches. We plan to work this into our workflow so that we don't step on each other's toes, and so the fixes branch can be merged on an as-needed basis. Summary: Core: - runtime PM support for clk providers - devm API for of_clk_add_hw_provider() New Drivers: - Mediatek MT2712 and MT7622 - Renesas R-Car V3M SoC Updates: - runtime PM support for Samsung exynos5433/exynos4412 providers - removal of clkdev aliases on Samsung SoCs - convert clk-gpio to use gpio descriptors - various driver cleanups to match kernel coding style - Amlogic Video Processing Unit VPU and VAPB clks - sigma-delta modulation for Allwinner audio PLLs - Allwinner A83t Display clks - support for the second display unit clock on Renesas RZ/G1E - suspend/resume support for Renesas R-Car Gen3 CPG/MSSR - new clock ids for Rockchip rk3188 and rk3368 SoCs - various 'const' markings on clk_ops structures - RPM clk support on Qualcomm MSM8996/MSM8660 SoCs" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (137 commits) clk: stm32h7: fix test of clock config clk: pxa: fix building on older compilers clk: sunxi-ng: a83t: Fix i2c buses bits clk: ti: dra7-atl-clock: fix child-node lookups clk: qcom: common: fix legacy board-clock registration clk: uniphier: fix DAPLL2 clock rate of Pro5 clk: uniphier: fix parent of miodmac clock data clk: hi3798cv200: correct parent mux clock for 'clk_sdio0_ciu' clk: hisilicon: Delete an error message for a failed memory allocation in hisi_register_clkgate_sep() clk: hi3660: fix incorrect uart3 clock freqency clk: kona-setup: Delete error messages for failed memory allocations ARC: clk: fix spelling mistake: "configurarion" -> "configuration" clk: cdce925: remove redundant check for non-null parent_name clk: versatile: Improve sizeof() usage clk: versatile: Delete error messages for failed memory allocations clk: ux500: Improve sizeof() usage clk: ux500: Delete error messages for failed memory allocations clk: spear: Delete error messages for failed memory allocations clk: ti: Delete error messages for failed memory allocations clk: mmp: Adjust checks for NULL pointers ... |
||
|
|
894025f24b |
USB/PHY patches for 4.15-rc1
Here is the big set of USB and PHY driver updates for 4.15-rc1. There is the usual amount of gadget and xhci driver updates, along with phy and chipidea enhancements. There's also a lot of SPDX tags and license boilerplate cleanups as well, which provide some churn in the diffstat. Other major thing is the typec code that moved out of staging and into the "real" part of the drivers/usb/ tree, which was nice to see happen. All of these have been in linux-next with no reported issues for a while. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWgm/Vw8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+yktXwCdGgpInfOEvOGFd83EPDL7a1ncyc4AoM5wI8yl 1CeLipqVIN3IsMMJptvb =zvDI -----END PGP SIGNATURE----- Merge tag 'usb-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB/PHY updates from Greg KH: "Here is the big set of USB and PHY driver updates for 4.15-rc1. There is the usual amount of gadget and xhci driver updates, along with phy and chipidea enhancements. There's also a lot of SPDX tags and license boilerplate cleanups as well, which provide some churn in the diffstat. Other major thing is the typec code that moved out of staging and into the "real" part of the drivers/usb/ tree, which was nice to see happen. All of these have been in linux-next with no reported issues for a while" * tag 'usb-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (263 commits) usb: gadget: f_fs: Fix use-after-free in ffs_free_inst USB: usbfs: compute urb->actual_length for isochronous usb: core: message: remember to reset 'ret' to 0 when necessary USB: typec: Remove remaining redundant license text USB: typec: add SPDX identifiers to some files USB: renesas_usbhs: rcar?.h: add SPDX tags USB: chipidea: ci_hdrc_tegra.c: add SPDX line USB: host: xhci-debugfs: add SPDX lines USB: add SPDX identifiers to all remaining Makefiles usb: host: isp1362-hcd: remove a couple of redundant assignments USB: adutux: remove redundant variable minor usb: core: add a new usb_get_ptm_status() helper usb: core: add a 'type' parameter to usb_get_status() usb: core: introduce a new usb_get_std_status() helper usb: core: rename usb_get_status() 'type' argument to 'recip' usb: core: add Status Type definitions USB: gadget: Remove redundant license text USB: gadget: function: Remove redundant license text USB: gadget: udc: Remove redundant license text USB: gadget: legacy: Remove redundant license text ... |
||
|
|
b24413180f |
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
||
|
|
7066fdd0d7 |
clk: qcom: clk-smd-rpm: add msm8996 rpmclks
Add all RPM controlled clocks on msm8996 platform [srini: Fixed various issues with offsets and made names specific to msm8996] Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
||
|
|
7f20333fe7 |
soc: brcmstb: Add Product ID and Family ID helper functions
Add Product ID and Family ID helper functions for brcmstb soc. Signed-off-by: Al Cooper <alcooperx@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> |
||
|
|
ae46654bcf |
ARM: SoC driver updates for v4.14
This branch contains platform-related driver updates for ARM and ARM64.
Among them:
- Reset driver updates:
+ New API for dealing with arrays of resets
+ Make unimplemented {de,}assert return success on shared resets
+ MSDKv1 driver
+ Removal of obsolete Gemini reset driver
+ Misc updates for sunxi and Uniphier
- SoC drivers:
+ Platform SoC driver registration on Tegra
+ Shuffle of Qualcomm drivers into a submenu
+ Allwinner A64 support for SRAM
+ Renesas R-Car R3 support
+ Power domains for Rockchip RK3366
- Misc updates and smaller fixes for TEE and memory driver subsystems
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZtdt7AAoJEIwa5zzehBx3EboP/jR2T9lrMavXR1zL48L14yJb
S+fiJlrX1Kr42UF4PQvsfs+uTqOLmycrPVFkMb6IwoUPzQ9UCOSoiMzYm2b7ZPvt
uIesHhdM3/xun6wKfieN8GmNA1yDVynTxo0TTYDw5ha7I6s2GHgw0GSFzy3wm0Qg
KzerAO3gzf3L5XsKR0cai3IXNjHO9ubpFG1ReR09da28nPElP8ggWg0KnqdO76Ch
BGpFj78EC875ZNqwHgnspUqgGDJnBjig3m/uA4FWA0G9Jl38tCyKTZfUR7cEraoV
kyCgBlR/UrI8eXVTyEy5k5iTsQ3A1VhX4rGjyH+5NZHTs1yWr4+RDND/qeGl9tSo
VASuOtH6Rc3vdUDpHPBNAFNQH8fwwDoKf96dvN1tiffsx6LSKb//NyOfkXzKOtR6
CP5raYfX4YktLtHq0XVTZ/6r3XmLcTHzElR/dCFpQOFcTOYii0pWtfcWouahbZ1w
dhoBX/dbNq37MfzrxtHN2VTIEHpn2GU7u+ZGkp2ArokD58BAft/M3Xee1cDnF75g
ZDwe5eNFT8aBZKaY7zwG8cdxiw9kACAivDRwW+zgpfUr39c+d0+QmVfnfJh4EGXK
Ri6yr2EfBWK6jw3cwkdSyyt7iSzIkB+RiuuD1MjpYhWzAvoDpzqkXYukFGbpXnuy
vUFHNuP1ocUsRtCs8mm1
=yBzS
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"This branch contains platform-related driver updates for ARM and ARM64.
Among them:
- Reset driver updates:
+ New API for dealing with arrays of resets
+ Make unimplemented {de,}assert return success on shared resets
+ MSDKv1 driver
+ Removal of obsolete Gemini reset driver
+ Misc updates for sunxi and Uniphier
- SoC drivers:
+ Platform SoC driver registration on Tegra
+ Shuffle of Qualcomm drivers into a submenu
+ Allwinner A64 support for SRAM
+ Renesas R-Car R3 support
+ Power domains for Rockchip RK3366
- Misc updates and smaller fixes for TEE and memory driver
subsystems"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
firmware: arm_scpi: fix endianness of dev_id in struct dev_pstate_set
soc/tegra: fuse: Add missing semi-colon
soc/tegra: Restrict SoC device registration to Tegra
drivers: soc: sunxi: add support for A64 and its SRAM C
drivers: soc: sunxi: add support for remapping func value to reg value
drivers: soc: sunxi: fix error processing on base address when claiming
dt-bindings: add binding for Allwinner A64 SRAM controller and SRAM C
bus: sunxi-rsb: Enable by default for ARM64
soc/tegra: Register SoC device
firmware: tegra: set drvdata earlier
memory: Convert to using %pOF instead of full_name
soc: Convert to using %pOF instead of full_name
bus: Convert to using %pOF instead of full_name
firmware: Convert to using %pOF instead of full_name
soc: mediatek: add SCPSYS power domain driver for MediaTek MT7622 SoC
soc: mediatek: add header files required for MT7622 SCPSYS dt-binding
soc: mediatek: reduce code duplication of scpsys_probe across all SoCs
dt-bindings: soc: update the binding document for SCPSYS on MediaTek MT7622 SoC
reset: uniphier: add analog amplifiers reset control
reset: uniphier: add video input subsystem reset control
...
|