Commit Graph

27212 Commits

Author SHA1 Message Date
Darren Powell
2ecf214b45 amdgpu/pm: Optimize emit_clock_levels for aldebaran - part 1
Use variables to remove the multiple nested ternary expressions
 and improve readability. This will help to optimize the code
 duplication in the switch statement
 Also Changed:
  Modify function aldebaran_get_clk_table to void function as it
    always returns 0
  Use const string "attempt_string" to cut down on repetition

Signed-off-by: Darren Powell <darren.powell@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:33:54 -04:00
Darren Powell
bc22d9e0ee amdgpu/pm: Replace print_clock_levels with emit_clock_levels for aldebaran
Replace print_clock_levels with emit_clock_levels for aldebaran
  * replace .print_clk_levels with .emit_clk_levels in aldebaran_ppt_funcs
  * added extra parameter int *offset
  * removed var size, uses arg *offset instead
  * removed call to smu_cmn_get_sysfs_buf
  * errors are returned to caller
  * returns 0 on success
additional incidental changes
  * changed type of vars i, now to remove comparing mismatch types
  * renamed var s/now/cur_value/
  * switch statement default now returns -EINVAL
  * RAS Recovery returns -EBUSY

Based on
  commit b06b48d7dd ("amdgpu/pm: Implement emit_clk_levels for navi10")

Signed-off-by: Darren Powell <darren.powell@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:33:15 -04:00
Yang Li
869df1432f drm/amd/display: clean up some inconsistent indentings
drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c:288 dcn35_update_clocks() warn: inconsistent indenting

Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:33:13 -04:00
Yang Li
9f720e4999 drm/amd/display: clean up some inconsistent indentings
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn35/dcn35_hwseq.c:159 dcn35_init_hw() warn: inconsistent indentig

Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:33:10 -04:00
Yang Li
77dcb33ccb drm/amd/display: clean up one inconsistent indenting
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn35/dcn35_resource.c:1877 dcn35_resource_construct() warn: inconsistent indenting

Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:33:08 -04:00
Yang Li
1bb5ed6ffc drm/amd/display: clean up one inconsistent indenting
drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_srv.c:355 dmub_srv_hw_setup() warn: inconsistent indenting

Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:33:05 -04:00
Yang Li
4500cdf072 drm/amd/display: Remove duplicated include in dcn35_clk_mgr.c
./drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c: dcn35_clk_mgr.h is included more than once.

Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:33:03 -04:00
Hamza Mahfooz
084f658ece drm/amd/display: prevent potential division by zero errors
There are two places in apply_below_the_range() where it's possible for
a divide by zero error to occur. So, to fix this make sure the divisor
is non-zero before attempting the computation in both cases.

Cc: stable@vger.kernel.org
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2637
Fixes: a463b26303 ("drm/amd/display: Fix frames_to_insert math")
Fixes: ded6119e82 ("drm/amd/display: Reinstate LFC optimization")
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:32:39 -04:00
Yang Li
3b96ec9633 drm/amd/display: Remove duplicated include in dcn35_hwseq.c
./drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hwseq.c: clk_mgr.h is included more than once.

Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:32:36 -04:00
Yang Li
bde5f439b8 drm/amd/display: Remove duplicated include in dcn35_optc.c
./drivers/gpu/drm/amd/display/dc/dcn35/dcn35_optc.c: dcn35_optc.h is included more than once.

Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:32:34 -04:00
Yang Li
209d15ffd0 drm/amd/display: Remove duplicated include in dcn35_resource.c
./drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c: dcn31/dcn31_dio_link_encoder.h is included more than once.

Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:32:31 -04:00
Jiapeng Chong
df04434cb5 drm/amdgpu: clean up some inconsistent indenting
No functional modification involved.

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c:34 nbio_v7_11_get_rev_id() warn: inconsistent indenting.

v2: drop leftover printk (Alex)

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=6316
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:32:25 -04:00
Melissa Wen
fabd2165d1 drm/amd/display: enable cursor degamma for DCN3+ DRM legacy gamma
For DRM legacy gamma, AMD display manager applies implicit sRGB degamma
using a pre-defined sRGB transfer function. It works fine for DCN2
family where degamma ROM and custom curves go to the same color block.
But, on DCN3+, degamma is split into two blocks: degamma ROM for
pre-defined TFs and `gamma correction` for user/custom curves and
degamma ROM settings doesn't apply to cursor plane. To get DRM legacy
gamma working as expected, enable cursor degamma ROM for implict sRGB
degamma on HW with this configuration.

Cc: stable@vger.kernel.org
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2803
Fixes: 96b020e216 ("drm/amd/display: check attr flag before set cursor degamma on DCN3+")
Signed-off-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:32:10 -04:00
Yifan Zhang
0bdf09cc5e drm/amdgpu: calling address translation functions to simplify codes
Use amdgpu_gmc_vram_pa to simplify codes.

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:31:52 -04:00
Yifan Zhang
2e3b2cb9b8 drm/amd/pm: only poweron/off vcn/jpeg when they are valid.
If vcn is disabled in kernel parameters, don't touch vcn,
otherwise it may cause vcn hang.

v2: delete unnecessary logs
v3: move "is_vcn_enabled" check to smu_dpm_setvcn/jpeg_enable (Evan)

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:31:44 -04:00
Hamza Mahfooz
813ba1ff84 drm/amd/display: limit the v_startup workaround to ASICs older than DCN3.1
Since, calling dcn20_adjust_freesync_v_startup() on DCN3.1+ ASICs
can cause the display to flicker and underflow to occur, we shouldn't
call it for them. So, ensure that the DCN version is less than
DCN_VERSION_3_1 before calling dcn20_adjust_freesync_v_startup().

Cc: stable@vger.kernel.org
Reviewed-by: Fangzhi Zuo <jerry.zuo@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:31:33 -04:00
Dembskiy Igor
19d5f80128 drm/amd/display: remove useless check in should_enable_fbc()
It does not make sense to compare a pointer to array element with NULL.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Fixes: 65d38262b3 ("drm/amd/display: fbc state could not reach while enable fbc")
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Dembskiy Igor <dii@itb.spb.ru>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:31:17 -04:00
Hamza Mahfooz
63461ea3fb Revert "drm/amd/display: Remove v_startup workaround for dcn3+"
This reverts commit 3a31e8b89b.

We still need to call dcn20_adjust_freesync_v_startup() for older DCN3+
ASICs. Otherwise, it can cause DP to HDMI 2.1 PCONs to fail to light up.

Cc: stable@vger.kernel.org
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2809
Reviewed-by: Fangzhi Zuo <jerry.zuo@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:30:45 -04:00
Evan Quan
173df1eaa8 Revert "drm/amd/pm: disable the SMU13 OD feature support temporarily"
This reverts commit 510d242f49.

The enablement for the new OD mechanism completed. Also, the support for
fan control related OD feature has been added via this new mechanism.
Thus, it is time to bring back the SMU13 OD support.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:22 -04:00
Evan Quan
9df5d00870 drm/amd/pm: add fan minimum pwm OD setting support for SMU13
Add SMU13 fan minimum pwm OD setting support.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:21 -04:00
Evan Quan
eedd5a343d drm/amd/pm: add fan target temperature OD setting support for SMU13
Add SMU13 fan target temperature OD setting support.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:21 -04:00
Evan Quan
47cf6fcb88 drm/amd/pm: add fan acoustic target OD setting support for SMU13
Add SMU13 fan acoustic target OD setting support.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:21 -04:00
Lang Yu
983ac45a06 drm/amdgpu: update SET_HW_RESOURCES definition for UMSCH
Align with FW changes.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:21 -04:00
Lang Yu
eebb06d121 drm/amdgpu: add amdgpu_umsch_mm module parameter
Enable Multi Media User Mode Scheduler
(0 = disabled (default), 1 = enabled).

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:21 -04:00
Lang Yu
822f780829 drm/amdgpu/discovery: enable UMSCH 4.0 in IP discovery
Enable UMSCH to support VPE and VCN user queues.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:21 -04:00
Lang Yu
4f94903332 drm/amdgpu: add PSP loading support for UMSCH
Add front door loading support.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:21 -04:00
Lang Yu
40748f9a0a drm/amdgpu: reserve mmhub engine 3 for UMSCH FW
UMSCH FW uses mmhub engine 3 for invalidation.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:21 -04:00
Lang Yu
d591ae0c9f drm/amdgpu: add VPE queue submission test
Submit a fence command through indirect buffer.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:21 -04:00
Lang Yu
5d5eac7e83 drm/amdgpu: add selftest framework for UMSCH
Prepare for VPE and VCN queue submission test.

v2: rebase on drm_exec (Alex)

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:21 -04:00
Lang Yu
dc6f3d6ff2 drm/amdgpu: enable UMSCH scheduling for VPE
Add VPE into UMSCH hw resourses,
set vmid mask to 0xf00,
set hqd mask to 0xfe,
then UMSCH can schedule VPE queues.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:40:56 -04:00
Lang Yu
3488c79bea drm/amdgpu: add initial support for UMSCH
Add basic data structure, dummy ring functions
and ip functions for UMSCH.

Implement sw_init(ring_init and init_microcodede) and
hw_init(load_microcode), UMSCH can boot up now.

Implement hw_init(ring_start) and hw_fini(ring_stop),
UMSCH is ready for command submission now.

Implement set_hw_resources and add/remove_queue,
UMSCH is ready for scheduling now.

Aggregated doorbell is used to notify UMSCH FW that
there is unmapped queue with corresponding priority level
(e.g., AGDB[0] for Real time band, etc.) is updating its job.

v2: squash together initial patches to avoid breaking the
    build (Alex)

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:40:53 -04:00
Lang Yu
2da1b04a20 drm/amdgpu: add UMSCH 4.0 api definition
Add api definition for UMSCH 4.0.

v2: adjust coding style.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:40:50 -04:00
Lang Yu
9c852a42a9 drm/amdgpu: add UMSCH firmware header definition
Add firmware header definition for UMSCH.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:40:45 -04:00
Lang Yu
1a29f36781 drm/amdgpu: add UMSCH RING TYPE definition
Add RING TYPE definition for Multi Mdeia User Mode Scheduler.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:40:40 -04:00
Evan Quan
548009ad1c drm/amd/pm: add fan acoustic limit OD setting support for SMU13
Add SMU13 fan acoustic limit OD setting support.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:40:25 -04:00
Evan Quan
d7bf1b556f drm/amd/pm: add fan temperature/pwm curve OD setting support for SMU13
Add SMU13 fan temperature/pwm curve OD setting support.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:40:14 -04:00
Saleemkhan Jamadar
1cf36599b9 drm/amdgpu/jpeg: initialize number of jpeg ring
Initialize number of jpeg ring for vcn 4.0.5.

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:39:41 -04:00
Christian König
a5492fe27f drm/amdgpu: fix amdgpu_cs_p1_user_fence
The offset is just 32bits here so this can potentially overflow if
somebody specifies a large value. Instead reduce the size to calculate
the last possible offset.

The error handling path incorrectly drops the reference to the user
fence BO resulting in potential reference count underflow.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:39:28 -04:00
Evan Quan
90bcb9b595 drm/amdgpu: revise the device initialization sequences
By placing the sysfs interfaces creation after `.late_int`. Since some
operations performed during `.late_init` may affect how the sysfs
interfaces should be created.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:35:33 -04:00
Evan Quan
3e38b634f9 drm/amd/pm: introduce a new set of OD interfaces
There will be multiple interfaces(sysfs files) exposed with each representing
a single OD functionality. And all those interface will be arranged in a tree
liked hierarchy with the top dir as "gpu_od". Meanwhile all functionalities
for the same component will be arranged under the same directory.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:35:26 -04:00
Lang Yu
2cd1f65d31 drm/amdgpu: add UMSCH IP BLOCK TYPE definition
Add IP BLOCK TYPE definition for Multimedia User Mode Scheduler
which is a hardware scheduler for VCN and VPE workload.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:35:23 -04:00
Darren Powell
433c4dea31 amdgpu/pm: Optimize emit_clock_levels for arcturus - part 3
split switch statement into two and consolidate the common
     code for printing most of the types of clock speeds

Signed-off-by: Darren Powell <darren.powell@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:35:11 -04:00
Lang Yu
2c98de563b drm/amdgpu: add UMSCH 4.0 register headers
Add headers for UMSCH 4.0.

v2: updates (Alex)

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:35:06 -04:00
Saleemkhan Jamadar
6be6e74b7d drm/amdgpu: enable PG flags for VCN
Enable PG flags for VCN and Jpeg on IP 11_5_0

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:35:02 -04:00
Saleemkhan Jamadar
844d8dd5b9 drm/amdgpu/discovery: add VCN 4.0.5 Support
Enable VCN 4.0.5 on gc 11_5_0.

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:58 -04:00
Saleemkhan Jamadar
c64f389506 drm/amdgpu/soc21: Add video cap query support for VCN_4_0_5
Added the video capability query support for VCN version 4_0_5

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:52 -04:00
Saleemkhan Jamadar
cc308acc9b drm/amdgpu:enable CG and PG flags for VCN
Enable CG and PG flags for VCN on IP 11_5_0

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:48 -04:00
Saleemkhan Jamadar
1827b37582 drm/amdgpu: add VCN_4_0_5 firmware support
Add VCN_4_0_5 firmware support

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:43 -04:00
Saleemkhan Jamadar
8f98a715da drm/amdgpu/jpeg: add jpeg support for VCN4_0_5
Add jpeg support for VCN4_0_5

v2 - update license year (Leo Liu)

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:36 -04:00
Saleemkhan Jamadar
547aad32ed drm/amdgpu: add VCN4 ip block support
Add VCN 4.0.5 initialization and decoder/encoder ring functions.

v2 - update license year (Leo Liu)

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:32 -04:00