4 Commits

Author	SHA1	Message	Date
Vince Weaver	2cc9e588b0	arc, perf: Use common PMU interrupt disabled code ... Transition to using the new generic PERF_PMU_CAP_NO_INTERRUPT method for failing a sampling event when no PMU interrupt is available. Signed-off-by: Vince Weaver <vincent.weaver@maine.edu> Acked-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Rob Herring <robh+dt@kernel.org> Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1406150159280.16738@vincent-weaver-1.umelst.maine.edu Signed-off-by: Ingo Molnar <mingo@kernel.org>	2014-06-18 18:43:44 +02:00
Vineet Gupta	da990a4f2d	ARC: [perf] Fix a few thinkos ... Signed-off-by: Vineet Gupta <vgupta@synopsys.com>	2013-11-28 15:49:59 +05:30
Mischa Jonker	230c4aadcc	ARC: perf: ARC 700 PMU doesn't support sampling events ... The ARC 700 does not have an interrupt associated with it, and as such it cannot trigger when a counter overflows. As the counters are 48 bit, it will usually take at least 100 days before a counter overflows, so for mere counting of events, there is no problem. Sampling is not supported though. Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Acked-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>	2013-11-15 10:52:28 +05:30
Mischa Jonker	0dd450fe13	ARC: Add perf support for ARC700 cores ... This adds basic perf support for ARC700 cores. Most PERF_COUNT_HW* events are supported now. Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Acked-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>	2013-11-12 09:45:38 +05:30