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Merge branch 'for-thierry/arm-smmu' into for-joerg/arm-smmu/updates
Merge in support for the Arm SMMU '->probe_finalize()' implementation callback, which is required to prevent early faults in conjunction with Nvidia's memory controller. * for-thierry/arm-smmu: iommu/arm-smmu: Check smmu->impl pointer before dereferencing iommu/arm-smmu: Implement ->probe_finalize()
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commit
ddd25670d3
@ -1454,6 +1454,18 @@ static void arm_smmu_release_device(struct device *dev)
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iommu_fwspec_free(dev);
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}
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static void arm_smmu_probe_finalize(struct device *dev)
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{
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struct arm_smmu_master_cfg *cfg;
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struct arm_smmu_device *smmu;
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cfg = dev_iommu_priv_get(dev);
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smmu = cfg->smmu;
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if (smmu->impl && smmu->impl->probe_finalize)
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smmu->impl->probe_finalize(smmu, dev);
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}
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static struct iommu_group *arm_smmu_device_group(struct device *dev)
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{
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struct arm_smmu_master_cfg *cfg = dev_iommu_priv_get(dev);
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@ -1573,6 +1585,7 @@ static struct iommu_ops arm_smmu_ops = {
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.iova_to_phys = arm_smmu_iova_to_phys,
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.probe_device = arm_smmu_probe_device,
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.release_device = arm_smmu_release_device,
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.probe_finalize = arm_smmu_probe_finalize,
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.device_group = arm_smmu_device_group,
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.enable_nesting = arm_smmu_enable_nesting,
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.set_pgtable_quirks = arm_smmu_set_pgtable_quirks,
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@ -439,6 +439,7 @@ struct arm_smmu_impl {
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struct device *dev, int start);
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void (*write_s2cr)(struct arm_smmu_device *smmu, int idx);
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void (*write_sctlr)(struct arm_smmu_device *smmu, int idx, u32 reg);
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void (*probe_finalize)(struct arm_smmu_device *smmu, struct device *dev);
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};
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#define INVALID_SMENDX -1
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