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drm/amdgpu: cleanup visible vram size handling
Centralize the limit handling and validation in one place instead of spreading that around in different hw generations. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Luben Tuikov <luben.tuikov@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -201,6 +201,7 @@ uint64_t amdgpu_gmc_agp_addr(struct ttm_buffer_object *bo)
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void amdgpu_gmc_vram_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc,
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u64 base)
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{
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uint64_t vis_limit = (uint64_t)amdgpu_vis_vram_limit << 20;
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uint64_t limit = (uint64_t)amdgpu_vram_limit << 20;
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mc->vram_start = base;
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@ -208,6 +209,12 @@ void amdgpu_gmc_vram_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc,
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if (limit && limit < mc->real_vram_size)
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mc->real_vram_size = limit;
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if (vis_limit && vis_limit < mc->visible_vram_size)
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mc->visible_vram_size = vis_limit;
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if (mc->real_vram_size < mc->visible_vram_size)
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mc->visible_vram_size = mc->real_vram_size;
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if (mc->xgmi.num_physical_nodes == 0) {
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mc->fb_start = mc->vram_start;
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mc->fb_end = mc->vram_end;
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@ -1718,7 +1718,6 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
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{
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uint64_t gtt_size;
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int r;
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u64 vis_vram_limit;
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mutex_init(&adev->mman.gtt_window_lock);
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@ -1741,12 +1740,6 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
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return r;
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}
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/* Reduce size of CPU-visible VRAM if requested */
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vis_vram_limit = (u64)amdgpu_vis_vram_limit * 1024 * 1024;
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if (amdgpu_vis_vram_limit > 0 &&
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vis_vram_limit <= adev->gmc.visible_vram_size)
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adev->gmc.visible_vram_size = vis_vram_limit;
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/* Change the size here instead of the init above so only lpfn is affected */
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amdgpu_ttm_set_buffer_funcs_status(adev, false);
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#ifdef CONFIG_64BIT
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@ -847,10 +847,7 @@ static int gmc_v10_0_mc_init(struct amdgpu_device *adev)
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}
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#endif
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/* In case the PCI BAR is larger than the actual amount of vram */
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adev->gmc.visible_vram_size = adev->gmc.aper_size;
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if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
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adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
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/* set the gart size */
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if (amdgpu_gart_size == -1) {
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@ -389,10 +389,7 @@ static int gmc_v7_0_mc_init(struct amdgpu_device *adev)
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}
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#endif
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/* In case the PCI BAR is larger than the actual amount of vram */
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adev->gmc.visible_vram_size = adev->gmc.aper_size;
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if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
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adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
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/* set the gart size */
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if (amdgpu_gart_size == -1) {
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@ -587,10 +587,7 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev)
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}
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#endif
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/* In case the PCI BAR is larger than the actual amount of vram */
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adev->gmc.visible_vram_size = adev->gmc.aper_size;
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if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
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adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
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/* set the gart size */
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if (amdgpu_gart_size == -1) {
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@ -1552,10 +1552,7 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
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}
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#endif
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/* In case the PCI BAR is larger than the actual amount of vram */
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adev->gmc.visible_vram_size = adev->gmc.aper_size;
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if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
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adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
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/* set the gart size */
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if (amdgpu_gart_size == -1) {
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