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riscv: dts: starfive: visionfive 2: correct spi's ss pin

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The ss pin of spi0 is the same as sck pin. According to the
visionfive 2 documentation, it should be pin 49 instead of 48.

Fixes: 74fb20c8f0 ("riscv: dts: starfive: Add spi node and pins configuration")
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Nam Cao <namcao@linutronix.de>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
Nam Cao 2023-10-12 11:17:29 +02:00 committed by Conor Dooley
parent 1558209533
commit cf98fe6b57
1 changed files with 1 additions and 1 deletions
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2
arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
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@ -431,7 +431,7 @@
};
ss-pins {
pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_FSS,
pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS,
GPOEN_ENABLE,
GPI_SYS_SPI0_FSS)>;
bias-disable;