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dt-bindings: iommu: renesas, ipmmu-vmsa: Update for R-Car Gen4

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Since R-Car Gen4 does not have the main IPMMU IMSSTR register, update
the bindings to drop the interrupt bit number from the
renesas,ipmmu-main property.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
[geert: Re-add removed items level, add minItems/maxItems constraints]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230313124026.954514-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
Yoshihiro Shimoda 2023-03-13 21:40:26 +09:00 committed by Joerg Roedel
parent efe37fda9d
commit b67ab6fb63
1 changed files with 24 additions and 8 deletions
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32
Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml
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@ -74,16 +74,16 @@ properties:
renesas,ipmmu-main:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- minItems: 1
items:
- description: phandle to main IPMMU
- description: the interrupt bit number associated with the particular
cache IPMMU device. The interrupt bit number needs to match the main
IPMMU IMSSTR register. Only used by cache IPMMU instances.
- description:
The interrupt bit number associated with the particular cache
IPMMU device. If present, the interrupt bit number needs to match
the main IPMMU IMSSTR register. Only used by cache IPMMU
instances.
description:
Reference to the main IPMMU phandle plus 1 cell. The cell is
the interrupt bit number associated with the particular cache IPMMU
device. The interrupt bit number needs to match the main IPMMU IMSSTR
register. Only used by cache IPMMU instances.
Reference to the main IPMMU.
required:
- compatible
@ -109,6 +109,22 @@ allOf:
required:
- power-domains
- if:
properties:
compatible:
contains:
const: renesas,rcar-gen4-ipmmu-vmsa
then:
properties:
renesas,ipmmu-main:
items:
- maxItems: 1
else:
properties:
renesas,ipmmu-main:
items:
- minItems: 2
examples:
- |
#include <dt-bindings/clock/r8a7791-cpg-mssr.h>