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ice: embed &ice_rq_event_info event into struct ice_aq_task
Expose struct ice_aq_task to callers, what takes burden of memory ownership out from AQ-wait family of functions, and reduces need for heap-based allocations. Embed struct ice_rq_event_info event into struct ice_aq_task (instead of it being a ptr) to remove some more code from the callers. Subsequent commit will improve more based on this one. Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Signed-off-by: Przemek Kitszel <przemyslaw.kitszel@intel.com> Reviewed-by: Simon Horman <horms@kernel.org> Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel) Reviewed-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
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e1e8a142c4
commit
b214b98a7f
@ -917,8 +917,22 @@ void ice_fdir_release_flows(struct ice_hw *hw);
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void ice_fdir_replay_flows(struct ice_hw *hw);
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void ice_fdir_replay_flows(struct ice_hw *hw);
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void ice_fdir_replay_fltrs(struct ice_pf *pf);
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void ice_fdir_replay_fltrs(struct ice_pf *pf);
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int ice_fdir_create_dflt_rules(struct ice_pf *pf);
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int ice_fdir_create_dflt_rules(struct ice_pf *pf);
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int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout,
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struct ice_rq_event_info *event);
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enum ice_aq_task_state {
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ICE_AQ_TASK_WAITING,
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ICE_AQ_TASK_COMPLETE,
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ICE_AQ_TASK_CANCELED,
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};
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struct ice_aq_task {
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struct hlist_node entry;
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struct ice_rq_event_info event;
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enum ice_aq_task_state state;
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u16 opcode;
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};
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int ice_aq_wait_for_event(struct ice_pf *pf, struct ice_aq_task *task,
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u16 opcode, unsigned long timeout);
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int ice_open(struct net_device *netdev);
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int ice_open(struct net_device *netdev);
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int ice_open_internal(struct net_device *netdev);
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int ice_open_internal(struct net_device *netdev);
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int ice_stop(struct net_device *netdev);
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int ice_stop(struct net_device *netdev);
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@ -293,13 +293,12 @@ ice_write_one_nvm_block(struct ice_pf *pf, u16 module, u32 offset,
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{
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{
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u16 completion_module, completion_retval;
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u16 completion_module, completion_retval;
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struct device *dev = ice_pf_to_dev(pf);
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struct device *dev = ice_pf_to_dev(pf);
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struct ice_rq_event_info event;
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struct ice_aq_task task = {};
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struct ice_hw *hw = &pf->hw;
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struct ice_hw *hw = &pf->hw;
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struct ice_aq_desc *desc;
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u32 completion_offset;
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u32 completion_offset;
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int err;
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int err;
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memset(&event, 0, sizeof(event));
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dev_dbg(dev, "Writing block of %u bytes for module 0x%02x at offset %u\n",
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dev_dbg(dev, "Writing block of %u bytes for module 0x%02x at offset %u\n",
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block_size, module, offset);
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block_size, module, offset);
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@ -319,7 +318,7 @@ ice_write_one_nvm_block(struct ice_pf *pf, u16 module, u32 offset,
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* is conservative and is intended to prevent failure to update when
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* is conservative and is intended to prevent failure to update when
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* firmware is slow to respond.
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* firmware is slow to respond.
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*/
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*/
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err = ice_aq_wait_for_event(pf, ice_aqc_opc_nvm_write, 15 * HZ, &event);
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err = ice_aq_wait_for_event(pf, &task, ice_aqc_opc_nvm_write, 15 * HZ);
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if (err) {
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if (err) {
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dev_err(dev, "Timed out while trying to flash module 0x%02x with block of size %u at offset %u, err %d\n",
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dev_err(dev, "Timed out while trying to flash module 0x%02x with block of size %u at offset %u, err %d\n",
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module, block_size, offset, err);
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module, block_size, offset, err);
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@ -327,11 +326,12 @@ ice_write_one_nvm_block(struct ice_pf *pf, u16 module, u32 offset,
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return -EIO;
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return -EIO;
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}
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}
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completion_module = le16_to_cpu(event.desc.params.nvm.module_typeid);
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desc = &task.event.desc;
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completion_retval = le16_to_cpu(event.desc.retval);
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completion_module = le16_to_cpu(desc->params.nvm.module_typeid);
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completion_retval = le16_to_cpu(desc->retval);
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completion_offset = le16_to_cpu(event.desc.params.nvm.offset_low);
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completion_offset = le16_to_cpu(desc->params.nvm.offset_low);
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completion_offset |= event.desc.params.nvm.offset_high << 16;
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completion_offset |= desc->params.nvm.offset_high << 16;
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if (completion_module != module) {
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if (completion_module != module) {
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dev_err(dev, "Unexpected module_typeid in write completion: got 0x%x, expected 0x%x\n",
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dev_err(dev, "Unexpected module_typeid in write completion: got 0x%x, expected 0x%x\n",
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@ -363,8 +363,8 @@ ice_write_one_nvm_block(struct ice_pf *pf, u16 module, u32 offset,
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*/
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*/
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if (reset_level && last_cmd && module == ICE_SR_1ST_NVM_BANK_PTR) {
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if (reset_level && last_cmd && module == ICE_SR_1ST_NVM_BANK_PTR) {
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if (hw->dev_caps.common_cap.pcie_reset_avoidance) {
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if (hw->dev_caps.common_cap.pcie_reset_avoidance) {
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*reset_level = (event.desc.params.nvm.cmd_flags &
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*reset_level = desc->params.nvm.cmd_flags &
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ICE_AQC_NVM_RESET_LVL_M);
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ICE_AQC_NVM_RESET_LVL_M;
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dev_dbg(dev, "Firmware reported required reset level as %u\n",
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dev_dbg(dev, "Firmware reported required reset level as %u\n",
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*reset_level);
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*reset_level);
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} else {
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} else {
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@ -479,15 +479,14 @@ ice_erase_nvm_module(struct ice_pf *pf, u16 module, const char *component,
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{
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{
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u16 completion_module, completion_retval;
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u16 completion_module, completion_retval;
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struct device *dev = ice_pf_to_dev(pf);
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struct device *dev = ice_pf_to_dev(pf);
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struct ice_rq_event_info event;
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struct ice_aq_task task = {};
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struct ice_hw *hw = &pf->hw;
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struct ice_hw *hw = &pf->hw;
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struct ice_aq_desc *desc;
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struct devlink *devlink;
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struct devlink *devlink;
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int err;
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int err;
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dev_dbg(dev, "Beginning erase of flash component '%s', module 0x%02x\n", component, module);
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dev_dbg(dev, "Beginning erase of flash component '%s', module 0x%02x\n", component, module);
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memset(&event, 0, sizeof(event));
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devlink = priv_to_devlink(pf);
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devlink = priv_to_devlink(pf);
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devlink_flash_update_timeout_notify(devlink, "Erasing", component, ICE_FW_ERASE_TIMEOUT);
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devlink_flash_update_timeout_notify(devlink, "Erasing", component, ICE_FW_ERASE_TIMEOUT);
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@ -502,7 +501,7 @@ ice_erase_nvm_module(struct ice_pf *pf, u16 module, const char *component,
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goto out_notify_devlink;
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goto out_notify_devlink;
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}
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}
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err = ice_aq_wait_for_event(pf, ice_aqc_opc_nvm_erase, ICE_FW_ERASE_TIMEOUT * HZ, &event);
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err = ice_aq_wait_for_event(pf, &task, ice_aqc_opc_nvm_erase, ICE_FW_ERASE_TIMEOUT * HZ);
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if (err) {
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if (err) {
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dev_err(dev, "Timed out waiting for firmware to respond with erase completion for %s (module 0x%02x), err %d\n",
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dev_err(dev, "Timed out waiting for firmware to respond with erase completion for %s (module 0x%02x), err %d\n",
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component, module, err);
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component, module, err);
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@ -510,8 +509,9 @@ ice_erase_nvm_module(struct ice_pf *pf, u16 module, const char *component,
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goto out_notify_devlink;
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goto out_notify_devlink;
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}
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}
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completion_module = le16_to_cpu(event.desc.params.nvm.module_typeid);
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desc = &task.event.desc;
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completion_retval = le16_to_cpu(event.desc.retval);
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completion_module = le16_to_cpu(desc->params.nvm.module_typeid);
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completion_retval = le16_to_cpu(desc->retval);
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if (completion_module != module) {
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if (completion_module != module) {
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dev_err(dev, "Unexpected module_typeid in erase completion for %s: got 0x%x, expected 0x%x\n",
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dev_err(dev, "Unexpected module_typeid in erase completion for %s: got 0x%x, expected 0x%x\n",
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@ -560,14 +560,12 @@ ice_switch_flash_banks(struct ice_pf *pf, u8 activate_flags,
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u8 *emp_reset_available, struct netlink_ext_ack *extack)
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u8 *emp_reset_available, struct netlink_ext_ack *extack)
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{
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{
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struct device *dev = ice_pf_to_dev(pf);
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struct device *dev = ice_pf_to_dev(pf);
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struct ice_rq_event_info event;
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struct ice_aq_task task = {};
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struct ice_hw *hw = &pf->hw;
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struct ice_hw *hw = &pf->hw;
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u16 completion_retval;
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u16 completion_retval;
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u8 response_flags;
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u8 response_flags;
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int err;
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int err;
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memset(&event, 0, sizeof(event));
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err = ice_nvm_write_activate(hw, activate_flags, &response_flags);
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err = ice_nvm_write_activate(hw, activate_flags, &response_flags);
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if (err) {
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if (err) {
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dev_err(dev, "Failed to switch active flash banks, err %d aq_err %s\n",
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dev_err(dev, "Failed to switch active flash banks, err %d aq_err %s\n",
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@ -592,8 +590,8 @@ ice_switch_flash_banks(struct ice_pf *pf, u8 activate_flags,
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}
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}
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}
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}
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err = ice_aq_wait_for_event(pf, ice_aqc_opc_nvm_write_activate, 30 * HZ,
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err = ice_aq_wait_for_event(pf, &task, ice_aqc_opc_nvm_write_activate,
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&event);
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30 * HZ);
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if (err) {
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if (err) {
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dev_err(dev, "Timed out waiting for firmware to switch active flash banks, err %d\n",
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dev_err(dev, "Timed out waiting for firmware to switch active flash banks, err %d\n",
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err);
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err);
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@ -601,7 +599,7 @@ ice_switch_flash_banks(struct ice_pf *pf, u8 activate_flags,
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return err;
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return err;
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}
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}
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completion_retval = le16_to_cpu(event.desc.retval);
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completion_retval = le16_to_cpu(task.event.desc.retval);
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if (completion_retval) {
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if (completion_retval) {
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dev_err(dev, "Firmware failed to switch active flash banks aq_err %s\n",
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dev_err(dev, "Firmware failed to switch active flash banks aq_err %s\n",
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ice_aq_str((enum ice_aq_err)completion_retval));
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ice_aq_str((enum ice_aq_err)completion_retval));
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@ -1250,26 +1250,12 @@ ice_handle_link_event(struct ice_pf *pf, struct ice_rq_event_info *event)
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return status;
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return status;
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}
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}
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enum ice_aq_task_state {
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ICE_AQ_TASK_WAITING = 0,
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ICE_AQ_TASK_COMPLETE,
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ICE_AQ_TASK_CANCELED,
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};
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struct ice_aq_task {
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struct hlist_node entry;
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u16 opcode;
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struct ice_rq_event_info *event;
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enum ice_aq_task_state state;
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};
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/**
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/**
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* ice_aq_wait_for_event - Wait for an AdminQ event from firmware
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* ice_aq_wait_for_event - Wait for an AdminQ event from firmware
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* @pf: pointer to the PF private structure
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* @pf: pointer to the PF private structure
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* @task: ptr to task structure
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* @opcode: the opcode to wait for
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* @opcode: the opcode to wait for
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* @timeout: how long to wait, in jiffies
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* @timeout: how long to wait, in jiffies
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* @event: storage for the event info
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*
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*
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* Waits for a specific AdminQ completion event on the ARQ for a given PF. The
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* Waits for a specific AdminQ completion event on the ARQ for a given PF. The
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* current thread will be put to sleep until the specified event occurs or
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* current thread will be put to sleep until the specified event occurs or
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@ -1281,22 +1267,16 @@ struct ice_aq_task {
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*
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*
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* Returns: zero on success, or a negative error code on failure.
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* Returns: zero on success, or a negative error code on failure.
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*/
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*/
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int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout,
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int ice_aq_wait_for_event(struct ice_pf *pf, struct ice_aq_task *task,
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struct ice_rq_event_info *event)
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u16 opcode, unsigned long timeout)
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{
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{
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struct device *dev = ice_pf_to_dev(pf);
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struct device *dev = ice_pf_to_dev(pf);
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struct ice_aq_task *task;
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unsigned long start;
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unsigned long start;
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long ret;
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long ret;
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int err;
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int err;
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task = kzalloc(sizeof(*task), GFP_KERNEL);
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if (!task)
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return -ENOMEM;
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INIT_HLIST_NODE(&task->entry);
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INIT_HLIST_NODE(&task->entry);
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task->opcode = opcode;
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task->opcode = opcode;
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task->event = event;
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task->state = ICE_AQ_TASK_WAITING;
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task->state = ICE_AQ_TASK_WAITING;
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spin_lock_bh(&pf->aq_wait_lock);
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spin_lock_bh(&pf->aq_wait_lock);
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@ -1331,7 +1311,6 @@ int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout,
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spin_lock_bh(&pf->aq_wait_lock);
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spin_lock_bh(&pf->aq_wait_lock);
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hlist_del(&task->entry);
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hlist_del(&task->entry);
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spin_unlock_bh(&pf->aq_wait_lock);
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spin_unlock_bh(&pf->aq_wait_lock);
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kfree(task);
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return err;
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return err;
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}
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}
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@ -1366,7 +1345,7 @@ static void ice_aq_check_events(struct ice_pf *pf, u16 opcode,
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if (task->state || task->opcode != opcode)
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if (task->state || task->opcode != opcode)
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continue;
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continue;
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task_ev = task->event;
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task_ev = &task->event;
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memcpy(&task_ev->desc, &event->desc, sizeof(event->desc));
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memcpy(&task_ev->desc, &event->desc, sizeof(event->desc));
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task_ev->msg_len = event->msg_len;
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task_ev->msg_len = event->msg_len;
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