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drm/amdgpu: Updated TCP/UTCL1 programming
Update TCP/UTCL1 thrashing control settings v2: updated rev_id check Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -203,6 +203,9 @@ static void gfx_v9_4_3_init_golden_registers(struct amdgpu_device *adev)
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if (adev->rev_id == 0) {
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WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL1,
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REDUCE_FIFO_DEPTH_BY_2, 2);
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} else {
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WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL2,
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SPARE, 0x1);
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}
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}
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}
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