drm/amdgpu: Updated TCP/UTCL1 programming

Update TCP/UTCL1 thrashing control settings

v2: updated rev_id check

Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Mangesh Gadre 2023-08-21 18:26:24 +08:00 committed by Alex Deucher
parent f54e1d47e0
commit 7caebc8f99

View File

@ -203,6 +203,9 @@ static void gfx_v9_4_3_init_golden_registers(struct amdgpu_device *adev)
if (adev->rev_id == 0) {
WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL1,
REDUCE_FIFO_DEPTH_BY_2, 2);
} else {
WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL2,
SPARE, 0x1);
}
}
}