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dt-bindings: clock: qcom,gcc-sc7280: document CX power domain

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The GCC clock controller needs CX power domain, at least according to
DTS:

  sc7280-herobrine-crd-pro.dtb: clock-controller@100000: Unevaluated properties are not allowed ('power-domains' was unexpected)

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230516105241.30091-3-krzysztof.kozlowski@linaro.org
This commit is contained in:
Krzysztof Kozlowski 2023-05-16 12:52:41 +02:00 committed by Bjorn Andersson
parent 21a95637a3
commit 7a52084ae1
1 changed files with 7 additions and 0 deletions
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7
Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml
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@ -43,6 +43,10 @@ properties:
- const: ufs_phy_tx_symbol_0_clk - const: ufs_phy_tx_symbol_0_clk
- const: usb3_phy_wrapper_gcc_usb30_pipe_clk - const: usb3_phy_wrapper_gcc_usb30_pipe_clk
power-domains:
items:
- description: CX domain
required: required:
- compatible - compatible
- clocks - clocks
@ -56,6 +60,8 @@ unevaluatedProperties: false
examples: examples:
- | - |
#include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/power/qcom-rpmpd.h>
clock-controller@100000 { clock-controller@100000 {
compatible = "qcom,gcc-sc7280"; compatible = "qcom,gcc-sc7280";
reg = <0x00100000 0x1f0000>; reg = <0x00100000 0x1f0000>;
@ -71,6 +77,7 @@ examples:
"pcie_1_pipe_clk", "ufs_phy_rx_symbol_0_clk", "pcie_1_pipe_clk", "ufs_phy_rx_symbol_0_clk",
"ufs_phy_rx_symbol_1_clk", "ufs_phy_tx_symbol_0_clk", "ufs_phy_rx_symbol_1_clk", "ufs_phy_tx_symbol_0_clk",
"usb3_phy_wrapper_gcc_usb30_pipe_clk"; "usb3_phy_wrapper_gcc_usb30_pipe_clk";
power-domains = <&rpmhpd SC7280_CX>;
#clock-cells = <1>; #clock-cells = <1>;
#reset-cells = <1>; #reset-cells = <1>;
#power-domain-cells = <1>; #power-domain-cells = <1>;