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drm/amdgpu: Remove redundant GFX v9.4.3 sequence

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Programming of XCC id is already taken care with partition mode change.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lijo Lazar 2023-07-04 19:43:28 +05:30 committed by Alex Deucher
parent 62e6771ae8
commit 67769b7cdd
1 changed files with 0 additions and 29 deletions
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29
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
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@ -1034,32 +1034,6 @@ static void gfx_v9_4_3_xcc_disable_gpa_mode(struct amdgpu_device *adev, int xcc_
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCPC_PSP_DEBUG, data);
}
static void gfx_v9_4_3_xcc_program_xcc_id(struct amdgpu_device *adev,
int xcc_id)
{
uint32_t tmp = 0;
int num_xcc;
num_xcc = NUM_XCC(adev->gfx.xcc_mask);
switch (num_xcc) {
/* directly config VIRTUAL_XCC_ID to 0 for 1-XCC */
case 1:
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HYP_XCP_CTL, 0x8);
break;
case 2:
case 4:
case 6:
case 8:
tmp = (xcc_id % adev->gfx.num_xcc_per_xcp) << REG_FIELD_SHIFT(CP_HYP_XCP_CTL, VIRTUAL_XCC_ID);
tmp = tmp | (adev->gfx.num_xcc_per_xcp << REG_FIELD_SHIFT(CP_HYP_XCP_CTL, NUM_XCC_IN_XCP));
WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HYP_XCP_CTL, tmp);
break;
default:
break;
}
}
static bool gfx_v9_4_3_is_rlc_enabled(struct amdgpu_device *adev)
{
uint32_t rlc_setting;
@ -1917,9 +1891,6 @@ static int gfx_v9_4_3_xcc_cp_resume(struct amdgpu_device *adev, int xcc_id)
return r;
}
/* set the virtual and physical id based on partition_mode */
gfx_v9_4_3_xcc_program_xcc_id(adev, xcc_id);
r = gfx_v9_4_3_xcc_kiq_resume(adev, xcc_id);
if (r)
return r;