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STM32 DT updates for v5.14, round 1

Browse Source 
Highlights:
 -----------
 
 MCU part:
  - Fixes for Yaml verifications
 
 MPU part:
  - Configure qspi's mdma transfer to block for stm32mp151
 
  - ST boards:
   - Fixes for yaml verifications
 
  - DH boards:
   - Fixes for yaml verifications
   - Rework of LAN8710i on DHCOM SoM to fit with requested reset sequence.
 
  - Odyssey boards:
   - fix Sd card detectection (gpio line updated)
   - fix eMMC VQMMC suuply (use vdd instead of v3v3)
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Merge tag 'stm32-dt-for-v5.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.14, round 1

Highlights:
-----------

MCU part:
 - Fixes for Yaml verifications

MPU part:
 - Configure qspi's mdma transfer to block for stm32mp151

 - ST boards:
  - Fixes for yaml verifications

 - DH boards:
  - Fixes for yaml verifications
  - Rework of LAN8710i on DHCOM SoM to fit with requested reset sequence.

 - Odyssey boards:
  - fix Sd card detectection (gpio line updated)
  - fix eMMC VQMMC suuply (use vdd instead of v3v3)

* tag 'stm32-dt-for-v5.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: fix stpmic node for stm32mp1 boards
  ARM: dts: stm32: Rename spi-flash/mx66l51235l@N to flash@N on DHCOM SoM
  ARM: dts: stm32: Rename eth@N to ethernet@N on DHCOM SoM
  ARM: dts: stm32: Drop unused linux,wakeup from touchscreen node on DHCOM SoM
  ARM: dts: stm32: fix the Odyssey SoM eMMC VQMMC supply
  ARM: dts: stm32: add a new DCMI pins group on stm32mp15
  ARM: dts: stm32: fix ltdc pinctrl on microdev2.0-of7
  dt-bindings: net: document ptp_ref clk in dwmac
  ARM: dts: stm32: move stmmac axi config in ethernet node on stm32mp15
  ARM: dts: stm32: fix i2c node name on stm32f746 to prevent warnings
  ARM: dts: stm32: update pinctrl node name on STM32 MCU to prevent warnings
  ARM: dts: stm32: fix timer nodes on STM32 MCU to prevent warnings
  ARM: dts: stm32: fix RCC node name on stm32f429 MCU
  ARM: dts: stm32: fix gpio-keys node on STM32 MCU boards
  ARM: dts: stm32: fix stm32mp157c-odyssey card detect pin
  ARM: dts: stm32: Configure qspi's mdma transfer to block for stm32mp151
  ARM: dts: stm32: Fix touchscreen node on dhcom-pdk2
  ARM: dts: stm32: Remove extra size-cells on dhcom-pdk2
  ARM: dts: stm32: Rework LAN8710Ai PHY reset on DHCOM SoM

Link: https://lore.kernel.org/r/e4bfb255-63fb-74a8-d591-eb09821c93ee@foss.st.com
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2021-06-12 08:39:40 -07:00
commit 52b54b06a4
23 changed files with 151 additions and 163 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
Documentation/devicetree/bindings/net/stm32-dwmac.yaml
View File

@ -46,17 +46,18 @@ properties:
clocks:
minItems: 3
maxItems: 5
maxItems: 6
items:
- description: GMAC main clock
- description: MAC TX clock
- description: MAC RX clock
- description: For MPU family, used for power mode
- description: For MPU family, used for PHY without quartz
- description: PTP clock
clock-names:
minItems: 3
maxItems: 5
maxItems: 6
contains:
enum:
- stmmaceth
@ -64,6 +65,7 @@ properties:
- mac-clk-rx
- ethstp
- eth-ck
- ptp_ref
st,syscon:
$ref: "/schemas/types.yaml#/definitions/phandle-array"

8
arch/arm/boot/dts/stm32429i-eval.dts
View File

@ -119,17 +119,15 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
button-0 {
label = "Wake up";
linux,code = <KEY_WAKEUP>;
gpios = <&gpioa 0 0>;
};
button@1 {
button-1 {
label = "Tamper";
linux,code = <KEY_RESTART>;
gpios = <&gpioc 13 0>;

6
arch/arm/boot/dts/stm32746g-eval.dts
View File

@ -81,12 +81,10 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
button-0 {
label = "Wake up";
linux,code = <KEY_WAKEUP>;
gpios = <&gpioc 13 0>;

2
arch/arm/boot/dts/stm32f4-pinctrl.dtsi
View File

@ -45,7 +45,7 @@
/ {
soc {
pinctrl: pin-controller {
pinctrl: pin-controller@40020000 {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x40020000 0x3000>;

6
arch/arm/boot/dts/stm32f429-disco.dts
View File

@ -81,12 +81,10 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
button-0 {
label = "User";
linux,code = <KEY_HOME>;
gpios = <&gpioa 0 0>;

72
arch/arm/boot/dts/stm32f429-pinctrl.dtsi
View File

@ -42,54 +42,50 @@
#include "stm32f4-pinctrl.dtsi"
/ {
soc {
pinctrl: pin-controller {
compatible = "st,stm32f429-pinctrl";
&pinctrl {
compatible = "st,stm32f429-pinctrl";
gpioa: gpio@40020000 {
gpio-ranges = <&pinctrl 0 0 16>;
};
gpioa: gpio@40020000 {
gpio-ranges = <&pinctrl 0 0 16>;
};
gpiob: gpio@40020400 {
gpio-ranges = <&pinctrl 0 16 16>;
};
gpiob: gpio@40020400 {
gpio-ranges = <&pinctrl 0 16 16>;
};
gpioc: gpio@40020800 {
gpio-ranges = <&pinctrl 0 32 16>;
};
gpioc: gpio@40020800 {
gpio-ranges = <&pinctrl 0 32 16>;
};
gpiod: gpio@40020c00 {
gpio-ranges = <&pinctrl 0 48 16>;
};
gpiod: gpio@40020c00 {
gpio-ranges = <&pinctrl 0 48 16>;
};
gpioe: gpio@40021000 {
gpio-ranges = <&pinctrl 0 64 16>;
};
gpioe: gpio@40021000 {
gpio-ranges = <&pinctrl 0 64 16>;
};
gpiof: gpio@40021400 {
gpio-ranges = <&pinctrl 0 80 16>;
};
gpiof: gpio@40021400 {
gpio-ranges = <&pinctrl 0 80 16>;
};
gpiog: gpio@40021800 {
gpio-ranges = <&pinctrl 0 96 16>;
};
gpiog: gpio@40021800 {
gpio-ranges = <&pinctrl 0 96 16>;
};
gpioh: gpio@40021c00 {
gpio-ranges = <&pinctrl 0 112 16>;
};
gpioh: gpio@40021c00 {
gpio-ranges = <&pinctrl 0 112 16>;
};
gpioi: gpio@40022000 {
gpio-ranges = <&pinctrl 0 128 16>;
};
gpioi: gpio@40022000 {
gpio-ranges = <&pinctrl 0 128 16>;
};
gpioj: gpio@40022400 {
gpio-ranges = <&pinctrl 0 144 16>;
};
gpioj: gpio@40022400 {
gpio-ranges = <&pinctrl 0 144 16>;
};
gpiok: gpio@40022800 {
gpio-ranges = <&pinctrl 0 160 8>;
};
};
gpiok: gpio@40022800 {
gpio-ranges = <&pinctrl 0 160 8>;
};
};

10
arch/arm/boot/dts/stm32f429.dtsi
View File

@ -283,8 +283,6 @@
};
timers13: timers@40001c00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40001C00 0x400>;
clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM13)>;
@ -299,8 +297,6 @@
};
timers14: timers@40002000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40002000 0x400>;
clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM14)>;
@ -633,8 +629,6 @@
};
timers10: timers@40014400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40014400 0x400>;
clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM10)>;
@ -649,8 +643,6 @@
};
timers11: timers@40014800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40014800 0x400>;
clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM11)>;
@ -709,7 +701,7 @@
status = "disabled";
};
rcc: rcc@40023810 {
rcc: rcc@40023800 {
#reset-cells = <1>;
#clock-cells = <2>;
compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";

6
arch/arm/boot/dts/stm32f469-disco.dts
View File

@ -104,12 +104,10 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
button-0 {
label = "User";
linux,code = <KEY_WAKEUP>;
gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;

74
arch/arm/boot/dts/stm32f469-pinctrl.dtsi
View File

@ -42,55 +42,51 @@
#include "stm32f4-pinctrl.dtsi"
/ {
soc {
pinctrl: pin-controller {
compatible = "st,stm32f469-pinctrl";
&pinctrl {
compatible = "st,stm32f469-pinctrl";
gpioa: gpio@40020000 {
gpio-ranges = <&pinctrl 0 0 16>;
};
gpioa: gpio@40020000 {
gpio-ranges = <&pinctrl 0 0 16>;
};
gpiob: gpio@40020400 {
gpio-ranges = <&pinctrl 0 16 16>;
};
gpiob: gpio@40020400 {
gpio-ranges = <&pinctrl 0 16 16>;
};
gpioc: gpio@40020800 {
gpio-ranges = <&pinctrl 0 32 16>;
};
gpioc: gpio@40020800 {
gpio-ranges = <&pinctrl 0 32 16>;
};
gpiod: gpio@40020c00 {
gpio-ranges = <&pinctrl 0 48 16>;
};
gpiod: gpio@40020c00 {
gpio-ranges = <&pinctrl 0 48 16>;
};
gpioe: gpio@40021000 {
gpio-ranges = <&pinctrl 0 64 16>;
};
gpioe: gpio@40021000 {
gpio-ranges = <&pinctrl 0 64 16>;
};
gpiof: gpio@40021400 {
gpio-ranges = <&pinctrl 0 80 16>;
};
gpiof: gpio@40021400 {
gpio-ranges = <&pinctrl 0 80 16>;
};
gpiog: gpio@40021800 {
gpio-ranges = <&pinctrl 0 96 16>;
};
gpiog: gpio@40021800 {
gpio-ranges = <&pinctrl 0 96 16>;
};
gpioh: gpio@40021c00 {
gpio-ranges = <&pinctrl 0 112 16>;
};
gpioh: gpio@40021c00 {
gpio-ranges = <&pinctrl 0 112 16>;
};
gpioi: gpio@40022000 {
gpio-ranges = <&pinctrl 0 128 16>;
};
gpioi: gpio@40022000 {
gpio-ranges = <&pinctrl 0 128 16>;
};
gpioj: gpio@40022400 {
gpio-ranges = <&pinctrl 0 144 6>,
<&pinctrl 12 156 4>;
};
gpioj: gpio@40022400 {
gpio-ranges = <&pinctrl 0 144 6>,
<&pinctrl 12 156 4>;
};
gpiok: gpio@40022800 {
gpio-ranges = <&pinctrl 3 163 5>;
};
};
gpiok: gpio@40022800 {
gpio-ranges = <&pinctrl 3 163 5>;
};
};

2
arch/arm/boot/dts/stm32f7-pinctrl.dtsi
View File

@ -9,7 +9,7 @@
/ {
soc {
pinctrl: pin-controller {
pinctrl: pin-controller@40020000 {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x40020000 0x3000>;

12
arch/arm/boot/dts/stm32f746.dtsi
View File

@ -265,8 +265,6 @@
};
timers13: timers@40001c00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40001C00 0x400>;
clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>;
@ -281,8 +279,6 @@
};
timers14: timers@40002000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40002000 0x400>;
clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>;
@ -364,9 +360,9 @@
status = "disabled";
};
i2c3: i2c@40005C00 {
i2c3: i2c@40005c00 {
compatible = "st,stm32f7-i2c";
reg = <0x40005C00 0x400>;
reg = <0x40005c00 0x400>;
interrupts = <72>,
<73>;
resets = <&rcc STM32F7_APB1_RESET(I2C3)>;
@ -531,8 +527,6 @@
};
timers10: timers@40014400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40014400 0x400>;
clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>;
@ -547,8 +541,6 @@
};
timers11: timers@40014800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40014800 0x400>;
clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>;

6
arch/arm/boot/dts/stm32f769-disco.dts
View File

@ -75,12 +75,10 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
button-0 {
label = "User";
linux,code = <KEY_HOME>;
gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;

4
arch/arm/boot/dts/stm32h743.dtsi
View File

@ -485,8 +485,6 @@
};
lptimer4: timer@58002c00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-lptimer";
reg = <0x58002c00 0x400>;
clocks = <&rcc LPTIM4_CK>;
@ -501,8 +499,6 @@
};
lptimer5: timer@58003000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-lptimer";
reg = <0x58003000 0x400>;
clocks = <&rcc LPTIM5_CK>;

33
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
View File

@ -118,6 +118,39 @@
};
};
dcmi_pins_b: dcmi-1 {
pins {
pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */
<STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
<STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
<STM32_PINMUX('C', 6, AF13)>,/* DCMI_D0 */
<STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
<STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
<STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */
<STM32_PINMUX('E', 11, AF13)>,/* DCMI_D4 */
<STM32_PINMUX('D', 3, AF13)>,/* DCMI_D5 */
<STM32_PINMUX('E', 13, AF13)>,/* DCMI_D6 */
<STM32_PINMUX('B', 9, AF13)>;/* DCMI_D7 */
bias-disable;
};
};
dcmi_sleep_pins_b: dcmi-sleep-1 {
pins {
pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */
<STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
<STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
<STM32_PINMUX('C', 6, ANALOG)>,/* DCMI_D0 */
<STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
<STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
<STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */
<STM32_PINMUX('E', 11, ANALOG)>,/* DCMI_D4 */
<STM32_PINMUX('D', 3, ANALOG)>,/* DCMI_D5 */
<STM32_PINMUX('E', 13, ANALOG)>,/* DCMI_D6 */
<STM32_PINMUX('B', 9, ANALOG)>;/* DCMI_D7 */
};
};
ethernet0_rgmii_pins_a: rgmii-0 {
pins1 {
pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */

16
arch/arm/boot/dts/stm32mp151.dtsi
View File

@ -1369,8 +1369,8 @@
reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
reg-names = "qspi", "qspi_mm";
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&mdma1 22 0x2 0x100002 0x0 0x0>,
<&mdma1 22 0x2 0x100008 0x0 0x0>;
dmas = <&mdma1 22 0x2 0x10100002 0x0 0x0>,
<&mdma1 22 0x2 0x10100008 0x0 0x0>;
dma-names = "tx", "rx";
clocks = <&rcc QSPI_K>;
resets = <&rcc QSPI_R>;
@ -1416,12 +1416,6 @@
status = "disabled";
};
stmmac_axi_config_0: stmmac-axi-config {
snps,wr_osr_lmt = <0x7>;
snps,rd_osr_lmt = <0x7>;
snps,blen = <0 0 0 0 16 8 4>;
};
ethernet0: ethernet@5800a000 {
compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
reg = <0x5800a000 0x2000>;
@ -1447,6 +1441,12 @@
snps,axi-config = <&stmmac_axi_config_0>;
snps,tso;
status = "disabled";
stmmac_axi_config_0: stmmac-axi-config {
snps,wr_osr_lmt = <0x7>;
snps,rd_osr_lmt = <0x7>;
snps,blen = <0 0 0 0 16 8 4>;
};
};
usbh_ohci: usb@5800c000 {

2
arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts
View File

@ -89,7 +89,7 @@
};
&pinctrl {
ltdc_pins: ltdc {
ltdc_pins: ltdc-0 {
pins {
pinmux = <STM32_PINMUX('G', 10, AF14)>, /* LTDC_B2 */
<STM32_PINMUX('H', 12, AF14)>, /* LTDC_R6 */

7
arch/arm/boot/dts/stm32mp157a-stinger96.dtsi
View File

@ -184,8 +184,6 @@
vdd_usb: ldo4 {
regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
interrupts = <IT_CURLIM_LDO4 0>;
};
@ -208,7 +206,6 @@
vref_ddr: vref_ddr {
regulator-name = "vref_ddr";
regulator-always-on;
regulator-over-current-protection;
};
bst_out: boost {
@ -219,13 +216,13 @@
vbus_otg: pwr_sw1 {
regulator-name = "vbus_otg";
interrupts = <IT_OCP_OTG 0>;
regulator-active-discharge;
regulator-active-discharge = <1>;
};
vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>;
regulator-active-discharge;
regulator-active-discharge = <1>;
};
};

7
arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi
View File

@ -173,8 +173,6 @@
vdd_usb: ldo4 {
regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
interrupts = <IT_CURLIM_LDO4 0>;
};
@ -197,7 +195,6 @@
vref_ddr: vref_ddr {
regulator-name = "vref_ddr";
regulator-always-on;
regulator-over-current-protection;
};
bst_out: boost {
@ -213,7 +210,7 @@
vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>;
regulator-active-discharge;
regulator-active-discharge = <1>;
};
};
@ -269,7 +266,7 @@
st,neg-edge;
bus-width = <8>;
vmmc-supply = <&v3v3>;
vqmmc-supply = <&v3v3>;
vqmmc-supply = <&vdd>;
mmc-ddr-3_3v;
status = "okay";
};

2
arch/arm/boot/dts/stm32mp157c-odyssey.dts
View File

@ -64,7 +64,7 @@
pinctrl-0 = <&sdmmc1_b4_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
cd-gpios = <&gpioi 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
disable-wp;
st,neg-edge;
bus-width = <4>;

7
arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi
View File

@ -34,7 +34,6 @@
gpio-keys-polled {
compatible = "gpio-keys-polled";
#size-cells = <0>;
poll-interval = <20>;
/*
@ -60,7 +59,6 @@
gpio-keys {
compatible = "gpio-keys";
#size-cells = <0>;
button-1 {
label = "TA2-GPIO-B";
@ -184,12 +182,11 @@
};
polytouch@38 {
compatible = "edt,edt-ft5x06";
touchscreen@38 {
compatible = "edt,edt-ft5406";
reg = <0x38>;
interrupt-parent = <&gpiog>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
linux,wakeup;
};
};

17
arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
View File

@ -123,7 +123,6 @@
max-speed = <100>;
phy-handle = <&phy0>;
st,eth-ref-clk-sel;
phy-reset-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>;
mdio0 {
#address-cells = <1>;
@ -132,6 +131,13 @@
phy0: ethernet-phy@1 {
reg = <1>;
/* LAN8710Ai */
compatible = "ethernet-phy-id0007.c0f0",
"ethernet-phy-ieee802.3-c22";
clocks = <&rcc ETHCK_K>;
reset-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>;
reset-assert-us = <500>;
reset-deassert-us = <500>;
interrupt-parent = <&gpioi>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
};
@ -144,7 +150,7 @@
pinctrl-1 = <&fmc_sleep_pins_b>;
status = "okay";
ksz8851: ks8851mll@1,0 {
ksz8851: ethernet@1,0 {
compatible = "micrel,ks8851-mll";
reg = <1 0x0 0x2>, <1 0x2 0x20000>;
interrupt-parent = <&gpioc>;
@ -327,8 +333,6 @@
vdd_usb: ldo4 {
regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
interrupts = <IT_CURLIM_LDO4 0>;
};
@ -350,7 +354,6 @@
vref_ddr: vref_ddr {
regulator-name = "vref_ddr";
regulator-always-on;
regulator-over-current-protection;
};
bst_out: boost {
@ -366,7 +369,7 @@
vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>;
regulator-active-discharge;
regulator-active-discharge = <1>;
};
};
@ -431,7 +434,7 @@
#size-cells = <0>;
status = "okay";
flash0: mx66l51235l@0 {
flash0: flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-rx-bus-width = <4>;

2
arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
View File

@ -198,7 +198,7 @@
#size-cells = <0>;
status = "okay";
flash0: spi-flash@0 {
flash0: flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-rx-bus-width = <4>;

7
arch/arm/boot/dts/stm32mp15xx-osd32.dtsi
View File

@ -146,8 +146,6 @@
vdd_usb: ldo4 {
regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
interrupts = <IT_CURLIM_LDO4 0>;
};
@ -171,7 +169,6 @@
vref_ddr: vref_ddr {
regulator-name = "vref_ddr";
regulator-always-on;
regulator-over-current-protection;
};
bst_out: boost {
@ -182,13 +179,13 @@
vbus_otg: pwr_sw1 {
regulator-name = "vbus_otg";
interrupts = <IT_OCP_OTG 0>;
regulator-active-discharge;
regulator-active-discharge = <1>;
};
vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>;
regulator-active-discharge;
regulator-active-discharge = <1>;
};
};