Qualcomm dts updates for v5.18

The MSM8226 platform gains description of USB, SoC power-domains,
 PMIC multi-purpose pins, SPMI regulators, the smbb battery charger and
 the LG G Watch R, on this platform, gains description of Bluetooth,
 WiFI, fuel gauge, SMBB battery charger and USB.
 
 DeviceTree validation issues in APQ8060, APQ8064, MDM9615, MSM8960,
 IPQ4019 and SDX55 are corrected.
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Merge tag 'qcom-dts-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm dts updates for v5.18

The MSM8226 platform gains description of USB, SoC power-domains,
PMIC multi-purpose pins, SPMI regulators, the smbb battery charger and
the LG G Watch R, on this platform, gains description of Bluetooth,
WiFI, fuel gauge, SMBB battery charger and USB.

DeviceTree validation issues in APQ8060, APQ8064, MDM9615, MSM8960,
IPQ4019 and SDX55 are corrected.

* tag 'qcom-dts-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (27 commits)
  ARM: dts: qcom: msm8226: add power domains
  ARM: dts: qcom: apq8026-lg-lenok: Add Bluetooth
  ARM: dts: qcom: apq8026-lg-lenok: Add Wifi
  ARM: dts: qcom: msm8226: Add pinctrl for sdhci nodes
  ARM: dts: qcom: sdx55: Fix the address used for PCIe EP local addr space
  ARM: dts: qcom: apq8060-dragonboard: fix typo in eMMC
  ARM: dts: qcom: pm8226: Add node for the MPP
  ARM: dts: qcom: fill missing power-domain-cells for gcc controllers
  ARM: dts: qcom: msm8960: move vsdcc regulator out of simple-bus
  ARM: dts: qcom: add KPSS GCC compatible to clock nodes
  ARM: dts: qcom: fix gic_irq_domain_translate warnings for msm8960
  ARM: dts: qcom: rename eth node to ethernet
  ARM: dts: qcom: apq8060: correct mvs switch name
  ARM: dts: qcom: nexus7: remove vcss supply which never existed
  ARM: dts: qcom: apq8064: adjust dsi node name to match dt-schema
  ARM: dts: qcom: apq8064: make pci regs property dt-schema compliant
  ARM: dts: qcom: apq8064: correct ranges values
  ARM: dts: qcom: ipq4019: fix sleep clock
  ARM: dts: qcom: pm8226: Support SPMI regulators on PMIC sid 1
  ARM: dts: qcom: pm8226: Add vibration motor node
  ...

Link: https://lore.kernel.org/r/20220301042828.1805481-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-03-01 11:11:08 +01:00
commit 40c13296f8
13 changed files with 326 additions and 49 deletions

View File

@ -9,6 +9,7 @@ PROPERTIES
following:
"qcom,usb-hs-phy-apq8064"
"qcom,usb-hs-phy-msm8226"
"qcom,usb-hs-phy-msm8916"
"qcom,usb-hs-phy-msm8974"

View File

@ -16,11 +16,35 @@
aliases {
serial0 = &blsp1_uart3;
serial1 = &blsp1_uart4;
};
chosen {
stdout-path = "serial0:115200n8";
};
vreg_wlan: wlan-regulator {
compatible = "regulator-fixed";
regulator-name = "wl-reg";
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
gpio = <&tlmm 46 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&wlan_regulator_default_state>;
};
};
&blsp1_i2c1 {
status = "okay";
fuel-gauge@55 {
compatible = "ti,bq27421";
reg = <0x55>;
};
};
&blsp1_i2c5 {
@ -57,14 +81,30 @@
status = "okay";
};
&blsp1_uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&blsp1_uart4_default_state>;
bluetooth {
compatible = "brcm,bcm43430a0-bt";
max-speed = <3000000>;
pinctrl-names = "default";
pinctrl-0 = <&bluetooth_default_state>;
host-wakeup-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
device-wakeup-gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
shutdown-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
};
};
&rpm_requests {
pm8226-regulators {
compatible = "qcom,rpm-pm8226-regulators";
pm8226_s1: s1 {
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1275000>;
};
pm8226_s3: s3 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1350000>;
@ -195,24 +235,55 @@
bus-width = <8>;
non-removable;
};
pinctrl-names = "default";
pinctrl-0 = <&sdhc1_pin_a>;
&sdhc_3 {
status = "okay";
max-frequency = <100000000>;
non-removable;
vmmc-supply = <&vreg_wlan>;
vqmmc-supply = <&pm8226_l6>;
#address-cells = <1>;
#size-cells = <0>;
wifi@1 {
compatible = "brcm,bcm43430a0-fmac", "brcm,bcm4329-fmac";
reg = <1>;
interrupts-extended = <&tlmm 37 IRQ_TYPE_EDGE_FALLING>;
interrupt-names = "host-wake";
pinctrl-names = "default";
pinctrl-0 = <&wlan_hostwake_default_state>;
};
};
&smbb {
qcom,fast-charge-safe-current = <450000>;
qcom,fast-charge-current-limit = <400000>;
qcom,fast-charge-safe-voltage = <4350000>;
qcom,fast-charge-high-threshold-voltage = <4350000>;
qcom,auto-recharge-threshold-voltage = <4240000>;
qcom,minimum-input-voltage = <4450000>;
};
&tlmm {
sdhc1_pin_a: sdhc1-pin-active {
clk {
pins = "sdc1_clk";
drive-strength = <10>;
bias-disable;
};
blsp1_uart4_default_state: blsp1-uart4-default-state {
pins = "gpio12", "gpio13", "gpio14", "gpio15";
function = "blsp_uart4";
drive-strength = <8>;
bias-disable;
};
cmd-data {
pins = "sdc1_cmd", "sdc1_data";
drive-strength = <10>;
bias-pull-up;
};
bluetooth_default_state: bluetooth-default-state {
pins = "gpio47", "gpio48";
function = "gpio";
drive-strength = <2>;
bias-disable;
input-enable;
};
touch_pins: touch {
@ -234,4 +305,31 @@
output-high;
};
};
wlan_hostwake_default_state: wlan-hostwake-default-state {
pins = "gpio37";
function = "gpio";
drive-strength = <2>;
bias-disable;
input-enable;
};
wlan_regulator_default_state: wlan-regulator-default-state {
pins = "gpio46";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
&usb {
status = "okay";
extcon = <&smbb>;
dr_mode = "peripheral";
};
&usb_hs_phy {
extcon = <&smbb>;
v1p8-supply = <&pm8226_l10>;
v3p3-supply = <&pm8226_l20>;
};

View File

@ -83,7 +83,7 @@
soc {
pinctrl@800000 {
/* eMMMC pins, all 8 data lines connected */
/* eMMC pins, all 8 data lines connected */
dragon_sdcc1_pins: sdcc1 {
mux {
pins = "gpio159", "gpio160", "gpio161",
@ -674,14 +674,14 @@
bias-pull-down;
};
/* LVS0 thru 3 and mvs0 are just switches */
/* LVS0 thru 3 and mvs are just switches */
lvs0 {
regulator-always-on;
};
lvs1 { };
lvs2 { };
lvs3 { };
mvs0 {};
mvs { };
};

View File

@ -212,13 +212,12 @@
};
};
dsi0: mdss_dsi@4700000 {
dsi0: dsi@4700000 {
status = "okay";
vdda-supply = <&pm8921_l2>;/*VDD_MIPI1 to 4*/
vdd-supply = <&pm8921_l8>;
vddio-supply = <&pm8921_lvs7>;
avdd-supply = <&pm8921_l11>;
vcss-supply = <&ext_3p3v>;
panel@0 {
reg = <0>;

View File

@ -815,6 +815,7 @@
nvmem-cells = <&tsens_calib>, <&tsens_backup>;
nvmem-cell-names = "calib", "calib_backup";
#clock-cells = <1>;
#power-domain-cells = <1>;
#reset-cells = <1>;
#thermal-sensor-cells = <1>;
};
@ -830,11 +831,12 @@
compatible = "qcom,mmcc-apq8064";
reg = <0x4000000 0x1000>;
#clock-cells = <1>;
#power-domain-cells = <1>;
#reset-cells = <1>;
};
l2cc: clock-controller@2011000 {
compatible = "syscon";
compatible = "qcom,kpss-gcc", "syscon";
reg = <0x2011000 0x1000>;
};
@ -1238,7 +1240,7 @@
reg = <0x5700000 0x70>;
};
dsi0: mdss_dsi@4700000 {
dsi0: dsi@4700000 {
compatible = "qcom,mdss-dsi-ctrl";
label = "MDSS DSI CTRL->0";
#address-cells = <1>;
@ -1268,6 +1270,7 @@
<&dsi0_phy 1>;
syscon-sfpb = <&mmss_sfpb>;
phys = <&dsi0_phy>;
phy-names = "dsi";
ports {
#address-cells = <1>;
#size-cells = <0>;
@ -1368,10 +1371,10 @@
pcie: pci@1b500000 {
compatible = "qcom,pcie-apq8064", "snps,dw-pcie";
reg = <0x1b500000 0x1000
0x1b502000 0x80
0x1b600000 0x100
0x0ff00000 0x100000>;
reg = <0x1b500000 0x1000>,
<0x1b502000 0x80>,
<0x1b600000 0x100>,
<0x0ff00000 0x100000>;
reg-names = "dbi", "elbi", "parf", "config";
device_type = "pci";
linux,pci-domain = <0>;
@ -1379,8 +1382,8 @@
num-lanes = <1>;
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000 /* I/O */
0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* memory */
ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>, /* I/O */
<0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* mem */
interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
#interrupt-cells = <1>;

View File

@ -142,7 +142,8 @@
clocks {
sleep_clk: sleep_clk {
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-frequency = <32000>;
clock-output-names = "gcc_sleep_clk_src";
#clock-cells = <0>;
};
@ -186,6 +187,7 @@
gcc: clock-controller@1800000 {
compatible = "qcom,gcc-ipq4019";
#clock-cells = <1>;
#power-domain-cells = <1>;
#reset-cells = <1>;
reg = <0x1800000 0x60000>;
};

View File

@ -139,6 +139,7 @@
gcc: clock-controller@900000 {
compatible = "qcom,gcc-mdm9615";
#clock-cells = <1>;
#power-domain-cells = <1>;
#reset-cells = <1>;
reg = <0x900000 0x4000>;
};
@ -151,7 +152,7 @@
};
l2cc: clock-controller@2011000 {
compatible = "syscon";
compatible = "qcom,kpss-gcc", "syscon";
reg = <0x02011000 0x1000>;
};

View File

@ -8,6 +8,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-msm8974.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/reset/qcom,gcc-msm8974.h>
/ {
#address-cells = <1>;
@ -72,6 +73,35 @@
rpm_requests: rpm-requests {
compatible = "qcom,rpm-msm8226";
qcom,smd-channels = "rpm_requests";
rpmpd: power-controller {
compatible = "qcom,msm8226-rpmpd";
#power-domain-cells = <1>;
operating-points-v2 = <&rpmpd_opp_table>;
rpmpd_opp_table: opp-table {
compatible = "operating-points-v2";
rpmpd_opp_ret: opp1 {
opp-level = <1>;
};
rpmpd_opp_svs_krait: opp2 {
opp-level = <2>;
};
rpmpd_opp_svs_soc: opp3 {
opp-level = <3>;
};
rpmpd_opp_nom: opp4 {
opp-level = <4>;
};
rpmpd_opp_turbo: opp5 {
opp-level = <5>;
};
rpmpd_opp_super_turbo: opp6 {
opp-level = <6>;
};
};
};
};
};
};
@ -115,6 +145,8 @@
<&gcc GCC_SDCC1_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
pinctrl-names = "default";
pinctrl-0 = <&sdhc1_default_state>;
status = "disabled";
};
@ -129,6 +161,8 @@
<&gcc GCC_SDCC2_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
pinctrl-names = "default";
pinctrl-0 = <&sdhc2_default_state>;
status = "disabled";
};
@ -143,6 +177,8 @@
<&gcc GCC_SDCC3_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
pinctrl-names = "default";
pinctrl-0 = <&sdhc3_default_state>;
status = "disabled";
};
@ -229,6 +265,44 @@
#size-cells = <0>;
};
usb: usb@f9a55000 {
compatible = "qcom,ci-hdrc";
reg = <0xf9a55000 0x200>,
<0xf9a55200 0x200>;
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_USB_HS_AHB_CLK>,
<&gcc GCC_USB_HS_SYSTEM_CLK>;
clock-names = "iface", "core";
assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
assigned-clock-rates = <75000000>;
resets = <&gcc GCC_USB_HS_BCR>;
reset-names = "core";
phy_type = "ulpi";
dr_mode = "otg";
hnp-disable;
srp-disable;
adp-disable;
ahb-burst-config = <0>;
phy-names = "usb-phy";
phys = <&usb_hs_phy>;
status = "disabled";
#reset-cells = <1>;
ulpi {
usb_hs_phy: phy {
compatible = "qcom,usb-hs-phy-msm8226",
"qcom,usb-hs-phy";
#phy-cells = <0>;
clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
clock-names = "ref", "sleep";
resets = <&gcc GCC_USB2A_PHY_BCR>, <&usb 0>;
reset-names = "phy", "por";
qcom,init-seq = /bits/ 8 <0x0 0x44
0x1 0x68 0x2 0x24 0x3 0x13>;
};
};
};
gcc: clock-controller@fc400000 {
compatible = "qcom,gcc-msm8226";
reg = <0xfc400000 0x4000>;
@ -281,6 +355,57 @@
drive-strength = <2>;
bias-disable;
};
sdhc1_default_state: sdhc1-default-state {
clk {
pins = "sdc1_clk";
drive-strength = <10>;
bias-disable;
};
cmd-data {
pins = "sdc1_cmd", "sdc1_data";
drive-strength = <10>;
bias-pull-up;
};
};
sdhc2_default_state: sdhc2-default-state {
clk {
pins = "sdc2_clk";
drive-strength = <10>;
bias-disable;
};
cmd-data {
pins = "sdc2_cmd", "sdc2_data";
drive-strength = <10>;
bias-pull-up;
};
};
sdhc3_default_state: sdhc3-default-state {
clk {
pins = "gpio44";
function = "sdc3";
drive-strength = <8>;
bias-disable;
};
cmd {
pins = "gpio43";
function = "sdc3";
drive-strength = <8>;
bias-pull-up;
};
data {
pins = "gpio39", "gpio40", "gpio41", "gpio42";
function = "sdc3";
drive-strength = <8>;
bias-pull-up;
};
};
};
restart@fc4ab000 {

View File

@ -126,6 +126,7 @@
gcc: clock-controller@900000 {
compatible = "qcom,gcc-msm8660";
#clock-cells = <1>;
#power-domain-cells = <1>;
#reset-cells = <1>;
reg = <0x900000 0x4000>;
};
@ -390,7 +391,7 @@
};
l2cc: clock-controller@2082000 {
compatible = "syscon";
compatible = "qcom,kpss-gcc", "syscon";
reg = <0x02082000 0x1000>;
};

View File

@ -279,7 +279,7 @@
pinctrl-0 = <&spi1_default>;
spi@16080000 {
status = "okay";
eth@0 {
ethernet@0 {
compatible = "micrel,ks8851";
reg = <0>;
interrupt-parent = <&msmgpio>;

View File

@ -78,6 +78,15 @@
};
};
/* Temporary fixed regulator */
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
regulator-name = "SDCC Power";
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2700000>;
regulator-always-on;
};
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
@ -118,6 +127,7 @@
gcc: clock-controller@900000 {
compatible = "qcom,gcc-msm8960";
#clock-cells = <1>;
#power-domain-cells = <1>;
#reset-cells = <1>;
reg = <0x900000 0x4000>;
};
@ -133,11 +143,12 @@
compatible = "qcom,mmcc-msm8960";
reg = <0x4000000 0x1000>;
#clock-cells = <1>;
#power-domain-cells = <1>;
#reset-cells = <1>;
};
l2cc: clock-controller@2011000 {
compatible = "syscon";
compatible = "qcom,kpss-gcc", "syscon";
reg = <0x2011000 0x1000>;
};
@ -146,7 +157,9 @@
reg = <0x108000 0x1000>;
qcom,ipc = <&l2cc 0x8 2>;
interrupts = <0 19 0>, <0 21 0>, <0 22 0>;
interrupts = <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ack", "err", "wakeup";
regulators {
@ -192,7 +205,7 @@
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x16440000 0x1000>,
<0x16400000 0x1000>;
interrupts = <0 154 0x0>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
@ -249,15 +262,6 @@
clock-names = "core";
};
/* Temporary fixed regulator */
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
regulator-name = "SDCC Power";
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2700000>;
regulator-always-on;
};
amba {
compatible = "simple-bus";
#address-cells = <1>;
@ -318,7 +322,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x16080000 0x1000>;
interrupts = <0 147 0>;
interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <24000000>;
cs-gpios = <&msmgpio 8 0>;

View File

@ -16,6 +16,39 @@
debounce = <15625>;
bias-pull-up;
};
smbb: charger@1000 {
compatible = "qcom,pm8226-charger";
reg = <0x1000>;
interrupts = <0x0 0x10 7 IRQ_TYPE_EDGE_BOTH>,
<0x0 0x10 5 IRQ_TYPE_EDGE_BOTH>,
<0x0 0x10 4 IRQ_TYPE_EDGE_BOTH>,
<0x0 0x12 1 IRQ_TYPE_EDGE_BOTH>,
<0x0 0x12 0 IRQ_TYPE_EDGE_BOTH>,
<0x0 0x13 2 IRQ_TYPE_EDGE_BOTH>,
<0x0 0x13 1 IRQ_TYPE_EDGE_BOTH>,
<0x0 0x14 1 IRQ_TYPE_EDGE_BOTH>;
interrupt-names = "chg-done",
"chg-fast",
"chg-trkl",
"bat-temp-ok",
"bat-present",
"chg-gone",
"usb-valid",
"dc-valid";
chg_otg: otg-vbus { };
};
pm8226_mpps: mpps@a000 {
compatible = "qcom,pm8226-mpp", "qcom,spmi-mpp";
reg = <0xa000>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pm8226_mpps 0 0 8>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pm8226_1: pm8226@1 {
@ -23,5 +56,15 @@
reg = <0x1 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8226_spmi_regulators: pm8226-regulators {
compatible = "qcom,pm8226-regulators";
};
pm8226_vib: vibrator@c000 {
compatible = "qcom,pm8916-vib";
reg = <0xc000>;
status = "disabled";
};
};
};

View File

@ -413,7 +413,7 @@
<0x40000000 0xf1d>,
<0x40000f20 0xc8>,
<0x40001000 0x1000>,
<0x40002000 0x10000>,
<0x40200000 0x100000>,
<0x01c03000 0x3000>;
reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
"mmio";
@ -536,7 +536,7 @@
reg = <0x0c264000 0x1000>;
};
spmi_bus: qcom,spmi@c440000 {
spmi_bus: spmi@c440000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0x0c440000 0x0000d00>,
<0x0c600000 0x2000000>,