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net: hinic: remove unused functions
hinic_hwdev_max_num_qpas() and hinic_msix_attr_get() are no longer called, remove them. Also the macro HINIC_MSIX_ATTR_GET is also not called, remove it. Signed-off-by: Zhengchao Shao <shaozhengchao@huawei.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@ -1041,13 +1041,6 @@ void hinic_free_hwdev(struct hinic_hwdev *hwdev)
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hinic_free_hwif(hwdev->hwif);
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}
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int hinic_hwdev_max_num_qps(struct hinic_hwdev *hwdev)
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{
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struct hinic_cap *nic_cap = &hwdev->nic_cap;
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return nic_cap->max_qps;
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}
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/**
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* hinic_hwdev_num_qps - return the number QPs available for use
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* @hwdev: the NIC HW device
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@ -566,8 +566,6 @@ struct hinic_hwdev *hinic_init_hwdev(struct pci_dev *pdev, struct devlink *devli
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void hinic_free_hwdev(struct hinic_hwdev *hwdev);
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int hinic_hwdev_max_num_qps(struct hinic_hwdev *hwdev);
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int hinic_hwdev_num_qps(struct hinic_hwdev *hwdev);
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struct hinic_sq *hinic_hwdev_get_sq(struct hinic_hwdev *hwdev, int i);
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@ -57,39 +57,6 @@ int hinic_msix_attr_set(struct hinic_hwif *hwif, u16 msix_index,
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return 0;
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}
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/**
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* hinic_msix_attr_get - get message attribute of msix entry
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* @hwif: the HW interface of a pci function device
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* @msix_index: msix_index
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* @pending_limit: the maximum pending interrupt events (unit 8)
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* @coalesc_timer: coalesc period for interrupt (unit 8 us)
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* @lli_timer: replenishing period for low latency credit (unit 8 us)
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* @lli_credit_limit: maximum credits for low latency msix messages (unit 8)
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* @resend_timer: maximum wait for resending msix (unit coalesc period)
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*
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* Return 0 - Success, negative - Failure
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**/
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int hinic_msix_attr_get(struct hinic_hwif *hwif, u16 msix_index,
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u8 *pending_limit, u8 *coalesc_timer,
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u8 *lli_timer, u8 *lli_credit_limit,
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u8 *resend_timer)
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{
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u32 addr, val;
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if (!VALID_MSIX_IDX(&hwif->attr, msix_index))
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return -EINVAL;
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addr = HINIC_CSR_MSIX_CTRL_ADDR(msix_index);
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val = hinic_hwif_read_reg(hwif, addr);
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*pending_limit = HINIC_MSIX_ATTR_GET(val, PENDING_LIMIT);
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*coalesc_timer = HINIC_MSIX_ATTR_GET(val, COALESC_TIMER);
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*lli_timer = HINIC_MSIX_ATTR_GET(val, LLI_TIMER);
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*lli_credit_limit = HINIC_MSIX_ATTR_GET(val, LLI_CREDIT);
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*resend_timer = HINIC_MSIX_ATTR_GET(val, RESEND_TIMER);
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return 0;
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}
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/**
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* hinic_msix_attr_cnt_clear - clear message attribute counters for msix entry
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* @hwif: the HW interface of a pci function device
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@ -131,10 +131,6 @@
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(((u32)(val) & HINIC_MSIX_##member##_MASK) << \
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HINIC_MSIX_##member##_SHIFT)
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#define HINIC_MSIX_ATTR_GET(val, member) \
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(((val) >> HINIC_MSIX_##member##_SHIFT) & \
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HINIC_MSIX_##member##_MASK)
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#define HINIC_MSIX_CNT_RESEND_TIMER_SHIFT 29
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#define HINIC_MSIX_CNT_RESEND_TIMER_MASK 0x1
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@ -269,11 +265,6 @@ int hinic_msix_attr_set(struct hinic_hwif *hwif, u16 msix_index,
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u8 lli_timer_cfg, u8 lli_credit_limit,
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u8 resend_timer);
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int hinic_msix_attr_get(struct hinic_hwif *hwif, u16 msix_index,
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u8 *pending_limit, u8 *coalesc_timer_cfg,
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u8 *lli_timer, u8 *lli_credit_limit,
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u8 *resend_timer);
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void hinic_set_msix_state(struct hinic_hwif *hwif, u16 msix_idx,
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enum hinic_msix_state flag);
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